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path: root/drivers/gpu/drm
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2014-11-14drm/i915/chv: Combine GEN8_ROW_CHICKEN w/aArun Siluvery
WaDisablePartialInstShootdown:chv and WaDisableThreadStallDopClockGating:chv are related to the same register so combine them. Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-11-14drm/i915/chv: Remove pre-production workaroundsArun Siluvery
-WaDisableDopClockGating:chv -WaDisableSamplerPowerBypass:chv -WaDisableGunitClockGating:chv -WaDisableFfDopClockGating:chv -WaDisableDopClockGating:chv v2: Remove pre-production WA instead of restricting them based on revision id (Ville) For: VIZ-4090 Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-11-14drm/i915: use the correct obj when preparing the sprite planePaulo Zanoni
Commit "drm/i915: create a prepare phase for sprite plane updates" changed the old_obj pointer we use when committing sprite planes, which caused a WARN() and a BUG() to be triggered. Later, commit "drm/i915: use intel_fb_obj() macros to assign gem objects" introduced the same problem to function intel_commit_sprite_plane(). Regression introduced by: commit ec82cb793c9224e0692eed904f43490cf70e8258 Author: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Date: Fri Oct 24 14:51:32 2014 +0100 drm/i915: create a prepare phase for sprite plane updates and: commit 77cde95217484e845743818691df026cec2534f4 Author: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Date: Fri Oct 24 14:51:33 2014 +0100 drm/i915: use intel_fb_obj() macros to assign gem objects Credits to Imre Deak for pointing out the exact lines that were wrong. v2: Also fix intel_commit_sprite_plane() (Ville) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85634 Testcase: igt/pm_rpm/legacy-planes Testcase: igt/pm_rpm/legacy-planes-dpms Testcase: igt/pm_rpm/universal-planes Testcase: igt/pm_rpm/universal-planes-dpms Credits-to: Imre Deak <imre.deak@intel.com> Cc: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-11-14drm/i915: Add tracepoints to track a vm during its lifetimeDaniele Ceraolo Spurio
- ppgtt init/release: these tracepoints are useful for observing the creation and destruction of Full PPGTTs. - ctx create/free: we can use the ctx_free trace in combination with the ppgtt_release one to be sure that the ppgtt doesn't stay alive for too long after the ctx is destroyed. ctx_create is there for simmetry - switch_mm: important point in the lifetime of the vm v4: add DOC information v5: pull the DOC in drm.tmpl v6: clean ppgtt init/release traces + add ctx create/free and switch_mm tracepoints (Chris) v7: drop execlist_submit_context tracepoint Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-11-14drm/edid: fix Baseline_ELD_Len field in drm_edid_to_eld()Jani Nikula
The Baseline_ELD_Len field does not include ELD Header Block size. From High Definition Audio Specification, Revision 1.0a: The header block is a fixed size of 4 bytes. The baseline block is variable size in multiple of 4 bytes, and its size is defined in the header block Baseline_ELD_Len field (in number of DWords). Do not include the header size in Baseline_ELD_Len field. Fix all known users of eld[2]. While at it, switch to DIV_ROUND_UP instead of open coding it. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Dave Airlie <airlied@linux.ie> [danvet: Fix compile fail in nouveau.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-11-14drm/i915: avoid deadlock on failure paths in __intel_framebuffer_create()Alexey Khoroshilov
Since a8bb6818270c __intel_framebuffer_create() is called with struct_mutex held, so it should use drm_gem_object_unreference() instead of drm_gem_object_unreference_unlocked(). Found by Linux Driver Verification project (linuxtesting.org). This regression has been introduced in commit a8bb6818270c32126dba0fd2ddb139d885c5687d Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Mon Feb 10 18:00:39 2014 +0100 drm/i915: Fix error path leak in fbdev fb allocation Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-11-14drm/i915: Use correct pipe config to update pll dividers. V2Bob Paauwe
Use the new pipe config values to calculate the updated pll dividers. This regression was introduced in commit 0dbdf89f27b17ae1eceed6782c2917f74cbb5d59 Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Date: Wed Oct 29 11:32:33 2014 +0200 drm/i915: Add infrastructure for choosing DPLLs before disabling crtcs and commit 00d958817dd3daaa452c221387ddaf23d1e4c06f Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Date: Wed Oct 29 11:32:36 2014 +0200 drm/i915: Covert remaining platforms to choose DPLLS before disabling CRTCs v2: Use intel_pipe_will_have_type() to look at new configuration - Ander Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com> CC: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Tested-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-11-14Merge tag 'drm/tegra/for-3.18-rc5' of ↵Dave Airlie
git://people.freedesktop.org/~tagr/linux into drm-fixes drm/tegra: Fixes for v3.18-rc5 This is a single patch that fixes the VBLANK machinery after: 7ffd7a68511c drm: Always reject drm_vblank_get() after drm_vblank_off() * tag 'drm/tegra/for-3.18-rc5' of git://people.freedesktop.org/~tagr/linux: drm/tegra: dc: Add missing call to drm_vblank_on()
2014-11-14Merge branch 'linux-3.18' of ↵Dave Airlie
git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes One modesetting, one gk20a fix. * 'linux-3.18' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: drm/nouveau/nv50/disp: Fix modeset on G94 drm/gk20a/fb: fix setting of large page size bit
2014-11-14Merge tag 'drm-intel-fixes-2014-11-13' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-fixes one regression fix. * tag 'drm-intel-fixes-2014-11-13' of git://anongit.freedesktop.org/drm-intel: drm/i915: Fix obj->map_and_fenceable across tiling changes
2014-11-13drm/tegra: gem: Check before freeing CMA memoryThierry Reding
dma_free_writecombine() must not be called on a buffer that couldn't be allocated. Check for a valid virtual address before attempting to free the memory to avoid a crash. Reported-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: fb: Add error codes to error messagesThierry Reding
This helps in determining what errors happened at specifics points in the initialization sequence. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: fb: Properly release GEM objects on failureThierry Reding
When fbdev initialization fails, make sure to unreference the GEM objects properly. Note that we can't do this in the general error unwinding path because ownership of the GEM object references is transferred to the framebuffer upon creation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: Detach panel when a connector is removedThierry Reding
When the DRM device is torn down and the connector is removed, make sure to detach the panel to make sure there are no dangling pointers. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: Plug memory leakThierry Reding
Free the DRM device-private memory upon driver unload to make sure the memory doesn't leak. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: Use more consistent data typesThierry Reding
Use size_t consistently for sizes and u32/u64 instead of uint32_t and uint64_t. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: fb: Do not destroy framebufferThierry Reding
Drop a reference instead of directly calling the framebuffer .destroy() callback at fbdev free time. This is necessary to make sure the object isn't destroyed if anyone else still has a reference. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: dumb: pitch and size are outputsThierry Reding
When creating a dumb buffer object using the DRM_IOCTL_MODE_CREATE_DUMB IOCTL, only the width, height, bpp and flags parameters are inputs. The caller is not guaranteed to zero out or set handle, pitch and size, so the driver must not treat these values as possible inputs. Fixes a bug where running the Weston compositor on Tegra DRM would cause an attempt to allocate a 3 GiB framebuffer to be allocated. Fixes: de2ba664c30f ("gpu: host1x: drm: Add memory manager and fb") Cc: stable@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: Enable the hotplug interrupt only when necessaryThierry Reding
The hotplug handling needs access to the DRM device, which only appears at ->init() time. Disable interrupts up until that time. Similarly, when an output is removed, disable the hotplug interrupt again because the DRM device (and with it the hotplug infrastructure) is going away. Also make sure to only access the DRM device if it's available. Given the above change for the hotplug interrupt this should really never happen, but the extra check doesn't hurt either. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dc: Universal plane supportThierry Reding
This allows the primary plane and cursor to be exposed as regular DRM/KMS planes, which is a prerequisite for atomic modesetting and gives userspace more flexibility over controlling them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dc: Registers are 32 bits wideThierry Reding
Using an unsigned long type will cause these variables to become 64-bit on 64-bit SoCs. In practice this should always work, but there's no need for carrying around the additional 32 bits. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dc: Factor out DC, window and cursor commitThierry Reding
The sequence to commit changes to the DC, window or cursor configuration is repetitive and can be extracted into separate functions for ease of use. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: Add IOMMU supportThierry Reding
When an IOMMU device is available on the platform bus, allocate an IOMMU domain and attach the display controllers to it. The display controllers can then scan out non-contiguous buffers by mapping them through the IOMMU. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: Fix error handling cleanupThierry Reding
The DRM driver's ->load() implementation didn't do a good job (no job at all really) cleaning up on failure. Fix that by undoing any prior setup when an error occurs. This requires a bit of rework to make it possible to clean up fbdev midway. This was tested by injecting errors at various points during the initialization sequence and verifying that error cleanup didn't crash and no memory leaked (using kmemleak). Reported-by: Stéphane Marchesin <marcheu@chromium.org> Reported-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: Use dma_mmap_writecombine()Thierry Reding
Use the existing API rather than open-coding equivalent functionality in the driver. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()Thierry Reding
The drm_gem_object_release() function already performs this cleanup, so there is no reason to do it explicitly. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: Cleanup tegra_bo_create_with_handle()Thierry Reding
There is only a single location where the function needs to do cleanup. Skip the error unwinding path and call the cleanup function directly instead. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: Extract tegra_bo_alloc_object()Thierry Reding
This function implements the common buffer object allocation used for both allocation and import paths. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlierSean Paul
Make sure the DSI PHY_TIMING and BTA_TIMING registers are initialized when the clocks are set up as opposed to when the output is enabled. This makes sure that the PHY timings are properly set up when the panel is prepared and that DCS commands sent at that time use the appropriate timings. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Replace 1000000 by USEC_PER_SECThierry Reding
Using the symbolic constant instantly provides a lot more context. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Replace 1000000000UL by NSEC_PER_SECThierry Reding
Using the symbolic constant instantly provides a lot more context. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Implement host transfersThierry Reding
Add support for sending MIPI DSI command packets from the host to a peripheral. This is required for panels that need configuration before they accept video data. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Add ganged mode supportThierry Reding
Implement ganged mode support for the Tegra DSI driver. The DSI host controller to gang up with is specified via a phandle in the device tree and the resolved DSI host controller used for the programming of the ganged-mode registers. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Split out tegra_dsi_set_timeout()Thierry Reding
In preparation for adding ganged-mode support, this commit splits out the tegra_dsi_set_timeout() function so that it can be reused for the slave DSI controller. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Add command mode supportThierry Reding
Add support for DC-driven command mode. This is a mode where the video stream sent by the display controller is packed into DCS command packets (write_memory_start and write_memory_continue) by the DSI controller. It can be used for panels with a remote framebuffer and is useful to save power when used with a dynamic refresh rate (not yet supported by the driver). Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Refactor in preparation for command modeThierry Reding
For command mode panels, the DSI controller needs to be enabled and configured so that panel drivers can send commands prior to the video stream being enabled. Move code from the monolithic output enable/disable functions into smaller, reusable units to allow more fine-grained control over the controller state. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Properly cleanup on probe failureThierry Reding
The driver wasn't even attempting to do any cleanup when probing failed. Fix this by releasing any resources acquired up to the point of failure and putting the device back into the original state (reset, clocks off). Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Mark connector hotpluggableThierry Reding
DSI panels can always be hotplugged via the DSI bus' attach/detach infrastructure, so unconditionally mark the connector hotpluggable. While at it, also make sure that when a panel is detached the connector is marked unconnected before calling into the DRM hotplug helpers to reflect the correct state. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Leave parent clock aloneThierry Reding
The common clock framework will take care of preparing and enabling the parent of the DSI clock automatically. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Do not manage clock on enable/disableThierry Reding
In preparation for supporting command mode panels, don't disable the clock when the output is disabled. The output will be enabled only after the panel has been programmed in command mode, so the clock must always remain on. As a side-effect, pad calibration now only needs to be done at driver probe time, since neither power nor controller state will go away before driver removal. While at it, use a 32-bit variable to store register content because the registers are 32-bit even on 64-bit Tegra. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dsi: Make FIFO depths host parametersThierry Reding
Rather than hardcoding them as macros, make the host and video FIFO depths parameters so that they can be more easily adjusted if a new generation of the Tegra SoC changes them. While at it, set the depth of the video FIFO to the correct value of 1920 *words* rather than *bytes*. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: DPMS off/on in encoder prepare/commitSean Paul
Previously the panel and output were only enabled on encoder->dpms(). If userspace called dpms on before doing a modeset, the driver would get into a state where the connector had a dpms state of ON, but the encoder and output were not enabled (because the encoder is not yet attached to the connector). Subsequent dpms ON calls are ignored b/c the connector's state already matches the desired state. This patch enables/disables the panel and output on modeset as well, so we can catch the above case. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: Do not enable output on .mode_set()Thierry Reding
The output is already enabled in .dpms(), doing it in .mode_set() too can cause noticeable flicker. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dc: Add powergate supportThierry Reding
Both display controllers are in their own power partition. Currently the driver relies on the assumption that these partitions are on (which is the hardware default). However some bootloaders may disable them, so the driver must make sure to turn them back on to avoid hangs. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: Depend on COMMON_CLKThierry Reding
The introduction of the COMPILE_TEST dependency in commit 158b50aefa14 (drm/tegra: Increase compile test coverage) removes the dependency on COMMON_CLK (implicitly selected via ARCH_TEGRA, ARCH_MULTI_V7 and ARCH_MULTIPLATFORM). Reported-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: dc: Add missing call to drm_vblank_on()Thierry Reding
When the CRTC is enabled, make sure the VBLANK machinery is enabled. Failure to do so will cause drm_vblank_get() to not enable the VBLANK on the CRTC and VBLANK-synchronized page-flips won't work. While at it, get rid of the legacy drm_vblank_pre_modeset() and drm_vblank_post_modeset() calls that are replaced by drm_vblank_on() and drm_vblank_off(). Reported-by: Alexandre Courbot <acourbot@nvidia.com> Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/panel: Add Sharp LQ101R1SX01 supportThierry Reding
This panel requires dual-channel mode. The device accepts command-mode data on 8 lanes and will therefore need a dual-channel DSI controller. The two interfaces that make up this device need to be instantiated in the controllers that gang up to provide the dual-channel DSI host. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/dsi: Do not require .owner field to be setThierry Reding
Drivers now no longer need to set the .owner field. It will be automatically set at registration time. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/dsi: Resolve MIPI DSI device from phandleThierry Reding
Add a function, of_find_mipi_dsi_device_by_node(), that can be used to resolve a phandle to a MIPI DSI device. Acked-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/dsi: Implement DCS set_{column,page}_address commandsThierry Reding
Provide small convenience wrappers to set the column and page extents of the frame memory accessed by the host processors. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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