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2016-11-11drm/amd/powerplay: enable voltage control by default for dgpu.Rex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amd/powerplay: fix code styleRex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amdgpu: delete duplicate module parameter.Rex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amdgpu: use mask bit for deep sleep feature on dpm.Rex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amd/powerplay: use mask bit for deepsleep/power tune feature.Rex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amdgpu/powerplay: pp module only enable smu when dpm disabled.Rex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amdgpu:bypass avfs event manager for sriovTrigger Huang
This patch is used for virtualization support. In virtualization case, the initialization sequences are not totally the same as non-Virtualization's. The avfs event manager should be bypassed if in SRIOV virtualization case. At the same, this patch will also bypass starting SMC within SRIOV in FIJI, so the SMU firmware loading will be avoid, which is required in SRIOV. Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amdgpu:no gpu scheduler for KIQTrigger Huang
KIQ is used for interaction between driver and CP, and not exposed to outside client, as such it doesn't need to be handled by GPU scheduler. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amdgpu: Add a ring type KIQ definitionTrigger Huang
Add a new ring type definition for KIQ. KIQ is used for interaction between driver and CP. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amdgpu: enable UVD clockgating in Polaris-10/11Maruthi Srinivas Bayyavarapu
UVD clocks are set to be disabled, when not in use. Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tom StDenis <Tom.StDenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amd/amdgpu: expose fan rpm though hwmonGrazvydas Ignotas
Only for cards that are supported by powerplay. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amd/powerplay: export a function to read fan rpmGrazvydas Ignotas
Powerplay hwmgr already has an implementation, all we need to do is to call it. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amdgpu: remove amdgpu_cs_handle_lockupHuang Rui
In fence waiting, it never return -EDEADLK yet, so drop this function here. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amdgpu: cleanup amdgpu_cs_ioctl to make code logicality clearHuang Rui
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amd/powerplay: make CAC feature controlled by module parameter.Rex Zhu
use same module parameter with powercontainment Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amd/powerplay: add new bit mask to ctrl clock stretch feature.Rex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amdgpu: Attach exclusive fence to prime exported bo's. (v5)Mario Kleiner
External clients which import our bo's wait only for exclusive dmabuf-fences, not on shared ones, ditto for bo's which we import from external providers and write to. Therefore attach exclusive fences on prime shared buffers if our exported buffer gets imported by an external client, or if we import a buffer from an external exporter. See discussion in thread: https://lists.freedesktop.org/archives/dri-devel/2016-October/122370.html Prime export tested on Intel iGPU + AMD Tonga dGPU as DRI3/Present Prime render offload, and with the Tonga standalone as primary gpu. v2: Add a wait for all shared fences before prime export, as suggested by Christian Koenig. v3: - Mark buffer prime_exported in amdgpu_gem_prime_pin, so we only use the exclusive fence when exporting a bo to external clients like a separate iGPU, but not when exporting/importing from/to ourselves as part of regular DRI3 fd passing. - Propagate failure of reservation_object_wait_rcu back to caller. v4: - Switch to a prime_shared_count counter instead of a flag, which gets in/decremented on prime_pin/unpin, so we can switch back to shared fences if all clients detach from our exported bo. - Also switch to exclusive fence for prime imported bo's. v5: - Drop lret, instead use int ret -> long ret, as proposed by Christian. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95472 Tested-by: Mike Lothian <mike@fireburn.co.uk> (v1) Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com>. Cc: Christian König <christian.koenig@amd.com> Cc: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-11-11drm/i915: Convert i915_drv.c to INTEL_GENTvrtko Ursulin
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1478270568-7902-2-git-send-email-tvrtko.ursulin@linux.intel.com
2016-11-11drm/i915: Pass dev_priv to INTEL_INFO everywhere apart from the gen useTvrtko Ursulin
After this patch only conversion of INTEL_INFO(p)->gen to INTEL_GEN(dev_priv) remains before the __I915__ macro can be removed. v2: Tidy vlv_compute_wm. (David Weinehall) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: David Weinehall <david.weinehall@linux.intel.com> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
2016-11-11drm/i915: Further assorted dev_priv cleanupsTvrtko Ursulin
A small selection of macros which can only accept dev_priv from now on and a resulting trickle of fixups. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
2016-11-11drm/i915: More assorted dev_priv cleanupsTvrtko Ursulin
A small selection of macros which can only accept dev_priv from now on and a resulting trickle of fixups. v2: Keep original order. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
2016-11-11drm/i915: Assorted dev_priv cleanupsTvrtko Ursulin
A small selection of macros which can only accept dev_priv from now on and a resulting trickle of fixups. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
2016-11-11drm/tegra: Set sgt pointer in BO pinMikko Perttunen
Fix tegra_bo_pin() to set the parameter sgt pointer. host1x job pinning requires the sgt to determine physical memory addresses of gathers. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-11drm/tegra: Support kernel mappings with IOMMUArto Merilainen
host1x command buffer patching requires that the buffer object can be mapped into kernel address space. However, the recent addition of IOMMU support did not account for this requirement. Therefore host1x engines cannot be used if IOMMU is enabled. This patch implements kmap, kunmap, mmap and munmap functions to host1x buffer objects. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-11gpu: host1x: Add locking to syncptArto Merilainen
Currently syncpoints are not locked by mutex and this causes races if we are aggressively freeing and allocating syncpoints. This patch adds missing mutex protection to syncpoint structures. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> [treding@nvidia.com: use better label names, don't reset local variable] Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-11gpu: host1x: Store device address to all bufsArto Merilainen
Currently job pinning is optimized to handle only the first buffer using a certain host1x_bo object and all subsequent buffers using the same host1x_bo are considered done. In most cases this is correct, however, in case the same host1x_bo is used in multiple gathers inside the same job, we skip also storing the device address (physical or iova) to this buffer. This patch reworks the host1x_job_pin() to store the device address to all gathers. Signed-off-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-11drm: Add missing mutex_destroy in drm_dev_init/releaseJoonas Lahtinen
Add 3 missing mutex_destroy to drm_dev_init teardown and drm_dev_release. v2: - Also include drm_dev_release Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1478785835-4142-1-git-send-email-joonas.lahtinen@linux.intel.com Link: http://patchwork.freedesktop.org/patch/msgid/1478785835-4142-1-git-send-email-joonas.lahtinen@linux.intel.com
2016-11-11drm/i915: Split out i915_vma.cJoonas Lahtinen
As a side product, had to split two other files; - i915_gem_fence_reg.h - i915_gem_object.h (only parts that needed immediate untanglement) I tried to move code in as big chunks as possible, to make review easier. i915_vma_compare was moved to a header temporarily. v2: - Use i915_gem_fence_reg.{c,h} v3: - Rebased v4: - Fix building when DEBUG_GEM is enabled by reordering a bit. Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1478861034-30643-1-git-send-email-joonas.lahtinen@linux.intel.com
2016-11-11drm/i915: Refresh that status of MST capable connectors in ->detect()Ville Syrjälä
Once we've determined that the sink is MST capable we never end up running through the full detect cycle again, despite getting HPDs. Fix tht by ripping out the incorrect piece of code responsible. This got broken when I moved the long HPD handling to the ->detect() hook, but failed to remove the leftover code. Cc: Ander Conselvan de Oliveira <conselvan2@gmail.com> Cc: drm-intel-fixes@lists.freedesktop.org Cc: Rui Tiago Matos <tiagomatos@gmail.com> Tested-by: Rui Tiago Matos <tiagomatos@gmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98323 Cc: Kirill A. Shutemov <kirill@shutemov.name> Tested-by: Kirill A. Shutemov <kirill@shutemov.name> References: https://bugs.freedesktop.org/show_bug.cgi?id=98306 Fixes: 1015811609c0 ("drm/i915: Move long hpd handling into the hotplug work") Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1477057478-29328-1-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 1aab956c7b8872fb6976328316bfad62c6e67cf8) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2016-11-11drm/i915: Grab the rotation from the passed plane state for VLV spritesVille Syrjälä
Use the passed in plane_state instead of plane->state in vlv_update_plane(). Currently the two are one and the same, but if we start queuing up multiple plane updates they might not be. Looks like this was rebase fail on my part. Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Fixes: 8d0deca8c6e0 ("drm/i915: Pass 90/270 vs. 0/180 rotation info for intel_gen4_compute_page_offset()") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1478550057-24864-4-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 11df4d95b3ad9e6a6a6e0907bb200610a4d24887) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2016-11-11drm/i915: Mark CPU cache as dirty when used for renderingChris Wilson
On LLC, or even snooped, machines rendering via the GPU ends up in the CPU cache. This cacheline dirt also needs to be flushed to main memory when moving to an incoherent domain, such as the display's scanout engine. Mostly, this happens because either the object is marked as dirty from its first use or is avoided by setting the object into the display domain from the start. v2: Treat WT as not requiring a clflush prior to use on the display engine as well. Fixes: 0f71979ab7fb ("drm/i915: Performed deferred clflush inside set-cache-level") References: https://bugs.freedesktop.org/show_bug.cgi?id=95414 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: <stable@vger.kernel.org> # v4.0+ Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161107165204.7008-1-chris@chris-wilson.co.uk (cherry picked from commit 7aa6ca61ee5546d74b76610894924cdb0d4a1af0) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2016-11-11Merge branch 'linus' into locking/core, to pick up fixesIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-11-11Merge branch 'topic-arcpgu-fixes' of ↵Dave Airlie
https://github.com/foss-for-synopsys-dwc-arc-processors/linux into drm-fixes * 'topic-arcpgu-fixes' of https://github.com/foss-for-synopsys-dwc-arc-processors/linux: drm/arcpgu: Accommodate adv7511 switch to DRM bridge
2016-11-11drm/arcpgu: Accommodate adv7511 switch to DRM bridgeEugeniy Paltsev
ARC PGU driver starts crashing on initialization after 'commit e12c2f645557 ("drm/i2c: adv7511: Convert to drm_bridge")' This happenes because in "arcpgu_drm_hdmi_init" function we get pointer of "drm_i2c_encoder_driver" structure, which doesn't exist after adv7511 hdmi encoder interface changed from slave encoder to drm bridge. So, when we call "encoder_init" function from this structure driver crashes. Bootlog: ------------------------------------->8-------------------------------- [drm] Initialized drm 1.1.0 20060810 arcpgu e0017000.pgu: arc_pgu ID: 0xabbabaab arcpgu e0017000.pgu: assigned reserved memory node frame_buffer@9e000000 Path: (null) CPU: 0 PID: 1 Comm: swapper Not tainted 4.8.0-00001-gb5642252fa01-dirty #8 task: 9a058000 task.stack: 9a032000 [ECR ]: 0x00220100 => Invalid Read @ 0x00000004 by insn @ 0x803934e8 [EFA ]: 0x00000004 [BLINK ]: drm_atomic_helper_connector_dpms+0xa6/0x230 [ERET ]: drm_atomic_helper_connector_dpms+0xa4/0x230 [STAT32]: 0x00000846 : K DE E2 E1 BTA: 0x8016d949 SP: 0x9a033e34 FP: 0x00000000 LPS: 0x8036f6fc LPE: 0x8036f700 LPC: 0x00000000 r00: 0x8063c118 r01: 0x805b98ac r02: 0x00000b11 r03: 0x00000000 r04: 0x9a010f54 r05: 0x00000000 r06: 0x00000001 r07: 0x00000000 r08: 0x00000028 r09: 0x00000001 r10: 0x00000007 r11: 0x00000054 r12: 0x720a3033 Stack Trace: drm_atomic_helper_connector_dpms+0xa4/0x230 arcpgu_drm_hdmi_init+0xbc/0x228 arcpgu_probe+0x168/0x244 platform_drv_probe+0x26/0x64 really_probe+0x1f0/0x32c __driver_attach+0xa8/0xd0 bus_for_each_dev+0x3c/0x74 bus_add_driver+0xc2/0x184 driver_register+0x50/0xec do_one_initcall+0x3a/0x120 kernel_init_freeable+0x108/0x1a0 ------------------------------------->8-------------------------------- Fix ARC PGU driver to be able work with drm bridge hdmi encoder interface. The hdmi connector code isn't needed anymore as we expect the adv7511 bridge driver to create/manage the connector. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-11-11Merge tag 'zxdrm-4.10' of ↵Dave Airlie
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into drm-next ZTE zxdrm driver support for 4.10: This is the initial ZTE VOU display controller DRM/KMS driver. There are still some features to be added, like overlay plane, scaling, and more output devices support. But it's already useful with dual CRTCs and HDMI display working. [airlied: use drm_format_plane_cpp instead of legacy api] * tag 'zxdrm-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: MAINTAINERS: add an entry for ZTE ZX DRM driver drm: zte: add initial vou drm driver dt-bindings: add bindings doc for ZTE VOU display controller
2016-11-11Merge branch 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld into ↵Dave Airlie
drm-next Here is the list of fixes that I have for drm/mali-dp. They've been on the mailing lists for a while and merged into linux-next for a few weeks, but due to holiday and travel to Linux Plumbers I did not send the pull request earlier. I don't know if these patches can be pulled into v4.9 still (they will conflict with Ville Syrjälä's cleanup of DRM_ROTATE series that is already in drm-next), but if you do that would be great. * 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld: drm: mali-dp: Clear CVAL when leaving config mode drm/arm: mark symbols static where possible drm: mali-dp: Add support for setting plane's rotation property from userspace. drm: mali-dp: Don't set DRM_PLANE_COMMIT_ACTIVE_ONLY drm: mali-dp: Store internal format and n_planes in plane state drm: mali-dp: Enable alpha blending drm: mali-dp: Refactor plane initialisation arm: mali-dp: Extract mode_config cleanup into malidp_fini drm: mali-dp: Add pitch alignment check for planes drm: mali-dp: Add pitch alignment check function drm: mali-dp: Set the drm->irq_enabled flag to match driver's state. drm: mali-dp: Clear the config_valid flag before using it in wait_event.
2016-11-11Merge branch 'fixes-for-v4.9-rc5' of ↵Dave Airlie
http://git.agner.ch/git/linux-drm-fsl-dcu into drm-fixes Yet another small batch of fixes. Two of the patches I had prepared since quite some time, but they did not seem to affect operation in a visible manner so far. Until recently, when I discovered the third issue (disable planes before disabling CRTC), which made the two previous fixes necessary. * 'fixes-for-v4.9-rc5' of http://git.agner.ch/git/linux-drm-fsl-dcu: drm/fsl-dcu: disable planes before disabling CRTC drm/fsl-dcu: update all registers on flush drm/fsl-dcu: do not update when modifying irq registers
2016-11-11Merge tag 'dw-hdmi-next-2016-09-19' of ↵Dave Airlie
git://git.pengutronix.de/git/pza/linux into drm-next dw-hdmi i2c master controller - add support for the HDMI I2C master controller, for boards that can have their DDC pins connected only to the HDMI TX directly. * tag 'dw-hdmi-next-2016-09-19' of git://git.pengutronix.de/git/pza/linux: drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter support drm: dw_hdmi: use of_get_i2c_adapter_by_node interface
2016-11-11Merge tag 'imx-drm-next-2016-11-10' of ↵Dave Airlie
git://git.pengutronix.de/git/pza/linux into drm-next imx-drm plane update cleanup, YUV formats - request modeset if plane offsets changed, only the plane base address can be changed without disabling the plane IDMAC channel. - cleanup of plane atomic_update - remove unused ipu_cpmem_set_yuv_planar function - support YUV 4:4:4, 4:2:2, NV12 and NV16 plane formats - not only mask interrupts during irq init, also clear them - remove a legacy check from imx-ldb - add support to set the CSI downsizing bits - silence an obnoxious warning during modeset * tag 'imx-drm-next-2016-11-10' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-di: silence videomode logspam gpu: ipu-v3: add ipu_csi_set_downsize drm/imx: imx-ldb: remove unnecessary double disable check gpu: ipu-v3: initially clear all interrupts drm/imx: ipuv3-plane: add support for YUV 4:2:2 and 4:4:4, NV12, and NV16 formats gpu: ipu-v3: add YUV 4:4:4 support gpu: ipu-cpmem: remove unused ipu_cpmem_set_yuv_planar function drm/imx: ipuv3-plane: let drm_plane_state_to_ubo/vbo handle chroma subsampling other than 4:2:0 drm/imx: ipuv3-plane: merge ipu_plane_atomic_set_base into atomic_update drm/imx: ipuv3-plane: request modeset if plane offsets changed
2016-11-11Merge tag 'topic/drm-misc-2016-11-10' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-next - better atomic state debugging from Rob - fence prep from gustavo - sumits flushed out his backlog of pending dma-buf/fence patches from various people - drm_mm leak debugging plus trying to appease Kconfig (Chris) - a few misc things all over * tag 'topic/drm-misc-2016-11-10' of git://anongit.freedesktop.org/drm-intel: (35 commits) drm: Make DRM_DEBUG_MM depend on STACKTRACE_SUPPORT drm/i915: Restrict DRM_DEBUG_MM automatic selection drm: Restrict stackdepot usage to builtin drm.ko drm/msm: module param to dump state on error irq drm/msm/mdp5: add atomic_print_state support drm/atomic: add debugfs file to dump out atomic state drm/atomic: add new drm_debug bit to dump atomic state drm: add helpers to go from plane state to drm_rect drm: add helper for printing to log or seq_file drm: helper macros to print composite types reservation: revert "wait only with non-zero timeout specified (v3)" v2 drm/ttm: fix ttm_bo_wait dma-buf/fence: revert "don't wait when specified timeout is zero" (v2) dma-buf/fence: make timeout handling in fence_default_wait consistent (v2) drm/amdgpu: add the interface of waiting multiple fences (v4) dma-buf: return index of the first signaled fence (v2) MAINTAINERS: update Sync File Framework files dma-buf/sw_sync: put fence reference from the fence creation dma-buf/sw_sync: mark sync_timeline_create() static drm: Add stackdepot include for DRM_DEBUG_MM ...
2016-11-11Merge tag 'drm-intel-next-2016-11-08' of ↵Dave Airlie
git://anongit.freedesktop.org/git/drm-intel into drm-next - gpu idling rework for s/r (Imre) - vlv mappable scanout fix - speed up probing in resume (Lyude) - dp audio workarounds for gen9 (Dhinakaran) - more conversion to using dev_priv internally (Ville) - more gen9+ wm fixes and cleanups (Maarten) - shrinker cleanup&fixes (Chris) - reorg plane init code (Ville) - implement support for multiple timelines (prep work for scheduler) from Chris and all - untangle dev->struct_mutex locking as prep for multiple timelines (Chris) - refactor bxt phy code and collect it all in intel_dpio_phy.c (Ander) - another gvt with bugfixes all over from Zhenyu - piles of lspcon fixes from Imre - 90/270 rotation fixes (Ville) - guc log buffer support (Akash+Sagar) - fbc fixes from Paulo - untangle rpm vs. tiling-fences/mmaps (Chris) - fix atomic commit to wait on the right fences (Daniel Stone) * tag 'drm-intel-next-2016-11-08' of git://anongit.freedesktop.org/git/drm-intel: (181 commits) drm/i915: Update DRIVER_DATE to 20161108 drm/i915: Mark CPU cache as dirty when used for rendering drm/i915: Add assert for no pending GPU requests during suspend/resume in LR mode drm/i915: Make sure engines are idle during GPU idling in LR mode drm/i915: Avoid early GPU idling due to race with new request drm/i915: Avoid early GPU idling due to already pending idle work drm/i915: Limit Valleyview and earlier to only using mappable scanout drm/i915: Round tile chunks up for constructing partial VMAs drm/i915: Remove the vma from the object list upon close drm/i915: Reinit polling before hpd when resuming drm/i915: Remove redundant reprobe in i915_drm_resume drm/i915/dp: Extend BDW DP audio workaround to GEN9 platforms drm/i915/dp: BDW cdclk fix for DP audio drm/i915: Fix pages pin counting around swizzle quirk drm/i915: Fix test on inputs for vma_compare() drm/i915/guc: Cache the client mapping drm/i915: Tidy slab cache allocations drm/i915: Introduce HAS_64BIT_RELOC drm/i915: Show the execlist queue in debugfs/i915_engine_info drm/i915: Unify global_list into global_link ...
2016-11-11Merge tag 'imx-drm-fixes-2016-11-10' of ↵Dave Airlie
git://git.pengutronix.de/git/pza/linux into drm-fixes imx-drm: fix possible hangup when disabling crtcs - only ever disable the display controller (DC) module after all plane IDMAC channels are stopped. This fixes a regression introduced by the atomic modeset conversion. * tag 'imx-drm-fixes-2016-11-10' of git://git.pengutronix.de/git/pza/linux: drm/imx: disable planes before DC
2016-11-11Merge branch 'drm-fixes-4.9' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-fixes Regression fix for powerplay on some iceland boards. * 'drm-fixes-4.9' of git://people.freedesktop.org/~agd5f/linux: drm/amd/powerplay: implement get_clock_by_type for iceland. drm/amd/powerplay/smu7: fix checks in smu7_get_evv_voltages (v2) drm/amd/powerplay: update phm_get_voltage_evv_on_sclk for iceland drm/amd/powerplay: propagate errors in phm_get_voltage_evv_on_sclk
2016-11-11drm/udl: make control msg static const. (v2)Dave Airlie
Thou shall not send control msg from the stack, does that mean I can send it from the RO memory area? and it looks like the answer is no, so here's v2 which kmemdups. Reported-by: poma Tested-by: poma <poma@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-11-10drm/amd/powerplay: implement get_clock_by_type for iceland.Rex Zhu
iceland use pptable v0. bugs: https://bugzilla.kernel.org/show_bug.cgi?id=185681 https://bugs.freedesktop.org/show_bug.cgi?id=98357 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-10Merge tag 'gvt-next-kvmgt-framework' of https://github.com/01org/gvt-linux ↵Daniel Vetter
into drm-intel-next-queued Zhenyu Wang writes: gvt-next-kvmgt-framework This adds initial KVMGT framework based on GVT-g MPT(Mediated Passthrough) interface. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2016-11-10drm/amd/powerplay/smu7: fix checks in smu7_get_evv_voltages (v2)Alex Deucher
Only check if the tables exist in relevant configs. This fixes a failure on V0 tables. v2: fix version check as suggested by Rex bugs: https://bugzilla.kernel.org/show_bug.cgi?id=185681 https://bugs.freedesktop.org/show_bug.cgi?id=98357 Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-10drm/amd/powerplay: update phm_get_voltage_evv_on_sclk for icelandAlex Deucher
Was missing the handling for iceland. bugs: https://bugzilla.kernel.org/show_bug.cgi?id=185681 https://bugs.freedesktop.org/show_bug.cgi?id=98357 Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-10drm/amd/powerplay: propagate errors in phm_get_voltage_evv_on_sclkAlex Deucher
Missing for one case. bugs: https://bugzilla.kernel.org/show_bug.cgi?id=185681 https://bugs.freedesktop.org/show_bug.cgi?id=98357 Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-10drm/i915: Trim the object sg tableTvrtko Ursulin
At the moment we allocate enough sg table entries assuming we will not be able to do any coalescing. But since in practice we most often can, and more so very effectively, this ends up wasting a lot of memory. A simple and effective way of trimming the over-allocated entries is to copy the table over to a new one allocated to the exact size. Experiments on my freshly logged and idle desktop (KDE) showed that by doing this we can save approximately 1 MiB of RAM, or when running a typical benchmark like gl_manhattan I have even seen a 6 MiB saving. More complicated techniques such as only copying the last used page and freeing the rest are left to the reader. v2: * Update commit message. * Use temporary sg_table on stack. (Chris Wilson) v3: * Commit message update. * Comment added. * Replace memcpy with copy assignment. (Chris Wilson) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1478704423-7447-1-git-send-email-tvrtko.ursulin@linux.intel.com
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