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2024-04-04drm/i915/display: Compute vrr_vsync paramsMitul Golani
Compute vrr_vsync_start/end, which sets the position for hardware to send the Vsync at a fixed position relative to the end of the Vblank. --v2: - Updated VSYNC_START/END macros to VRR_VSYNC_START/END. (Ankit) - Updated bit fields of VRR_VSYNC_START/END. (Ankit) --v3: - Add PIPE_CONF_CHECK_I(vrr.vsync_start/end). - Read/write vrr_vsync params only when we intend to send adaptive_sync sdp. --v4: - Use VRR_SYNC_START/END macros correctly. --v5: - Send AS SDP only when VRR is enabled. --v6: - Add TRANS_VRR_VSYNC before enabling VRR as per bspec. (Ankit) Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240322031157.3823909-9-mitulkumar.ajitkumar.golani@intel.com
2024-04-04drm/i915/display: Add state checker for Adaptive Sync SDPMitul Golani
Enable infoframe and add state checker for Adaptive Sync SDP enablement. --v1: - crtc_state->infoframes.enable, to add on correct place holder. Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240322031157.3823909-8-mitulkumar.ajitkumar.golani@intel.com
2024-04-04drm/i915/display: Compute AS SDP parametersMitul Golani
Add necessary function definitions to compute AS SDP data. The new intel_dp_compute_as_sdp function computes AS SDP values based on the display configuration, ensuring proper handling of Variable Refresh Rate (VRR). --v2: - Added DP_SDP_ADAPTIVE_SYNC to infoframe_type_to_idx(). [Ankit] - Separated patch for intel_read/write_dp_sdp. [Ankit] - _HSW_VIDEO_DIP_ASYNC_DATA_A should be from ADL onward. [Ankit] - Fixed indentation issues. [Ankit] --v3: - Added VIDEO_DIP_ENABLE_AS_HSW flag to intel_dp_set_infoframes. --v4: - Added HAS_VRR check before writing AS SDP. --v5: Added missed HAS_VRR check before reading AS SDP. --v6: - Used Adaptive Sync sink status as a check for read/write SDP. (Ankit) --v7: - Remove as_sdp_enable from crtc_state. - Add a comment mentioning current support of DP_AS_SDP_AVT_FIXED_VTOTAL. - Add state checker for AS_SDP infoframe enable. --v8: - Drop conn_state from intel_dp_compute_as_sdp, as not used. - Remove fullstop in subject line. --v9: - Add vrr.enable instead of is_in_vrr_range. --v10: - remove vrefresh and connector, as they are no longer required. Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240322031157.3823909-7-mitulkumar.ajitkumar.golani@intel.com
2024-04-04drm/i915/dp: Add wrapper function to check AS SDPMitul Golani
Add a wrapper function to check if both the source and sink support Adaptive Sync SDP. --v1: Just use drm/i915/dp in subject line. Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240322031157.3823909-6-mitulkumar.ajitkumar.golani@intel.com
2024-04-04drm/i915/dp: Add Read/Write support for Adaptive Sync SDPMitul Golani
Add the necessary structures and functions to handle reading and unpacking Adaptive Sync Secondary Data Packets. Also add support to write and pack AS SDP. --v2: - Correct use of REG_BIT and REG_GENMASK. [Jani] - Use as_sdp instead of async. [Jani] - Remove unrelated comments and changes. [Jani] - Correct code indent. [Jani] --v3: - Update definition names for AS SDP which are starting from HSW, as these defines are applicable for ADLP+.(Ankit) --v4: - Remove as_sdp_mode from crtc_state. - Drop metadata keyword. - For consistency, update ADL_ prefix or post fix as required. --v5: - Check if AS_SDP bit is set in crtc_state->infoframes.enable. If not return. - Check for HAS_AS_SDP() before setting VIDEO_DIP_ENABLE_AS_ADL mask. --v6: - Rename intel_read_dp_infoframe_as_sdp to intel_read_dp_as_sdp. --v7: - Add read back for length and vtotal correction. --v8: - Use as_sdp->target_rr & 0xFF. - Shift by 8 instead of 32, and drop casting to u64. - Remove changes which are does not belong to this patch. Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240322031157.3823909-5-mitulkumar.ajitkumar.golani@intel.com
2024-04-04drm/i915/display: Add crtc state dump for Adaptive Sync SDPMitul Golani
Add crtc state dump for Adaptive Sync SDP to know which crtc specifically caused the failure. --v1: - Rebase Patches to latest. Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240322031157.3823909-4-mitulkumar.ajitkumar.golani@intel.com
2024-04-04drm/dp: Add Adaptive Sync SDP loggingMitul Golani
Add structure representing Adaptive Sync Secondary Data Packet (AS SDP). Also, add Adaptive Sync SDP logging in drm_dp_helper.c to facilitate debugging. --v2: - Update logging. [Jani, Ankit] - Use 'as_sdp' instead of 'async' [Ankit] - Correct define placeholders to where they are actually used. [Jani] - Update members in 'as_sdp' structure to make it uniform. [Jani] --v3: - Added changes to dri-devel mailing list. No code changes. --v4: - Instead of directly using operation mode, use an enum to accommodate all operation modes (Ankit). --v5: Nit-pick changes to commit message. --v6: - Add correct place holder and name change for AS_SDP_OP_MODE. - Separate i915 changes from drm changes. - Remove extra lines. --v7: - Add drm/dp in subject line (Ankit) Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240322031157.3823909-3-mitulkumar.ajitkumar.golani@intel.com
2024-04-04drm/dp: Add support to indicate if sink supports AS SDPMitul Golani
Add an API that indicates support for Adaptive Sync SDP in the sink, which can be utilized by the rest of the DP programming. --v1: - Format commit message properly. Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240322031157.3823909-2-mitulkumar.ajitkumar.golani@intel.com
2024-04-03drm/xe/xe_migrate: Cast to output precision before multiplying operandsHimal Prasad Ghimiray
Addressing potential overflow in result of multiplication of two lower precision (u32) operands before widening it to higher precision (u64). -v2 Fix commit message and description. (Rodrigo) Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240401175300.3823653-1-himal.prasad.ghimiray@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-03drm/i915/guc: Remove bogus null checkRodrigo Vivi
This null check is bogus because we are already using 'ce' stuff in many places before this function is called. Having this here is useless and confuses static analyzer tools that can see: struct intel_engine_cs *engine = ce->engine; before this check, in the same function. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/r/202403101225.7AheJhZJ-lkp@intel.com/ Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240328213107.90632-1-rodrigo.vivi@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-03drm/i915/mst: Reject FEC+MST on ICLVille Syrjälä
ICL supposedly doesn't support FEC on MST. Reject it. Cc: stable@vger.kernel.org Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path") Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-7-ville.syrjala@linux.intel.com (cherry picked from commit b648ce2a28ba83c4fa67c61fcc5983e15e9d4afb) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-03drm/i915/mst: Limit MST+DSC to TGL+Ville Syrjälä
The MST code currently assumes that glk+ already supports MST+DSC, which is incorrect. We need to check for TGL+ actually. ICL does support SST+DSC, but supposedly it can't do MST+FEC which will also rule out MST+DSC. Note that a straight TGL+ check doesn't work here because DSC support can get fused out, so we do need to also check 'has_dsc'. Cc: stable@vger.kernel.org Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path") Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-6-ville.syrjala@linux.intel.com (cherry picked from commit c9c92f286dbdf872390ef3e74dbe5f0641e46f55) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-03drm/i915/dp: Fix the computation for compressed_bpp for DISPLAY < 13Ankit Nautiyal
For DISPLAY < 13, compressed bpp is chosen from a list of supported compressed bpps. Fix the condition to choose the appropriate compressed bpp from the list. Fixes: 1c56e9a39833 ("drm/i915/dp: Get optimal link config to have best compressed bpp") Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: <stable@vger.kernel.org> # v6.7+ Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10162 Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240305054443.2489895-1-ankit.k.nautiyal@intel.com (cherry picked from commit 5a1da42b50f3594e18738885c2f23ed36629dd00) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-03drm/i915/gt: Enable only one CCS for compute workloadAndi Shyti
Enable only one CCS engine by default with all the compute sices allocated to it. While generating the list of UABI engines to be exposed to the user, exclude any additional CCS engines beyond the first instance. This change can be tested with igt i915_query. Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement") Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: Chris Wilson <chris.p.wilson@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: <stable@vger.kernel.org> # v6.2+ Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Acked-by: Michal Mrozek <michal.mrozek@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240328073409.674098-4-andi.shyti@linux.intel.com (cherry picked from commit 2bebae0112b117de7e8a7289277a4bd2403b9e17) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-03drm/i915/gt: Do not generate the command streamer for all the CCSAndi Shyti
We want a fixed load CCS balancing consisting in all slices sharing one single user engine. For this reason do not create the intel_engine_cs structure with its dedicated command streamer for CCS slices beyond the first. Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement") Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: Chris Wilson <chris.p.wilson@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: <stable@vger.kernel.org> # v6.2+ Acked-by: Michal Mrozek <michal.mrozek@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240328073409.674098-3-andi.shyti@linux.intel.com (cherry picked from commit c7a5aa4e57f88470313a8277eb299b221b86e3b1) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-03drm/i915/gt: Disable HW load balancing for CCSAndi Shyti
The hardware should not dynamically balance the load between CCS engines. Wa_14019159160 recommends disabling it across all platforms. Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement") Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: Chris Wilson <chris.p.wilson@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: <stable@vger.kernel.org> # v6.2+ Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Acked-by: Michal Mrozek <michal.mrozek@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240328073409.674098-2-andi.shyti@linux.intel.com (cherry picked from commit f5d2904cf814f20b79e3e4c1b24a4ccc2411b7e0) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-03drm/i915/gt: Limit the reserved VM space to only the platforms that need itAndi Shyti
Commit 9bb66c179f50 ("drm/i915: Reserve some kernel space per vm") reduces the available VM space of one page in order to apply Wa_16018031267 and Wa_16018063123. This page was reserved indiscrimitely in all platforms even when not needed. Limit it to DG2 onwards. Fixes: 9bb66c179f50 ("drm/i915: Reserve some kernel space per vm") Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: Andrzej Hajda <andrzej.hajda@intel.com> Cc: Chris Wilson <chris.p.wilson@linux.intel.com> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com> Cc: Nirmoy Das <nirmoy.das@intel.com> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Acked-by: Michal Mrozek <michal.mrozek@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240327200546.640108-1-andi.shyti@linux.intel.com (cherry picked from commit 9721634441d5dedba7f9eebb2bf0c9411cbafc4e) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-03drm/i915/psr: Fix intel_psr2_sel_fetch_et_alignment usageJouni Högander
Currently we are not aligning selective update area to cover cursor fully when cursor is not updated by itself but still in the selective update area. Fix this by checking cursor separately after drm_atomic_add_affected_planes. Bspec: 68927 Fixes: 1bff93b8bc27 ("drm/i915/psr: Extend SU area to cover cursor fully if needed") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240319123327.1661097-4-jouni.hogander@intel.com (cherry picked from commit d37b3dac68e26669f03f768b3afc9abc094c9ac9) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-03drm/i915/psr: Move writing early transport pipe srcJouni Högander
Currently PIPE_SRCSZ_ERLY_TPT is written in intel_display.c:intel_set_pipe_src_size. This doesn't work as intel_set_pipe_src_size is called only on modeset. Bspec: 68927 Fixes: 3291bbb93e16 ("drm/i915/psr: Configure PIPE_SRCSZ_ERLY_TPT for psr2 early transport") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240319123327.1661097-3-jouni.hogander@intel.com (cherry picked from commit b52c4093b0c9089b00b42823d41986a94d32e341) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-03drm/i915/psr: Calculate PIPE_SRCSZ_ERLY_TPT valueJouni Högander
When early transport is enabled we need to write PIPE_SRCSZ_ERLY_TPT on every flip doing selective update. This patch calculates PIPE_SRCSZ_ERLY_TPT same way as is done for PSR2_MAN_TRK_CTL value and stores i in intel_crtc_state->pipe_srcsz_early_tpt to be written later during flip. Bspec: 68927 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240319123327.1661097-2-jouni.hogander@intel.com (cherry picked from commit f3b899f0b4b17fa0b20e27c23f78604d5686383d) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-03drm/xe: Use ordered wq for preempt fence waitingMatthew Brost
Preempt fences can sleep waiting for an exec queue suspend operation to complete. If the system_unbound_wq is used for waiting and the number of waiters exceeds max_active this will result in other users of the system_unbound_wq getting starved. Use a device private work queue for preempt fences to avoid starvation of the system_unbound_wq. Even though suspend operations can complete out-of-order, all suspend operations within a VM need to complete before the preempt rebind worker can start. With that, use a device private ordered wq for preempt fence waiting. v2: - Add comment about cleanup on failure (Matt R) - Update commit message (Lucas) Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs") Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240401221913.139672-2-matthew.brost@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2024-04-03drm/i915: Use debugfs_create_bool() for "i915_bigjoiner_force_enable"Ville Syrjälä
There is no reason to make this debugfs file for a simple boolean so complicated. Just use debugfs_create_bool(). Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-8-ville.syrjala@linux.intel.com
2024-04-03drm/i915/mst: Reject FEC+MST on ICLVille Syrjälä
ICL supposedly doesn't support FEC on MST. Reject it. Cc: stable@vger.kernel.org Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path") Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-7-ville.syrjala@linux.intel.com
2024-04-03drm/i915/mst: Limit MST+DSC to TGL+Ville Syrjälä
The MST code currently assumes that glk+ already supports MST+DSC, which is incorrect. We need to check for TGL+ actually. ICL does support SST+DSC, but supposedly it can't do MST+FEC which will also rule out MST+DSC. Note that a straight TGL+ check doesn't work here because DSC support can get fused out, so we do need to also check 'has_dsc'. Cc: stable@vger.kernel.org Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path") Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-6-ville.syrjala@linux.intel.com
2024-04-03drm/i915: Extract glk_need_scaler_clock_gating_wa()Ville Syrjälä
Simplify our life by extracting the "do we need the glk scaler clock gating w/a?" check into a small helper. Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-5-ville.syrjala@linux.intel.com
2024-04-03drm/i915: Clean up glk_pipe_scaler_clock_gating_wa()Ville Syrjälä
glk_pipe_scaler_clock_gating_wa() is messy. Clean it up via intel_de_rmw(), and also just pass in the whole crtc so the caller doesn't have to dance around so much. Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-4-ville.syrjala@linux.intel.com
2024-04-03drm/i915: Shuffle DP .mode_valid() checksVille Syrjälä
Move some of the more trivial checks in the DP .mode_valid() hooks upwards to lessen the noise amongst the more complex checks. Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-3-ville.syrjala@linux.intel.com
2024-04-03drm/i915: Remove DRM_MODE_FLAG_DBLSCAN checks from .mode_valid() hooksVille Syrjälä
We never set connector->doublescan_allowed, so the probe helper already filters out all doublescan modes for us. Sadly we still need to keep the explicit doublescan checks in .compute_config as outlined in commit e4dd27aadd20 ("drm/i915: Allow DBLSCAN user modes with eDP/LVDS/DSI") Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-2-ville.syrjala@linux.intel.com
2024-04-03drm/panthor: Don't return NULL from panthor_vm_get_heap_pool()Harshit Mogalapalli
The kernel doc says this function returns either a valid pointer or an ERR_PTR(), but in practice this function can return NULL if create=false. Fix the function to match the doc (return ERR_PTR(-ENOENT) instead of NULL) and adjust all call-sites accordingly. Fixes: 4bdca1150792 ("drm/panthor: Add the driver frontend block") Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402141412.1707949-1-harshit.m.mogalapalli@oracle.com
2024-04-03drm/panthor: Fix NULL vs IS_ERR() bug in panthor_probe()Harshit Mogalapalli
The devm_drm_dev_alloc() function returns error pointers. Update the error handling to check for error pointers instead of NULL. Fixes: 4bdca1150792 ("drm/panthor: Add the driver frontend block") Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402104041.1689951-1-harshit.m.mogalapalli@oracle.com
2024-04-03drm/panthor: Fix off by one in panthor_fw_get_cs_iface()Dan Carpenter
The ->iface.streams[csg_slot][] array has MAX_CS_PER_CSG elements so this > comparison needs to be >= to prevent an out of bounds access. Fixes: 2718d91816ee ("drm/panthor: Add the FW logical block") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/62835c16-c85c-483d-a8fe-63be78d49d15@moroto.mountain
2024-04-03drm/panthor: Fix error code in panthor_gpu_init()Dan Carpenter
This code accidentally returns zero/success on error because of a typo. It should be "irq" instead of "ret". The other thing is that if platform_get_irq_byname() were to return zero then the error code would be cmplicated. Fortunately, it does not so we can just change <= to < 0. Fixes: 5cd894e258c4 ("drm/panthor: Add the GPU logical block") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/d753e684-43ee-45c2-a1fd-86222da204e1@moroto.mountain
2024-04-03drm/panthor: Fix a couple -ENOMEM error codesDan Carpenter
These error paths forgot to set the error code to -ENOMEM. Fixes: 647810ec2476 ("drm/panthor: Add the MMU/VM logical block") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/cf5bbba5-427e-4940-b91e-925f9fa71f8d@moroto.mountain
2024-04-03drm/panthor: Fix some kerneldoc warningsLiviu Dudau
When compiling with W=1 the build process will flag empty comments, misnamed documented variables and incorrect tagging of functions. Fix them in one go. Fixes: de8548813824 ("drm/panthor: Add the scheduler logical block") Cc: Boris Brezillon <boris.brezillon@collabora.com> Cc: Steven Price <steven.price@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402215423.360341-2-liviu.dudau@arm.com
2024-04-03drm/panthor: Cleanup unused variable 'cookie'Liviu Dudau
Commit 962f88b9c916 ("drm/panthor: Drop the dev_enter/exit() sections in _irq_suspend/resume()") removed the code that used the 'cookie' variable but left the declaration in place. Remove it. Fixes: 962f88b9c916 ("drm/panthor: Drop the dev_enter/exit() sections in _irq_suspend/resume()") Cc: Boris Brezillon <boris.brezillon@collabora.com> Cc: Steven Price <steven.price@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402215423.360341-1-liviu.dudau@arm.com
2024-04-03Revert "drm/i915/display: move dmc_firmware_path to display params"Jani Nikula
This reverts commit 0d82a0d6f5561af8dea7011d1b7cae510021723e. The commit failed to take into account that the parameter duplication and debugfs for char * parameters were subtly different between i915 core and display, and caused the DMC and PM to be disabled. Moreover, the patch was pushed with failing CI results. Revert, and get back to the drawing board. Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-04-02drm/xe/xe2: Add workaround 18033852989Himal Prasad Ghimiray
This workaround applies to RCS engine's context, hence added as LRC workaround. v2 - Fix commit description as lrc workaround instead of engine.(Lucas) v3 - COMMON_SLICE_CHICKEN1 is a masked register, add XE_REG_OPTION_MASKED flag. (Matt) BSPEC: 55899 Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240401163806.3821128-1-himal.prasad.ghimiray@intel.com
2024-04-02drm/xe: Normalize bo flags macrosLucas De Marchi
The flags stored in the BO grew over time without following much a naming pattern. First of all, get rid of the _BIT suffix that was banned from everywhere else due to the guideline in drivers/gpu/drm/i915/i915_reg.h that xe kind of follows: Define bits using ``REG_BIT(N)``. Do **not** add ``_BIT`` suffix to the name. Here the flags aren't for a register, but it's good practice to keep it consistent. Second divergence on names is the use or not of "CREATE". This is because most of the flags are passed to xe_bo_create*() family of functions, changing its behavior. However, since the flags are also stored in the bo itself and checked elsewhere in the code, it seems better to just omit the CREATE part. With those 2 guidelines, all the flags are given the form XE_BO_FLAG_<FLAG_NAME> with the following commands: git grep -le "XE_BO_" -- drivers/gpu/drm/xe | xargs sed -i \ -e "s/XE_BO_\([_A-Z0-9]*\)_BIT/XE_BO_\1/g" \ -e 's/XE_BO_CREATE_/XE_BO_FLAG_/g' git grep -le "XE_BO_" -- drivers/gpu/drm/xe | xargs sed -i -r \ -e 's/XE_BO_(DEFER_BACKING|SCANOUT|FIXED_PLACEMENT|PAGETABLE|NEEDS_CPU_ACCESS|NEEDS_UC|INTERNAL_TEST|INTERNAL_64K|GGTT_INVALIDATE)/XE_BO_FLAG_\1/g' And then the defines in drivers/gpu/drm/xe/xe_bo.h are adjusted to follow the coding style. Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240322142702.186529-3-lucas.demarchi@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2024-04-02drm/xe: Stop passing user flag to xe_bo_create_user()Lucas De Marchi
It's quite redundant to pass XE_BO_CREATE_USER_BIT to xe_bo_create_user() since the only difference of that function is to force that flag. Stop passing the flag in the few cases that were explicitly doing so. Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240322142702.186529-2-lucas.demarchi@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2024-04-02drm/i915/dp: Remove support for UHBR13.5Arun R Murthy
UHBR13.5 is not supported in MTL and also the DP2.1 spec says UHBR13.5 is optional. Hence removing UHBR135 from the supported link rates. v2: Reframed the commit message and added link to the issue. Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Fixes: 62618c7f117e ("drm/i915/mtl: C20 PLL programming") Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240228144350.3184930-1-arun.r.murthy@intel.com (cherry picked from commit ddf8a8bbb5643265883bab0c59adf0648422c4bb) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-02drm/i915/dp: Fix DSC state HW readout for SST connectorsImre Deak
Commit 0848814aa296 ("drm/i915/dp: Fix connector DSC HW state readout") moved the DSC HW state readout to a connector specific hook, however only added the hook for DP MST connectors, not for DP SST ones. Fix adding the hook for SST connectors as well. This fixes the following warn on platforms where BIOS enables DSC: [ 66.208601] i915 0000:00:02.0: drm_WARN_ON(!connector->dp.dsc_decompression_aux || !connector->dp.dsc_decompression_enabled) ... [ 66.209024] RIP: 0010:intel_dp_sink_disable_decompression+0x76/0x110 [i915] ... [ 66.209333] ? intel_dp_sink_disable_decompression+0x76/0x110 [i915] ... [ 66.210068] intel_disable_ddi+0x135/0x1d0 [i915] [ 66.210302] intel_encoders_disable+0x9b/0xc0 [i915] [ 66.210565] hsw_crtc_disable+0x153/0x170 [i915] [ 66.210823] intel_old_crtc_state_disables+0x52/0xb0 [i915] [ 66.211107] intel_atomic_commit_tail+0x5cf/0x1330 [i915] [ 66.211366] intel_atomic_commit+0x39d/0x3f0 [i915] [ 66.211612] ? intel_atomic_commit+0x39d/0x3f0 [i915] [ 66.211872] drm_atomic_commit+0x9d/0xd0 [drm] [ 66.211921] ? __pfx___drm_printfn_info+0x10/0x10 [drm] [ 66.211975] intel_initial_commit+0x1a8/0x260 [i915] [ 66.212234] intel_display_driver_probe+0x2a/0x80 [i915] [ 66.212479] i915_driver_probe+0x7c6/0xc60 [i915] [ 66.212664] ? drm_privacy_screen_get+0x168/0x190 [drm] [ 66.212711] i915_pci_probe+0xe2/0x1c0 [i915] Fixes: 0848814aa296 ("drm/i915/dp: Fix connector DSC HW state readout") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10410 Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240311145626.2454923-1-imre.deak@intel.com (cherry picked from commit 7a51a2aa2384ea8bee76698ae586a2bea5b8ddb5) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-02Merge drm/drm-next into drm-intel-nextRodrigo Vivi
Catching up on 6.9-rc2 Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-04-02drm/i915/psr: Do not write ALPM configuration for PSR1 or DP2.0 Panel ReplayJouni Högander
No need to write ALPM configuration for DP2.0 Panel Replay or PSR1. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240328141928.1311284-6-jouni.hogander@intel.com
2024-04-02drm/i915/psr: Enable ALPM on source side for eDP Panel replayJouni Högander
Enable ALPM AUX-Less on source side for Panel Replay eDP. Also write all calculated AUX-Less configuration values accordingly. Enabling it on sink side is in upcoming patch. Bspec: 71477 v5: - mention enable is only on source side in commit message v4: - add comment explaining why AUX less is enabled on eDP panel replay without any extra checks v3: - do not use alpm_ctl as uninitialized variable v2: - do not set AUX-Wake related bits for AUX-Less case - drop switch to active latency - add SLEEP_HOLD_TIME_50_SYMBOLS - add PORT_ALPM_CTL_MAX_PHY_SWING_HOLD Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240328141928.1311284-5-jouni.hogander@intel.com
2024-04-02drm/i915/psr: Silence period and lfps half cycleJouni Högander
Add get function for silence period and lfps half cycle. Values are taken from the tables in bspec. Bspec: 71632 v3: - use PORT_ALPM_CTL_SILENCE_PERIOD_MASK instead of value 255 - use PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION_MASK instead of value 31 v2: - fix some checks - add some more comments Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240328141928.1311284-4-jouni.hogander@intel.com
2024-04-02drm/i915/psr: Calculate aux less wake timeJouni Högander
Calculate aux less wake time and store it into alpm_params struct Bspec: 71477 v4: - re-use fast_wake_lines to store aux_less_wake_lines v3: - use ALPM_CTL_AUX_LESS_WAKE_TIME_MASK instead of value 63 v2: - use variables instead of values directly - fix max value - move converting port clock to Mhz into _lnl_compute_aux_less_wake_time Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240328141928.1311284-3-jouni.hogander@intel.com
2024-04-02drm/i915/psr: Add missing ALPM AUX-Less register definitionsJouni Högander
Couple of ALPM AUX-Less related fields are missing from ALPM register definitions. Add these and remove some duplicate definitions. Bspec: 70294 V2: add Bspec reference Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240328141928.1311284-2-jouni.hogander@intel.com
2024-04-02drm/ast: Automatically clean up poll helperThomas Zimmermann
Automatically clean up the conncetor-poll thread as part of the DRM device release. The new helper drmm_kms_helper_poll_init() provides a shared implementation for all drivers. v6: - fix kernel doc comment (Sui, kernel test robot) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Acked-by: Sui Jingfeng <sui.jingfeng@linux.dev> Link: https://patchwork.freedesktop.org/patch/msgid/20240325200855.21150-14-tzimmermann@suse.de
2024-04-02drm/ast: Implement polling for VGA and SIL164 connectorsThomas Zimmermann
Implement polling for VGA and SIL164 connectors. Set the flag DRM_CONNECTOR_POLL_DISCONNECT for each to detect the removal of the monitor cable. Implement struct drm_connector_helper_funcs.detect_ctx for each type of connector by testing for EDID data. The helper drm_connector_helper_detect_ctx() implements .detect_ctx() on top of the connector's DDC channel. The function can be used by other drivers as companion to drm_connector_helper_get_modes(). v6: - change helper name to drm_connector_helper_detec_from_ddc() (Maxime, Sui) v5: - share implementation in drm_connector_helper_detect_ctx() (Maxime) - test for DDC presence with drm_probe_ddc() (Maxime, Jani) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Acked-by: Sui Jingfeng <sui.jingfeng@linux.dev> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20240325200855.21150-13-tzimmermann@suse.de
2024-04-02drm/ast: Use drm_connector_helper_get_modes()Thomas Zimmermann
The .get_modes() code for VGA and SIL164 connectors does not depend on either type of connector. Replace the driver code with the common helper drm_connector_helper_get_modes(). It reads EDID data via DDC and updates the connector's EDID property. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Sui Jingfeng <sui.jingfeng@linux.dev> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240325200855.21150-12-tzimmermann@suse.de
generated by cgit (git 2.34.1) at 2025-09-28 20:31:25 +0000