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path: root/drivers/gpu
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2018-02-20drm/msm/hdmi: fix semicolon.cocci warningsFengguang Wu
Remove unneeded semicolon. Generated by: scripts/coccinelle/misc/semicolon.cocci CC: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm/mdp5: Fix trailing semicolonLuis de Bethencourt
The trailing semicolon is an empty statement that does no operation. Removing it since it doesn't do anything. Signed-off-by: Luis de Bethencourt <luisbg@kernel.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm/dsi: Add byte_intf_clkArchit Taneja
DSI6G v2.0+ blocks have a new clock input to them called byte_intf_clk. It's rate is to be set as byte_clk / 2. Within the clock controller (CC) subsystem, this clock is a child/descendant of the byte_clk. Set it up as an optional clock in the DSI host driver. Make sure that we enable/set its rate only after we configure byte_clk. This is required for the ancestor clocks in the CC to be configured correctly. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm/dsi: Add SDM845 in dsi_cfgArchit Taneja
SDM845 contains 2 DSI6G v2.2.1 host controllers. Add them in dsi_cfg. Cc: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm/dsi: Use msm_clk_get in dsi_get_configArchit Taneja
We try to get the interface clock in dsi_get_config early during DSI's component bind. Try getting both the "iface" and "iface_clk" clock name variants so that we are compatible with both new and legacy DT. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm/dsi: Populate the 10nm PHY funcsArchit Taneja
Populate the PHY ops with the downstream driver as reference. There are a couple of TODOs which need to be resolved: - The PHY timings are all hardcoded for now. This needs to be replaced with automatic calculations once we get/understand them. - There are some lane configuration registers which use a new representation between physical and logical lane mappings. For now, we've hardcoced them to follow the default mapping (i.e logical 0 -> phy 0, logical 1 -> phy 1 etc). Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm/dsi: Populate PLL 10nm clock opsArchit Taneja
Populate PLL clock ops from downstream. This contains the VCO PLL ops and the registration of standard clk_divider and clk_mux clocks. Unlike 14nm PLL, the postdividers/mux of the slave PLL doesn't need to be set to the same values of the postdivs/mux of the master PLL. Hence, we don't need special postdivider clock ops like we did with the 14nm PLL driver. Like the previous PLL drivers, the implementation is slightly different from downstream. We don't use shadow clocks, but have the ability to reparent the RCGs to a different source. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm/dsi: Add skeleton 10nm PHY/PLL codeArchit Taneja
Add new 10nm DSI PLL/PHY files that will be used on SDM845. Just populate empty pll/phy funcs for now. These will be filled up later. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm/dsi: Update generated headers for 10nm PLL/PHYArchit Taneja
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm: add sudo flag to submit ioctlRob Clark
This flags cause cmdstream to be executed from the ringbuffer (RB) instead of IB1. Normally not something you'd ever want to do, but it is super useful for firmware debugging. Hidden behind CAP_SYS_RAWIO and a default=n kconfig option which depends on EXPERT (and has a suitably scary warning), to prevent it from being used on accident. Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm: add a5xx specific debugfsRob Clark
Add some debugfs to dump out PFP and ME microcontroller state, as well as some of the queues (MEQ and ROQ). Also add a debugfs file to trigger a GPU reset (and reloading the firmware on next submit). Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm/dsi: check msm_dsi and dsi pointers before useLloyd Atkinson
Move null checks of pointer arguments to the beginning of the modeset init function since they are referenced immediately instead of after they have already been used. Signed-off-by: Lloyd Atkinson <latkinso@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm/dsi: correct DSI id bounds check during registrationLloyd Atkinson
Check DSI instance id argument against the proper boundary size to protect against invalid configuration of the DSI id. Signed-off-by: Lloyd Atkinson <latkinso@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/msm/dsi: check for failure on retrieving pll in dsi managerLloyd Atkinson
Make msm_dsi_pll_init consistently return an error code instead of NULL when pll initialization fails so that later pll retrieval can check against an error code. Add checks for these failures after retrieval of src_pll to avoid invalid pointer dereferences later in msm_dsi_pll_get_clk_provider. Signed-off-by: Lloyd Atkinson <latkinso@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-02-20drm/doc: Polish for drm_mode_parse_command_line_for_connectorDaniel Vetter
Quoting the module option format looks soo much nicer, and avoids sphinx spewing errors about markup issues. v2: Fix typo in commit message (Thierry). Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180219225356.24996-4-daniel.vetter@ffwll.ch
2018-02-20drm/docs: Document "scaling mode" property betterDaniel Vetter
Move it out of the csv dungeon. While at it add the missing link to the helper functions for setting up the "panel rotation" property. Also OCD how we list enum property values and their corresponding docs. Going for a nest definition list seams cleanest, no need for also making it an uordered list. Cc: Sean Paul <seanpaul@chromium.org> Cc: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180219225356.24996-3-daniel.vetter@ffwll.ch
2018-02-20drm/docs: Align layout of optional plane blending propertiesDaniel Vetter
Just a bit of drive-by OCD. All the other property docs use enumerations, for some nice visual consistency. It also neatly highlights the property name. Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20180219225356.24996-2-daniel.vetter@ffwll.ch
2018-02-20drm/i915: Track number of pending freed objectsChris Wilson
During igt, we frequently call into the driver to reset both HW and driver state (idling the device, waiting for it to become idle and freeing off old objects) to ensure that we start each test/subtest/pass from known state. This process incurs an RCU barrier or two to ensure that any such pending frees are indeed flushed before we return. However, unconditionally waiting on the RCU barrier adds needless delay to many callers, which adds up to several seconds when repeated thousands of times. We can skip the rcu_barrier() if by tracking how many outstanding frees we have, we know there are none. The same path is used along suspend, where we may be able to save the unconditional RCU barrier. To put it into perspective with a completely meaningless microbenchmark, igt/gem_sync/idle is improved from 50ms to 30us on bdw. v2: Remove the extra synchronize_rcu() inside i915_drop_caches_set() Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180219220631.25001-1-chris@chris-wilson.co.uk
2018-02-20drm/meson: fix vsync buffer updateNeil Armstrong
The plane buffer address/stride/height was incorrectly updated in the plane_atomic_update operation instead of the vsync irq. This patch delays this operation in the vsync irq along with the other plane delayed setup. This issue was masked using legacy framebuffer and X11 modesetting, but is clearly visible using gbm rendering when buffer is submitted late after vblank, like using software decoding and OpenGL rendering in Kodi. With this patch, tearing and other artifacts disappears completely. Cc: Michal Lazo <michal.lazo@gmail.com> Fixes: bbbe775ec5b5 ("drm: Add support for Amlogic Meson Graphic Controller") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/1518689976-23292-1-git-send-email-narmstrong@baylibre.com
2018-02-20drm: Handle unexpected holes in color-evictionChris Wilson
During eviction, the driver may free more than one hole in the drm_mm due to the side-effects in evicting the scanned nodes. However, drm_mm_scan_color_evict() expects that the scan result is the first available hole (in the mru freed hole_stack list): kernel BUG at drivers/gpu/drm/drm_mm.c:844! invalid opcode: 0000 [#1] PREEMPT SMP KASAN PTI Dumping ftrace buffer: (ftrace buffer empty) Modules linked in: i915 snd_hda_codec_analog snd_hda_codec_generic coretemp snd_hda_intel snd_hda_codec snd_hwdep snd_hda_core lpc_ich snd_pcm e1000e mei_me prime_numbers mei CPU: 1 PID: 1490 Comm: gem_userptr_bli Tainted: G U 4.16.0-rc1-g740f57c54ecf-kasan_6+ #1 Hardware name: Dell Inc. OptiPlex 755 /0PU052, BIOS A08 02/19/2008 RIP: 0010:drm_mm_scan_color_evict+0x2b8/0x3d0 RSP: 0018:ffff880057a573f8 EFLAGS: 00010287 RAX: ffff8800611f5980 RBX: ffff880057a575d0 RCX: dffffc0000000000 RDX: 00000000029d5000 RSI: 1ffff1000af4aec1 RDI: ffff8800611f5a10 RBP: ffff88005ab884d0 R08: ffff880057a57600 R09: 000000000afff000 R10: 1ffff1000b5710b5 R11: 0000000000001000 R12: 1ffff1000af4ae82 R13: ffff8800611f59b0 R14: ffff8800611f5980 R15: ffff880057a57608 FS: 00007f2de0c2e8c0(0000) GS:ffff88006ac40000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00007f2ddde1e000 CR3: 00000000609b2000 CR4: 00000000000006e0 Call Trace: ? drm_mm_scan_remove_block+0x330/0x330 ? drm_mm_scan_remove_block+0x151/0x330 i915_gem_evict_something+0x711/0xbd0 [i915] ? igt_evict_contexts+0x50/0x50 [i915] ? nop_clear_range+0x10/0x10 [i915] ? igt_evict_something+0x90/0x90 [i915] ? i915_gem_gtt_reserve+0x1a1/0x320 [i915] i915_gem_gtt_insert+0x237/0x400 [i915] __i915_vma_do_pin+0xc25/0x1a20 [i915] eb_lookup_vmas+0x1c63/0x3790 [i915] ? i915_gem_check_execbuffer+0x250/0x250 [i915] ? trace_hardirqs_on_caller+0x33f/0x590 ? _raw_spin_unlock_irqrestore+0x39/0x60 ? __pm_runtime_resume+0x7d/0xf0 i915_gem_do_execbuffer+0x86a/0x2ff0 [i915] ? __kmalloc+0x132/0x340 ? i915_gem_execbuffer2_ioctl+0x10f/0x760 [i915] ? drm_ioctl_kernel+0x12e/0x1c0 ? drm_ioctl+0x662/0x980 ? eb_relocate_slow+0xa90/0xa90 [i915] ? i915_gem_execbuffer2_ioctl+0x10f/0x760 [i915] ? __might_fault+0xea/0x1a0 i915_gem_execbuffer2_ioctl+0x3cc/0x760 [i915] ? i915_gem_execbuffer_ioctl+0xba0/0xba0 [i915] ? lock_acquire+0x3c0/0x3c0 ? i915_gem_execbuffer_ioctl+0xba0/0xba0 [i915] drm_ioctl_kernel+0x12e/0x1c0 drm_ioctl+0x662/0x980 ? i915_gem_execbuffer_ioctl+0xba0/0xba0 [i915] ? drm_getstats+0x20/0x20 ? debug_check_no_obj_freed+0x2a6/0x8c0 do_vfs_ioctl+0x170/0xe70 ? ioctl_preallocate+0x170/0x170 ? task_work_run+0xbe/0x160 ? lock_acquire+0x3c0/0x3c0 ? trace_hardirqs_on_caller+0x33f/0x590 ? _raw_spin_unlock_irq+0x2f/0x50 SyS_ioctl+0x36/0x70 ? do_vfs_ioctl+0xe70/0xe70 do_syscall_64+0x18c/0x5d0 entry_SYSCALL_64_after_hwframe+0x26/0x9b RIP: 0033:0x7f2ddf13b587 RSP: 002b:00007fff15c4f9d8 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 RAX: ffffffffffffffda RBX: 0000000000000003 RCX: 00007f2ddf13b587 RDX: 00007fff15c4fa20 RSI: 0000000040406469 RDI: 0000000000000003 RBP: 00007fff15c4fa20 R08: 0000000000000000 R09: 00007f2ddf3fe120 R10: 0000000000000073 R11: 0000000000000246 R12: 0000000040406469 R13: 0000000000000003 R14: 00007fff15c4fa20 R15: 00000000000000c7 Code: 00 00 00 4a c7 44 22 08 00 00 00 00 42 c7 44 22 10 00 00 00 00 48 81 c4 b8 00 00 00 5b 5d 41 5c 41 5d 41 5e 41 5f c3 0f 0b 0f 0b <0f> 0b 31 c0 eb c0 4c 89 ef e8 9a 09 41 ff e9 1e fe ff ff 4c 89 RIP: drm_mm_scan_color_evict+0x2b8/0x3d0 RSP: ffff880057a573f8 We can trivially relax this assumption by searching the hole_stack for the scan result and warn instead if the driver called us without any result. Fixes: 3fa489dabea9 ("drm: Apply tight eviction scanning to color_adjust") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: <stable@vger.kernel.org> # v4.11+ Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20180219113543.8010-1-chris@chris-wilson.co.uk
2018-02-20drm: simple_kms_helper: Add mode_valid() callback supportLinus Walleij
The PL111 needs to filter valid modes based on memory bandwidth. I guess it is a pretty simple operation, so we can still claim the DRM KMS helper pipeline is simple after adding this (optional) vtable callback. Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180220072859.3386-1-linus.walleij@linaro.org
2018-02-20drm: exynos: Use proper macro definition for HDMI_I2S_PIN_SEL_1Sylwester Nawrocki
Bit field [2:0] of HDMI_I2S_PIN_SEL_1 corresponds to SDATA_0, not SDATA_2. This patch removes redefinition of HDMI_I2S_SEL_DATA2 constant and adds missing HDMI_I2S_SEL_DATA0. The value of bit field selecting SDATA_1 (pin_sel_3) is also changed, so it is 3 as suggested in the Exynos TRMs. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-02-20drm/exynos: remove exynos_drm_rotator.hCorentin Labbe
Since its inclusion in 2012 via commit bea8a429d91a ("drm/exynos: add rotator ipp driver") this header is not used by any source files and is empty. Lets just remove it. Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-02-20drm/exynos: g2d: Delete an error message for a failed memory allocation in ↵Markus Elfring
two functions Omit an extra message for a memory allocation failure in these functions. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-02-20drm/exynos: fix comparison to bitshift when dealing with a maskWolfram Sang
Due to a typo, the mask was destroyed by a comparison instead of a bit shift. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-02-20drm/exynos: g2d: use monotonic timestampsArnd Bergmann
The exynos DRM driver uses real-time 'struct timeval' values for exporting its timestamps to user space. This has multiple problems: 1. signed seconds overflow in y2038 2. the 'struct timeval' definition is deprecated in the kernel 3. time may jump or go backwards after a 'settimeofday()' syscall 4. other DRM timestamps are in CLOCK_MONOTONIC domain, so they can't be compared 5. exporting microseconds requires a division by 1000, which may be slow on some architectures. The code existed in two places before, but the IPP portion was removed in 8ded59413ccc ("drm/exynos: ipp: Remove Exynos DRM IPP subsystem"), so we no longer need to worry about it. Ideally timestamps should just use 64-bit nanoseconds instead, but of course we can't change that now. Instead, this tries to address the first four points above by using monotonic 'timespec' values. According to Tobias Jakobi, user space doesn't care about the timestamp at the moment, so we can change the format. Even if there is something looking at them, it will work just fine with monotonic times as long as the application only looks at the relative values between two events. Link: https://patchwork.kernel.org/patch/10038593/ Cc: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-02-19drm/i915/: Initialise trans_min for skl_compute_transition_wm()Chris Wilson
clang spots drivers/gpu/drm/i915/intel_pm.c:4655:6: warning: variable 'trans_min' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized] if (INTEL_GEN(dev_priv) >= 10) but fortunately for us we skip the function unless on a gen10+ device. However, to keep the function generic in case we do want to re-enable it for gen9 again, initialise trans_min to 0. References: ca47667f523e ("drm/i915/gen10: Calculate and enable transition WM") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mahesh Kumar <mahesh1.kumar@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171115105036.1094-3-chris@chris-wilson.co.uk Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-02-19drm/i915: Clear the in-use marker on execbuf failureChris Wilson
If we fail to unbind the vma (due to a signal on an active buffer that needs to be moved for the next execbuf), then we need to clear the persistent tracking state we setup for this execbuf. Fixes: c7c6e46f913b ("drm/i915: Convert execbuf to use struct-of-array packing for critical fields") Testcase: igt/gem_fenced_exec_thrash/no-spare-fences-busy* Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: <stable@vger.kernel.org> # v4.14+ Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180219140144.24004-1-chris@chris-wilson.co.uk
2018-02-19drm/amdgpu/powerplay/smu7: drop refresh rate checks for mclk switchingAlex Deucher
The logic has moved to cgs. mclk switching with DC at higher refresh rates should work. Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <harry.wentland@amd.com>
2018-02-19drm/amdgpu/cgs: add refresh rate checking to non-DC display codeAlex Deucher
Clamp the vblank period to 0 if the refresh rate is larger than 120 hz for non-DC. This allows us to remove the refresh rate checks from powerplay for mclk switching. Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/powerplay/smu7: allow mclk switching with no displaysAlex Deucher
If there are no displays attached, there is no reason to disable mclk switching. Fixes mclks getting set to high when there are no displays attached. Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-02-19drm/amd/powerplay/vega10: allow mclk switching with no displaysAlex Deucher
If there are no displays attached, there is no reason to disable mclk switching. Fixes mclks getting set to high when there are no displays attached. Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-02-19drm/amd/powerplay: use PP_CAP macro for disable_mclk_switching_for_frame_lockAlex Deucher
Rather than open coding it. Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/powerplay: remove unused headersCorentin Labbe
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu_gem: fix error handling path in amdgpu_gem_va_update_vmGustavo A. R. Silva
Currently, if amdgpu_vm_bo_update() fails, the returned error is being ignored. Fix this by properly checking _r_ after calling amdgpu_vm_bo_update. Also, remove redundant code just before label _error_. Addresses-Coverity-ID: 1464280 ("Unused value") Fixes: 0abc6878fc2d ("drm/amdgpu: update VM PDs after the PTs") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: update the PASID mapping only on demandChristian König
Updating the PASID is rather heavyweight and shouldn't be done all the time. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: separate PASID mapping from VM flush v2Christian König
Stuffing the PASID mapping into the VM flush isn't flexible enough since the PASID mapping changes not as often as we need a VM flush. v2: add missing use of gmc_v7_0_emit_pasid_mapping Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Fix increment when sampling OTF in DCELeo (Sunpeng) Li
Previously, the number of software segmets per region was reduced to 16. This needs to be reflected in the sampling distance (increment) used when translating to the hardware format. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: De PQ implementationVitaly Prosyak
Some refactoring and optimizations in color module. Added de gamma 2.2 & 2.4, also re gamma 2.2. Added interface for diagnostic for de gamma & de pq. Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Remove unused dm_pp_ interfacesHarry Wentland
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Add logging for aux DPCD accessEric Yang
Add basic logging for DPCD access. Does not print by default. Currently only prints first byte of the data accessed. Technical debt: Need to make it so that the entire data block accessed is printed. Also need to log address space that's not DPCD. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Set vsc pack revision when DPCD revision is >= 1.2Tao
Brightness couldn't change when booting up in DC mode. It was because "psr_enabled" flag was not set to true before setting vsc packet revision, causing packet rev setup was skipped. Now instead of checking the psr flag, it checks if the DPCD_REV >= 1.2 and set the vsc packet revision. Signed-off-by: Tao <xtao@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: provide an interface to query firmware versionAnthony Koo
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Add missing Vega defines to dal_asic_idHarry Wentland
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Treat bad EDID as no EDIDEric Yang
We have an mst dock firmware that will emulate an EDID with bad checksum. v2: Tread -> Treat Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Remove duplicate entries from BIOS function tableKen Chalmers
Identical to the two entries above them. Signed-off-by: Ken Chalmers <ken.chalmers@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Make FBC work without fbdev emulationRoman Li
Previously, FBC dynamic allocation relied on connector modes populated during dm init. This is only the case if DRM_FBDEV_EMULATION config flag is enabled. Moving fbc allocation from dm_late_init() to amdgpu_dm_connector_get_modes() where actual modes init happens. Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Shirish Shankarappa <Shirish.S@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Remove delay on disconnect patchJohn Barberiz
HDMI HPD's generic solution makes the monitor patch code unnecessary so anything related has been removed. Signed-off-by: John Barberiz <jbarberi@amd.com> Reviewed-by: John Barberiz <jbarberi@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Skip 2 frames when first reading CRCLeo (Sunpeng) Li
Skipping the first frame will prevent uncoooked values most of the time. However, in some unlikely cases, the second frame will be uncooked as well. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Expose DCE110 CRC functions for DCE8Leo (Sunpeng) Li
Implement CRC for DCE8. Registers remain the same, so call DCE110 code directly. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-10-01 05:33:29 +0000