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path: root/drivers/mmc/host
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2024-09-05mmc: sdhci_am654: Add prints to tuning algorithmJudith Mendez
Add debug prints to tuning algorithm for debugging. Also add error print if we fail tuning. Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240904232512.830778-3-jm@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-09-05mmc: sdhci_am654: Add retry tuningJudith Mendez
Add retry tuning up to 10 times if we fail to find a failing region or no passing itapdly. This is necessary since some eMMC has been observed to never find a failing itapdly on the first couple of tuning iterations, but eventually does. Keep count of current tuning iteration using tuning_loop. It has been observed that the tuning algorithm does not need to loop more than 10 times before finding a failing itapdly. Signed-off-by: Judith Mendez <jm@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20240904232512.830778-2-jm@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-09-03mmc: cqhci: Make use of cqhci_halted() routineSeunghwan Baek
Make use of cqhci_halted() in couple places to avoid open-coding. Signed-off-by: Seunghwan Baek <sh8267.baek@samsung.com> Reviewed-by: Ritesh Harjani <ritesh.list@gmail.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20240829061823.3718-3-sh8267.baek@samsung.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-09-03mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v6.11-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.12. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-09-03mmc: cqhci: Fix checking of CQHCI_HALT stateSeunghwan Baek
To check if mmc cqe is in halt state, need to check set/clear of CQHCI_HALT bit. At this time, we need to check with &, not &&. Fixes: a4080225f51d ("mmc: cqhci: support for command queue enabled host") Cc: stable@vger.kernel.org Signed-off-by: Seunghwan Baek <sh8267.baek@samsung.com> Reviewed-by: Ritesh Harjani <ritesh.list@gmail.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20240829061823.3718-2-sh8267.baek@samsung.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-09-03mmc: dw_mmc-rockchip: Add support for rk3576 SoCsDetlev Casanova
On rk3576 the tunable clocks are inside the controller itself, removing the need for the "ciu-drive" and "ciu-sample" clocks. That makes it a new type of controller that has its own dt_parse function. Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/010201919997044d-c3a008d1-afbc-462f-a928-fc1ece785bdb-000000@eu-west-1.amazonses.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-09-03mmc: dw_mmc-rockchip: Add internal phase supportShawn Lin
Some Rockchip devices put the phase settings into the dw_mmc controller. When the feature is present, the ciu-drive and ciu-sample clocks are not used and the phase configuration is done directly through the mmc controller. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Acked-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/010201919996fdae-8a9f843e-00a8-4131-98bf-a9da4ed04bfd-000000@eu-west-1.amazonses.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-29dma-mapping: don't return errors from dma_set_max_seg_sizeChristoph Hellwig
A NULL dev->dma_parms indicates either a bus that is not DMA capable or grave bug in the implementation of the bus code. There isn't much the driver can do in terms of error handling for either case, so just warn and continue as DMA operations will fail anyway. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC
2024-08-28mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v6.11-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.12. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-28mmc: dw_mmc: Fix IDMAC operation with pages bigger than 4KSam Protsenko
Commit 616f87661792 ("mmc: pass queue_limits to blk_mq_alloc_disk") [1] revealed the long living issue in dw_mmc.c driver, existing since the time when it was first introduced in commit f95f3850f7a9 ("mmc: dw_mmc: Add Synopsys DesignWare mmc host driver."), also making kernel boot broken on platforms using dw_mmc driver with 16K or 64K pages enabled, with this message in dmesg: mmcblk: probe of mmc0:0001 failed with error -22 That's happening because mmc_blk_probe() fails when it calls blk_validate_limits() consequently, which returns the error due to failed max_segment_size check in this code: /* * The maximum segment size has an odd historic 64k default that * drivers probably should override. Just like the I/O size we * require drivers to at least handle a full page per segment. */ ... if (WARN_ON_ONCE(lim->max_segment_size < PAGE_SIZE)) return -EINVAL; In case when IDMAC (Internal DMA Controller) is used, dw_mmc.c always sets .max_seg_size to 4 KiB: mmc->max_seg_size = 0x1000; The comment in the code above explains why it's incorrect. Arnd suggested setting .max_seg_size to .max_req_size to fix it, which is also what some other drivers are doing: $ grep -rl 'max_seg_size.*=.*max_req_size' drivers/mmc/host/ | \ wc -l 18 This change is not only fixing the boot with 16K/64K pages, but also leads to a better MMC performance. The linear write performance was tested on E850-96 board (eMMC only), before commit [1] (where it's possible to boot with 16K/64K pages without this fix, to be able to do a comparison). It was tested with this command: # dd if=/dev/zero of=somefile bs=1M count=500 oflag=sync Test results are as follows: - 4K pages, .max_seg_size = 4 KiB: 94.2 MB/s - 4K pages, .max_seg_size = .max_req_size = 512 KiB: 96.9 MB/s - 16K pages, .max_seg_size = 4 KiB: 126 MB/s - 16K pages, .max_seg_size = .max_req_size = 2 MiB: 128 MB/s - 64K pages, .max_seg_size = 4 KiB: 138 MB/s - 64K pages, .max_seg_size = .max_req_size = 8 MiB: 138 MB/s Unfortunately, SD card controller is not enabled in E850-96 yet, so it wasn't possible for me to run the test on some cheap SD cards to check this patch's impact on those. But it's possible that this change might also reduce the writes count, thus improving SD/eMMC longevity. All credit for the analysis and the suggested solution goes to Arnd. [1] https://lore.kernel.org/all/20240215070300.2200308-18-hch@lst.de/ Fixes: f95f3850f7a9 ("mmc: dw_mmc: Add Synopsys DesignWare mmc host driver.") Suggested-by: Arnd Bergmann <arnd@arndb.de> Reported-by: Linux Kernel Functional Testing <lkft@linaro.org> Closes: https://lore.kernel.org/all/CA+G9fYtddf2Fd3be+YShHP6CmSDNcn0ptW8qg+stUKW+Cn0rjQ@mail.gmail.com/ Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20240306232052.21317-1-semen.protsenko@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-28mmc: sdhci-of-dwcmshc: Add hw_reset() support for BlueField-3 SoCLiming Sun
The eMMC RST_N register is implemented as secure register on the BlueField-3 SoC and controlled by TF-A. This commit adds the hw_reset() support which sends an SMC call to TF-A for the eMMC HW reset. Reviewed-by: David Thompson <davthompson@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Link: https://lore.kernel.org/r/20240827164016.237617-1-limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-28mmc: sdhci-of-aspeed: fix module autoloadingLiao Chen
Add MODULE_DEVICE_TABLE(), so modules could be properly autoloaded based on the alias from of_device_id table. Signed-off-by: Liao Chen <liaochen4@huawei.com> Acked-by: Andrew Jeffery <andrew@codeconstruct.com.au> Fixes: bb7b8ec62dfb ("mmc: sdhci-of-aspeed: Add support for the ASPEED SD controller") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20240826124851.379759-1-liaochen4@huawei.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-26mmc: mtk-sd: Improve data type in msdc_timeout_cal()Thorsten Blum
The local variable clk_ns uses at most 32 bits and can be a u32. Replace the 64-by-32 do_div() division with a standard divison. Since do_div() casts the divisor to u32 anyway, changing the data type of clk_ns to u32 also removes the following Coccinelle/coccicheck warning reported by do_div.cocci: WARNING: do_div() does a 64-by-32 division, please consider using div64_u64 instead Use min_t(u32,,) to simplify the code and improve its readability. Signed-off-by: Thorsten Blum <thorsten.blum@toblux.com> Link: https://lore.kernel.org/r/20240818142300.64156-2-thorsten.blum@toblux.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-26mmc: sdhci-of-dwcmshc: Add support for Sophgo SG2042Chen Wang
Add support for the mmc controller of Sophgo SG2042. SG2042 uses Synopsys PHY the same as TH1520 so we reuse the tuning logic from TH1520. Besides this, this patch implement some SG2042 specific work, such as clocks and reset ops. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/eb21847528a6487af54bb80f1ce94adff289cdb0.1722847198.git.unicorn_wang@outlook.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-26mmc: sdhci-of-dwcmshc: add dwcmshc_pltfm_dataChen Wang
Abstract dwcmshc_pltfm_data to hold the sdhci_pltfm_data plus some comoon operations of soc such as init/postinit. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Tested-by: Drew Fustini <drew@pdp7.com> # TH1520 Tested-by: Inochi Amaoto <inochiama@outlook.com> # Duo and Huashan Pi Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/cb2c68c594286e9588c53acb76163e60c140c02b.1722847198.git.unicorn_wang@outlook.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-26mmc: sdhci-of-dwcmshc: factor out code into dwcmshc_rk35xx_initChen Wang
Continue factor out code fron probe into dwcmshc_rk35xx_init. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Tested-by: Drew Fustini <drew@pdp7.com> # TH1520 Tested-by: Inochi Amaoto <inochiama@outlook.com> # Duo and Huashan Pi Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/4f1f2fa403ce7f0b4d79afb7d7e8a1690cde5d6c.1722847198.git.unicorn_wang@outlook.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-26mmc: sdhci-of-dwcmshc: factor out code for th1520_init()Chen Wang
Different socs have initialization operations in the probe process, which are summarized as functions. This patch first factor out init function for th1520. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Drew Fustini <drew@pdp7.com> Tested-by: Drew Fustini <drew@pdp7.com> # TH1520 Tested-by: Inochi Amaoto <inochiama@outlook.com> # Duo and Huashan Pi Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/23c6a81052a6dd3660d60348731229d60a209b32.1722847198.git.unicorn_wang@outlook.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-26mmc: sdhci-of-dwcmshc: move two rk35xx functionsChen Wang
This patch just move dwcmshc_rk35xx_init() and dwcmshc_rk35xx_postinit() to put the functions of rk35xx together as much as possible. This change is an intermediate process before further modification. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Tested-by: Drew Fustini <drew@pdp7.com> # TH1520 Tested-by: Inochi Amaoto <inochiama@outlook.com> # Duo and Huashan Pi Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/54204702d5febd3e867eb3544c36919fe4140a88.1722847198.git.unicorn_wang@outlook.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-26mmc: sdhci-of-dwcmshc: add common bulk optional clocks supportChen Wang
In addition to the required core clock and optional bus clock, the soc will expand its own clocks, so the bulk clock mechanism is abstracted. Note, I call the bulk clocks as "other clocks" due to the bus clock has been called as "optional". Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Tested-by: Drew Fustini <drew@pdp7.com> # TH1520 Tested-by: Inochi Amaoto <inochiama@outlook.com> # Duo and Huashan Pi Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/e57e8c51da81f176b49608269a884f840903e78e.1722847198.git.unicorn_wang@outlook.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-26mmc: renesas_sdhi: Add RZ/V2H(P) compatible stringLad Prabhakar
The SD/MMC block on the RZ/V2H(P) ("R9A09G057") SoC is similar to that of the R-Car Gen3, but it has some differences: - HS400 is not supported. - It has additional SD_STATUS register to control voltage, power enable and reset. - It supports fixed address mode. To accommodate these differences, a SoC-specific 'renesas,sdhi-r9a09g057' compatible string is added. Note for RZ/V2H(P), we are using the `of_rzg2l_compatible` OF data as it already handles no HS400 and fixed address mode support. Since the SDxIOVS and SDxPWEN pins can always be used as GPIO pins on the RZ/V2H(P) SoC, no driver changes are done to control the SD_STATUS register. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20240724182119.652080-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-26mmc: tmio: Use MMC core APIs to control the vqmmc regulatorLad Prabhakar
Use the mmc_regulator_enable_vqmmc() and mmc_regulator_disable_vqmmc() APIs to enable/disable the vqmmc regulator. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S Link: https://lore.kernel.org/r/20240724182119.652080-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-26mmc: sdhci-pxav2: Remove unnecessary null pointer checkDoug Brown
There is no need to check for a null mrq->cmd in pxav1_request_done. mmc_request_done already assumes it's not null, and it's always called in this path by every SDHCI driver. This was caught by Smatch. Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/all/9ddaef2a-05bb-4fe7-98c5-da40a0813027@stanley.mountain/ Signed-off-by: Doug Brown <doug@schmorgal.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20240714155510.48880-1-doug@schmorgal.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-26mmc: sdhci-of-ma35d1: Add Nuvoton MA35D1 SDHCI driverShan-Chun Hung
Add the SDHCI driver for the MA35D1 platform. It is based upon the SDHCI interface, but requires some extra initialization. Signed-off-by: Shan-Chun Hung <shanchun1218@gmail.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20240716004527.20378-3-shanchun1218@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-20mmc: dw_mmc: allow biu and ciu clocks to deferBen Whitten
Fix a race condition if the clock provider comes up after mmc is probed, this causes mmc to fail without retrying. When given the DEFER error from the clk source, pass it on up the chain. Fixes: f90a0612f0e1 ("mmc: dw_mmc: lookup for optional biu and ciu clocks") Signed-off-by: Ben Whitten <ben.whitten@gmail.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20240811212212.123255-1-ben.whitten@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-08-01mmc: mtk-sd: receive cmd8 data when hs400 tuning failMengqi Zhang
When we use cmd8 as the tuning command in hs400 mode, the command response sent back by some eMMC devices cannot be correctly sampled by MTK eMMC controller at some weak sample timing. In this case, command timeout error may occur. So we must receive the following data to make sure the next cmd8 send correctly. Signed-off-by: Mengqi Zhang <mengqi.zhang@mediatek.com> Fixes: c4ac38c6539b ("mmc: mtk-sd: Add HS400 online tuning support") Cc: stable@vger.stable.com Link: https://lore.kernel.org/r/20240716013704.10578-1-mengqi.zhang@mediatek.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-07-17Merge tag 'mfd-next-6.11' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers: - ROHM BD96801 Power Management IC - Cirrus Logic CS40L50 Haptic Driver with Waveform Memory - Marvell 88PM886 Power Management IC New Device Support: - Keyboard Backlight to ChromeOS Embedded Controller - LEDs to ChromeOS Embedded Controller - Charge Control to ChromeOS Embedded Controller - HW Monitoring Service to ChromeOS Embedded Controller - AUXADCs to MediaTek MT635{7,8,9} Power Management ICs New Functionality: - Allow Syscon consumers to supply their own Regmaps on registration Fix-ups: - Constify/staticise applicable data structures - Remove superfluous/duplicated/unused sections - Device Tree binding adaptions/conversions/creation - Trivial; spelling, whitespace, coding-style adaptions - Utilise centrally provided helpers and macros to aid simplicity/duplication - Drop i2c_device_id::driver_data where the value is unused - Replace ACPI/DT firmware helpers with agnostic variants - Move over to GPIOD (descriptor-based) APIs - Annotate a bunch of __counted_by() cases - Straighten out some includes Bug Fixes: - Ensure potentially asserted recent lines are deasserted during initialisation - Avoid "<module>.ko is added to multiple modules" warnings - Supply a bunch of MODULE_DESCRIPTIONs to silence modpost warnings - Fix Wvoid-pointer-to-enum-cast warnings" * tag 'mfd-next-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (87 commits) mfd: timberdale: Attach device properties to TSC2007 board info mfd: tmio: Move header to platform_data mfd: tmio: Sanitize comments mfd: tmio: Update include files mmc: tmio/sdhi: Fix includes mfd: tmio: Remove obsolete io accessors mfd: tmio: Remove obsolete platform_data watchdog: bd96801_wdt: Add missing include for FIELD_*() dt-bindings: mfd: syscon: Add APM poweroff mailbox dt-bindings: mfd: syscon: Split and enforce documenting MFD children dt-bindings: mfd: rk817: Merge support for RK809 dt-bindings: mfd: rk817: Fixup clocks and reference dai-common dt-bindings: mfd: syscon: Add TI's opp table compatible mfd: omap-usb-tll: Use struct_size to allocate tll dt-bindings: mfd: Explain lack of child dependency in simple-mfd dt-bindings: mfd: Dual licensing for st,stpmic1 bindings mfd: omap-usb-tll: Annotate struct usbtll_omap with __counted_by mfd: tps6594-core: Remove unneeded semicolon in tps6594_check_crc_mode() mfd: lm3533: Move to new GPIO descriptor-based APIs mfd: tps65912: Use devm helper functions to simplify probe ...
2024-07-12mmc: sdhci-esdhc-imx: obtain the 'per' clock rate after its enablementCiprian Costea
The I.MX SDHCI driver assumes that the frequency of the 'per' clock can be obtained even on disabled clocks, which is not always the case. According to 'clk_get_rate' documentation, it is only valid once the clock source has been enabled. Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com> Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20240708121018.246476-3-ciprianmarian.costea@oss.nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-07-12mmc: sdhci-esdhc-imx: disable card detect wake for S32G based platformsCiprian Costea
In case of S32G based platforms, GPIO CD used for card detect wake mechanism is not available. For this scenario the newly introduced flag 'ESDHC_FLAG_SKIP_CD_WAKE' is used. Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com> Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20240708121018.246476-2-ciprianmarian.costea@oss.nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-07-11mmc: davinci_mmc: report all possible bus widthsBastien Curutchet
A dev_info() at probe's end() report the supported bus width. It never reports 8-bits width while the driver can handle it. Update the info message at then end of the probe to report the use of 8-bits data when needed. Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com> Link: https://lore.kernel.org/r/20240711081838.47256-3-bastien.curutchet@bootlin.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-07-11mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v6.10-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.11. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-07-11mmc: davinci_mmc: Prevent transmitted data size from exceeding sgm's lengthBastien Curutchet
No check is done on the size of the data to be transmiited. This causes a kernel panic when this size exceeds the sg_miter's length. Limit the number of transmitted bytes to sgm->length. Cc: stable@vger.kernel.org Fixes: ed01d210fd91 ("mmc: davinci_mmc: Use sg_miter for PIO") Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com> Link: https://lore.kernel.org/r/20240711081838.47256-2-bastien.curutchet@bootlin.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-07-11mmc: sdhci: Fix max_seg_size for 64KiB PAGE_SIZEAdrian Hunter
blk_queue_max_segment_size() ensured: if (max_size < PAGE_SIZE) max_size = PAGE_SIZE; whereas: blk_validate_limits() makes it an error: if (WARN_ON_ONCE(lim->max_segment_size < PAGE_SIZE)) return -EINVAL; The change from one to the other, exposed sdhci which was setting maximum segment size too low in some circumstances. Fix the maximum segment size when it is too low. Fixes: 616f87661792 ("mmc: pass queue_limits to blk_mq_alloc_disk") Cc: stable@vger.kernel.org Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Acked-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/20240710180737.142504-1-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-07-09mfd: tmio: Move header to platform_dataWolfram Sang
All the MFD components are gone from the header meanwhile. Only the MMC relevant data is left which makes it a platform_data for the MMC controller. Move the header to the now fitting directory. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC Acked-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240213220221.2380-14-wsa+renesas@sang-engineering.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-07-09mmc: tmio/sdhi: Fix includesWolfram Sang
TMIO uses an of_* function, and SDHI uses pm_runtime functions. Add the includes directly, so we can clean up another header properly. Sort the pagemap include while we are here. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202402070323.JpYfFtkQ-lkp@intel.com/ Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240213220221.2380-11-wsa+renesas@sang-engineering.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-07-08mmc: dw_mmc-bluefield: Add support for eMMC HW resetLiming Sun
The eMMC RST_N register is implemented as secure register on the BlueField SoC and controlled by TF-A. This commit sends an SMC call to TF-A for the eMMC HW reset. Reviewed-by: David Thompson <davthompson@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Link: https://lore.kernel.org/r/2c459196c6867e325f9386ec0559efea464cfdd6.1718213918.git.limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-07-08mmc: dw_mmc: Add support for platform specific eMMC HW resetLiming Sun
This commit adds a new callback to allow drivers to support platform specific eMMC HW reset. Reviewed-by: David Thompson <davthompson@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Link: https://lore.kernel.org/r/3df02ffa8bdaa74f5261c8914d2545b97fb3478a.1718213918.git.limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-07-08mmc: sdhci_am654: Constify struct regmap_configJavier Carrasco
`sdhci_am654_regmap_config` is not modified and can be declared as const to move its data to a read-only section. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20240705-sdhci_am654-const-regmap_config-v1-1-c166a8d48a66@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-07-08mmc: Convert from tasklet to BH workqueueAllen Pais
The only generic interface to execute asynchronously in the BH context is tasklet; however, it's marked deprecated and has some design flaws. To replace tasklets, BH workqueue support was recently added. A BH workqueue behaves similarly to regular workqueues except that the queued work items are executed in the BH context. This patch converts drivers/mmc/* from tasklet to BH workqueue. Based on the work done by Tejun Heo <tj@kernel.org> Tested-by: Christian Loehle <christian.loehle@arm.com> Tested-by: Aubin Constans <aubin.constans@microchip.com> Acked-by: Aubin Constans <aubin.constans@microchip.com> Acked-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Christian Loehle <christian.loehle@arm.com> Signed-off-by: Allen Pais <allen.lkml@gmail.com> Link: https://lore.kernel.org/r/20240701100736.4001658-1-allen.lkml@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-07-08mmc: sdhi: Convert from tasklet to BH workqueueAllen Pais
The only generic interface to execute asynchronously in the BH context is tasklet; however, it's marked deprecated and has some design flaws. To replace tasklets, BH workqueue support was recently added. A BH workqueue behaves similarly to regular workqueues except that the queued work items are executed in the BH context. This patch converts the SDHI driver from tasklet to BH workqueue. Based on the work done by Tejun Heo <tj@kernel.org> Signed-off-by: Allen Pais <allen.lkml@gmail.com> [wsa: fixed build faliures, corrected whitespace issues] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20240626085015.32171-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-07-08mmc: mmc_spi: allow for spi controllers incapable of getting as low as 400kConor Dooley
Some controllers may not be able to reach a bus clock as low as 400 KHz due to a lack of sufficient divisors. In these cases, the SD card slot becomes non-functional as Linux continuously attempts to set the bus clock to 400 KHz. If the controller is incapable of getting that low, set its minimum frequency instead. While this may eliminate some SD cards, it allows those capable of operating at the controller's minimum frequency to be used. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240625-gigantic-frown-1ef4afa3e6fa@wendy Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-06-24mmc: tmio: Remove obsolete .set_pwr() callback()Geert Uytterhoeven
Commit ca78476e4888f1f1 ("mfd: Remove toshiba tmio drivers") removed the last users of the .set_pwr() callback in the tmio_mmc_data structure. Remove the callback, and all related infrastructure. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Lee Jones <lee@kernel.org> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/fbbc13ddd19df2c40933ffa3b82fb14841bf1d4c.1718897545.git.geert+renesas@glider.be
2024-06-24mmc: sdhci-brcmstb: Add ARCH_BCM2835 optionPeter Robinson
The Raspberry Pi devices have to date all used ARCH_BCM2835 as their SoC arch dependency so configurations that use this and not BRCMSTB won't end up with this module in their config. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/20240620074248.152353-1-pbrobinson@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-06-20mmc: sdhci: Eliminate SDHCI_QUIRK_UNSTABLE_RO_DETECTAdrian Hunter
SDHCI_QUIRK_UNSTABLE_RO_DETECT is used by only one driver variant. It was added in 2011 by commit 82b0e23a295c ("mmc: sdhci: Fix read-only detection with JMicron 388 chip"). Simplify sdhci by moving the logic to the only place it is used. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20240614080051.4005-4-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-06-20mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v6.10-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.11. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-06-20mmc: sdhci: Do not lock spinlock around mmc_gpio_get_ro()Adrian Hunter
sdhci_check_ro() can call mmc_gpio_get_ro() while holding the sdhci host->lock spinlock. That would be a problem if the GPIO access done by mmc_gpio_get_ro() needed to sleep. However, host->lock is not needed anyway. The mmc core ensures that host operations do not race with each other, and asynchronous callbacks like the interrupt handler, software timeouts, completion work etc, cannot affect sdhci_check_ro(). So remove the locking. Fixes: 6d5cd068ee59 ("mmc: sdhci: use WP GPIO in sdhci_check_ro()") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20240614080051.4005-3-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-06-20mmc: sdhci: Do not invert write-protect twiceAdrian Hunter
mmc_of_parse() reads device property "wp-inverted" and sets MMC_CAP2_RO_ACTIVE_HIGH if it is true. MMC_CAP2_RO_ACTIVE_HIGH is used to invert a write-protect (AKA read-only) GPIO value. sdhci_get_property() also reads "wp-inverted" and sets SDHCI_QUIRK_INVERTED_WRITE_PROTECT which is used to invert the write-protect value as well but also acts upon a value read out from the SDHCI_PRESENT_STATE register. Many drivers call both mmc_of_parse() and sdhci_get_property(), so that both MMC_CAP2_RO_ACTIVE_HIGH and SDHCI_QUIRK_INVERTED_WRITE_PROTECT will be set if the controller has device property "wp-inverted". Amend the logic in sdhci_check_ro() to allow for that possibility, so that the write-protect value is not inverted twice. Also do not invert the value if it is a negative error value. Note that callers treat an error the same as not-write-protected, so the result is functionally the same in that case. Also do not invert the value if sdhci host operation ->get_ro() is used. None of the users of that callback set SDHCI_QUIRK_INVERTED_WRITE_PROTECT directly or indirectly, but two do call mmc_gpio_get_ro(), so leave it to them to deal with that if they ever set SDHCI_QUIRK_INVERTED_WRITE_PROTECT in the future. Fixes: 6d5cd068ee59 ("mmc: sdhci: use WP GPIO in sdhci_check_ro()") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20240614080051.4005-2-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-06-20mmc: add missing MODULE_DESCRIPTION() macrosJeff Johnson
make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mmc/host/of_mmc_spi.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mmc/host/tmio_mmc_core.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mmc/host/renesas_sdhi_core.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mmc/core/mmc_core.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mmc/core/pwrseq_simple.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mmc/core/pwrseq_sd8787.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mmc/core/pwrseq_emmc.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mmc/core/sdio_uart.o Add the missing invocations of the MODULE_DESCRIPTION() macro. Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> # for TMIO and SDHI Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20240611-md-drivers-mmc-v2-1-2ef2cbcdc061@quicinc.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-06-20mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v6.10-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.11. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-06-20mmc: sdhci-of-dwcmshc: set CQE irq-handler for rockchip variantsHeiko Stuebner
The dwcmshc used on Rockchip rk3568 and rk3588 can use cqe, so set the needed irq handler. Tested on a rk3588-tiger SoM with dd, hdparm and fio. fio performance does increase slightly from Run status group 0 (all jobs): READ: bw=209MiB/s (219MB/s), 209MiB/s-209MiB/s (219MB/s-219MB/s), io=4096MiB (4295MB), run=19607-19607msec without CQE to Run status group 0 (all jobs): READ: bw=215MiB/s (225MB/s), 215MiB/s-215MiB/s (225MB/s-225MB/s), io=4096MiB (4295MB), run=19062-19062msec with CQE enabled. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20240530215547.2192457-1-heiko@sntech.de Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-06-20mmc: sdhci-brcmstb: Add BCM2712 supportAndrea della Porta
Broadcom BCM2712 SoC has an SDHCI card controller using the SDIO CFG register block present on other STB chips. Add support for BCM2712 SD capabilities of this chipset. The silicon is SD Express capable but this driver port does not currently include that feature yet. Based on downstream driver by raspberry foundation maintained kernel. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Reviewed-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/ad2ec39c62c2783dd5de4bf2ec581866e822e2b1.1717061147.git.andrea.porta@suse.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
generated by cgit (git 2.34.1) at 2025-09-24 13:08:03 +0000