summaryrefslogtreecommitdiff
path: root/drivers/net/ethernet
AgeCommit message (Collapse)Author
2020-03-08cxgb4/chcr: Add ipv6 support and statisticsRohit Maheshwari
Adding ipv6 support and ktls related statistics. v1->v2: - added blank lines at 2 places. v3->v4: - Replaced atomic_t with atomic64_t - added few necessary stat counters. Signed-off-by: Rohit Maheshwari <rohitm@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-08cxgb4/chcr: complete record tx handlingRohit Maheshwari
Added tx handling in this patch. This includes handling of segments contain single complete record. v1->v2: - chcr_write_cpl_set_tcb_ulp is added in this patch. v3->v4: - mss calculation logic. - replaced kfree_skb with dev_kfree_skb_any. - corrected error message reported by kbuild test robot <lkp@intel.com> Signed-off-by: Rohit Maheshwari <rohitm@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-08cxgb4/chcr: Save tx keys and handle HW responseRohit Maheshwari
As part of this patch generated and saved crypto keys, handled HW response of act_open_req and set_tcb_req. Defined connection state update. v1->v2: - optimized tcb update using control queue. - state machine handling when earlier states received. v2->v3: - Added one empty line after function declaration. Signed-off-by: Rohit Maheshwari <rohitm@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-08cxgb4/chcr : Register to tls add and del callbackRohit Maheshwari
A new macro is defined to enable ktls tx offload support on Chelsio T6 adapter. And if this macro is enabled, cxgb4 will send mailbox to enable or disable ktls settings on HW. In chcr, enabled tx offload flag in netdev and registered tls_dev_add and tls_dev_del. v1->v2: - mark tcb state to close in tls_dev_del. - u_ctx is now picked from adapter structure. - clear atid in case of failure. - corrected ULP_CRYPTO_KTLS_INLINE value. v2->v3: - add empty line after variable declaration. - local variable declaration in reverse christmas tree ordering. Signed-off-by: Rohit Maheshwari <rohitm@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-08flow_offload: introduce "disabled" HW stats type and allow it in mlxswJiri Pirko
Introduce new type for disabled HW stats and allow the value in mlxsw offload. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-08mlxsw: spectrum_acl: Ask device for rule stats only if counter was createdJiri Pirko
Set a flag in case rule counter was created. Only query the device for stats of a rule, which has the valid counter assigned. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-08flow_offload: introduce "delayed" HW stats type and allow it in mlx5Jiri Pirko
Introduce new type for delayed HW stats and allow the value in mlx5 offload. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-08flow_offload: introduce "immediate" HW stats type and allow it in mlxswJiri Pirko
Introduce new type for immediate HW stats and allow the value in mlxsw offload. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-08mlxsw: restrict supported HW stats type to "any"Jiri Pirko
Currently don't allow actions with any other type to be inserted. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-08mlxsw: spectrum_flower: Do not allow mixing HW stats types for actionsJiri Pirko
As there is one set of counters for the whole action chain, forbid to mix the HW stats types. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-08flow_offload: check for basic action hw stats typeJiri Pirko
Introduce flow_action_basic_hw_stats_types_check() helper and use it in drivers. That sanitizes the drivers which do not have support for action HW stats types. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-08ocelot_flower: use flow_offload_has_one_action() helperJiri Pirko
Instead of directly checking number of action entries, use flow_offload_has_one_action() helper. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Acked-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-07net/mlx5: Introduce TLS and IPSec objects enumsSaeed Mahameed
Expose the TLS encryption key general object type enum correctly, and add the IPSec encryption key general object type enum. Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-03-06ionic: fix vf op lock usageShannon Nelson
These are a couple of read locks that should be write locks. Fixes: fbb39807e9ae ("ionic: support sr-iov operations") Signed-off-by: Shannon Nelson <snelson@pensando.io> Reviewed-by: Parav Pandit <parav@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-06dpaa_eth: FMan erratum A050385 workaroundMadalin Bucur
Align buffers, data start, SG fragment length to avoid DMA splits. These changes prevent the A050385 erratum to manifest itself: FMAN DMA read or writes under heavy traffic load may cause FMAN internal resource leak; thus stopping further packet processing. The FMAN internal queue can overflow when FMAN splits single read or write transactions into multiple smaller transactions such that more than 17 AXI transactions are in flight from FMAN to interconnect. When the FMAN internal queue overflows, it can stall further packet processing. The issue can occur with any one of the following three conditions: 1. FMAN AXI transaction crosses 4K address boundary (Errata A010022) 2. FMAN DMA address for an AXI transaction is not 16 byte aligned, i.e. the last 4 bits of an address are non-zero 3. Scatter Gather (SG) frames have more than one SG buffer in the SG list and any one of the buffers, except the last buffer in the SG list has data size that is not a multiple of 16 bytes, i.e., other than 16, 32, 48, 64, etc. With any one of the above three conditions present, there is likelihood of stalled FMAN packet processing, especially under stress with multiple ports injecting line-rate traffic. To avoid situations that stall FMAN packet processing, all of the above three conditions must be avoided; therefore, configure the system with the following rules: 1. Frame buffers must not span a 4KB address boundary, unless the frame start address is 256 byte aligned 2. All FMAN DMA start addresses (for example, BMAN buffer address, FD[address] + FD[offset]) are 16B aligned 3. SG table and buffer addresses are 16B aligned and the size of SG buffers are multiple of 16 bytes, except for the last SG buffer that can be of any size. Additional workaround notes: - Address alignment of 64 bytes is recommended for maximally efficient system bus transactions (although 16 byte alignment is sufficient to avoid the stall condition) - To support frame sizes that are larger than 4K bytes, there are two options: 1. Large single buffer frames that span a 4KB page boundary can be converted into SG frames to avoid transaction splits at the 4KB boundary, 2. Align the large single buffer to 256B address boundaries, ensure that the frame address plus offset is 256B aligned. - If software generated SG frames have buffers that are unaligned and with random non-multiple of 16 byte lengths, before transmitting such frames via FMAN, frames will need to be copied into a new single buffer or multiple buffer SG frame that is compliant with the three rules listed above. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-06fsl/fman: detect FMan erratum A050385Madalin Bucur
Detect the presence of the A050385 erratum. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05nfp: Use pci_get_dsn()Jacob Keller
Use the newly added pci_get_dsn() function for obtaining the 64-bit Device Serial Number in the nfp6000_read_serial and nfp_6000_get_interface functions. pci_get_dsn() reports the Device Serial number as a u64 value created by combining two pci_read_config_dword functions. The lower 16 bits represent the device interface value, and the next 48 bits represent the serial value. Use put_unaligned_be32 and put_unaligned_be16 to convert the serial value portion into a Big Endian formatted serial u8 array. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Cc: Jakub Kicinski <kuba@kernel.org> Reviewed-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05ixgbe: Use pci_get_dsn()Jacob Keller
Replace the open-coded implementation for reading the PCIe DSN with pci_get_dsn(). The original code used a simple for-loop to read the bytes in order into a buffer one byte at a time. The pci_get_dsn() function returns the DSN as a u64, correctly ordering the upper and lower 32 bit dwords. Simplify the display code by using %016llX to display the u64 DSN. This should have equivalent behavior on both Little and Big Endian systems. The bus will have correctly ordered the dwords in the CPU endian format, while pci_get_dsn() will correctly order the lower and higher dwords into a u64. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05ice: Use pci_get_dsn()Jacob Keller
Replace the open-coded implementation for reading the PCIe DSN with pci_get_dsn(). The pci_get_dsn() function will perform two pci_read_config_dword calls to read the lower and upper config dwords. It bitwise ORs them into a u64 value. Instead of using put_unaligned_le32 to convert the value to LE32 format, just use the %016llX printf specifier. This will print the u64 correct, putting the most significant byte of the value first. Since pci_get_dsn() correctly orders the two dwords into a u64, this should produce equivalent results in less code. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05bnxt_en: Use pci_get_dsn()Jacob Keller
Replace the open-coded implementation for reading the PCIe DSN with pci_get_dsn(). Use of put_unaligned_le64 should be correct. pci_get_dsn() will perform two pci_read_config_dword calls. The first dword will be placed in the first 32 bits of the u64, while the second dword will be placed in the upper 32 bits of the u64. On Little Endian systems, the least significant byte comes first, which will be the least significant byte of the first dword, followed by the least significant byte of the second dword. Since the _le32 variations do not perform byte swapping, we will correctly copy the dwords into the dsn[] array in the same order as before. On Big Endian systems, the most significant byte of the second dword will come first. put_unaligned_le64 will perform a CPU_TO_LE64, which will swap things correctly before copying. This should also end up with the correct bytes in the dsn[] array. While at it, fix a small typo in the netdev_info error message when the DSN cannot be read. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Cc: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05ibmveth: Remove unused page_offset macroMatthew Wilcox (Oracle)
We already have a function called page_offset(), and this macro is unused, so just delete it. Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05net/mlx5: Clear LAG notifier pointer after unregisterEli Cohen
After returning from unregister_netdevice_notifier_dev_net(), set the notifier_call field to NULL so successive call to mlx5_lag_add() will function as expected. Fixes: 7907f23adc18 ("net/mlx5: Implement RoCE LAG feature") Signed-off-by: Eli Cohen <eli@mellanox.com> Reviewed-by: Vlad Buslov <vladbu@mellanox.com> Reviewed-by: Raed Salem <raeds@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-03-05net/mlx5e: Fix endianness handling in pedit maskSebastian Hense
The mask value is provided as 64 bit and has to be casted in either 32 or 16 bit. On big endian systems the wrong half was casted which resulted in an all zero mask. Fixes: 2b64beba0251 ("net/mlx5e: Support header re-write of partial fields in TC pedit offload") Signed-off-by: Sebastian Hense <sebastian.hense1@ibm.com> Reviewed-by: Roi Dayan <roid@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-03-05net/mlx5e: kTLS, Fix wrong value in record tracker enumTariq Toukan
Fix to match the HW spec: TRACKING state is 1, SEARCHING is 2. No real issue for now, as these values are not currently used. Fixes: d2ead1f360e8 ("net/mlx5e: Add kTLS TX HW offload support") Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Reviewed-by: Boris Pismenny <borisp@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-03-05net/mlx5e: kTLS, Fix TCP seq off-by-1 issue in TX resync flowTariq Toukan
We have an off-by-1 issue in the TCP seq comparison. The last sequence number that belongs to the TCP packet's payload is not "start_seq + len", but one byte before it. Fix it so the 'ends_before' is evaluated properly. This fixes a bug that results in error completions in the kTLS HW offload flows. Fixes: ffbd9ca94e2e ("net/mlx5e: kTLS, Fix corner-case checks in TX resync flow") Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Reviewed-by: Boris Pismenny <borisp@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-03-05net/mlx5: DR, Fix postsend actions write lengthHamdan Igbaria
Fix the send info write length to be (actions x action) size in bytes. Fixes: 297cccebdc5a ("net/mlx5: DR, Expose an internal API to issue RDMA operations") Signed-off-by: Hamdan Igbaria <hamdani@mellanox.com> Reviewed-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-03-05bcm63xx_enet: remove redundant variable definitionstangbin
in this function,‘ret’ is always assigned,so this's definition 'ret = 0' make no sense. Signed-off-by: tangbin <tangbin@cmss.chinamobile.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05sfc: complete the next packet when we receive a timestampTom Zhao
We now ignore the "completion" event when using tx queue timestamping, and only pay attention to the two (high and low) timestamp events. The NIC will send a pair of timestamp events for every packet transmitted. The current firmware may merge the completion events, and it is possible that future versions may reorder the completion and timestamp events. As such the completion event is not useful. Without this patch in place a merged completion event on a queue with timestamping will cause a "spurious TX completion" error. This affects SFN8000-series adapters. Signed-off-by: Tom Zhao <tzhao@solarflare.com> Acked-by: Martin Habets <mhabets@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05net: tulip: Replace zero-length array with flexible-array memberGustavo A. R. Silva
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05mlxsw: spectrum_qdisc: Support offloading of FIFO QdiscPetr Machata
There are two peculiarities about offloading FIFO: - sometimes the qdisc has an unspecified handle (it is "invisible") - it may be created before the qdisc that it will be a child of These features make the offload a bit more tricky. The approach chosen in this patch is to make note of all the FIFOs that needed to be rejected because their parents were not known. Later when the parent is created, they are offloaded FIFO is only offloaded for its counters, queue length is ignored. Signed-off-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05mlxsw: spectrum_qdisc: Add handle parameter to ..._ops.replacePetr Machata
PRIO and ETS will need to check the value of qdisc handle in their handlers. Add it to the callback and propagate through. Signed-off-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05mlxsw: spectrum_qdisc: Introduce struct mlxsw_sp_qdisc_statePetr Machata
In order to have a tidy structure where to put information related to Qdisc offloads, introduce a new structure. Move there the two existing pieces of data: root_qdisc and tclass_qdiscs. Embed them directly, because there's no reason to go through pointer anymore. Convert users, update init/fini functions. Signed-off-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05e1000e: reject unsupported coalescing paramsJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver did not previously reject unsupported parameters. v3: adjust commit message for new member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05mlx5: reject unsupported coalescing paramsJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver did not previously reject unsupported parameters. v3: adjust commit message for new member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05bnxt: reject unsupported coalescing paramsJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver did not previously reject unsupported parameters. v3: adjust commit message for new member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Reviewed-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05ice: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. As a side effect of these changes the info message about the bad parameter will no longer be printed. We also always reject the tx_coalesce_usecs_high param, even if the target queue pair does not have a TX queue. Error code changes from EINVAL to EOPNOTSUPP. v2: allow adaptive TX v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05hisilicon: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. No functional changes. v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05ionic: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. As a side effect of these changes the error code for unsupported params changes from EINVAL to EOPNOTSUPP. v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05nfp: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. No functional changes. v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05stmmac: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. No functional changes. v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05enic: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. The error code changes from EINVAL to EOPNOTSUPP. v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05xgbe: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. We are only losing the error print. v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05net: hns3: fix a not link up issue when fibre port supports autonegJian Shen
When fibre port supports auto-negotiation, the IMP(Intelligent Management Process) processes the speed of auto-negotiation and the user's speed separately. For below case, the port will get a not link up problem. step 1: disables auto-negotiation and sets speed to A, then the driver's MAC speed will be updated to A. step 2: enables auto-negotiation and MAC gets negotiated speed B, then the driver's MAC speed will be updated to B through querying in periodical task. step 3: MAC gets new negotiated speed A. step 4: disables auto-negotiation and sets speed to B before periodical task query new MAC speed A, the driver will ignore the speed configuration. This patch fixes it by skipping speed and duplex checking when fibre port supports auto-negotiation. Fixes: 22f48e24a23d ("net: hns3: add autoneg and change speed support for fibre port") Signed-off-by: Jian Shen <shenjian15@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05net: rmnet: use GFP_KERNEL instead of GFP_ATOMICTaehee Yoo
In the current code, rmnet_register_real_device() and rmnet_newlink() are using GFP_ATOMIC. But, these functions are allowed to sleep. So, GFP_KERNEL can be used. Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05net: rmnet: print error message when command failsTaehee Yoo
When rmnet netlink command fails, it doesn't print any error message. So, users couldn't know the exact reason. In order to tell the exact reason to the user, the extack error message is used in this patch. Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05net: rmnet: add missing module aliasTaehee Yoo
In the current rmnet code, there is no module alias. So, RTNL couldn't load rmnet module automatically. Test commands: ip link add dummy0 type dummy modprobe -rv rmnet ip link add rmnet0 link dummy0 type rmnet mux_id 1 Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05net/mlx5: Expose raw packet pacing APIsYishai Hadas
Expose raw packet pacing APIs to be used by DEVX based applications. The existing code was refactored to have a single flow with the new raw APIs. The new raw APIs considered the input of 'pp_rate_limit_context', uid, 'dedicated', upon looking for an existing entry. This raw mode enables future device specification data in the raw context without changing the existing logic and code. The ability to ask for a dedicated entry gives control for application to allocate entries according to its needs. A dedicated entry may not be used by some other process and it also enables the process spreading its resources to some different entries for use different hardware resources as part of enforcing the rate. The counter per entry was changed to be u64 to prevent any option to overflow. Signed-off-by: Yishai Hadas <yishaih@mellanox.com> Acked-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
2020-03-04net: sun: use pci_status_get_and_clear_errorsHeiner Kallweit
Use new helper pci_status_get_and_clear_errors() to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04r8169: use pci_status_get_and_clear_errorsHeiner Kallweit
Use new helper pci_status_get_and_clear_errors() to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04PCI: Add constant PCI_STATUS_ERROR_BITSHeiner Kallweit
This collection of PCI error bits is used in more than one driver, so move it to the PCI core. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>