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path: root/drivers/net
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2019-08-18ibmvnic: Unmap DMA address of TX descriptor buffers after useThomas Falcon
There's no need to wait until a completion is received to unmap TX descriptor buffers that have been passed to the hypervisor. Instead unmap it when the hypervisor call has completed. This patch avoids the possibility that a buffer will not be unmapped because a TX completion is lost or mishandled. Reported-by: Abdul Haleem <abdhalee@linux.vnet.ibm.com> Tested-by: Devesh K. Singh <devesh_singh@in.ibm.com> Signed-off-by: Thomas Falcon <tlfalcon@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18bnxt_en: Fix to include flow direction in L2 keySomnath Kotur
FW expects the driver to provide unique flow reference handles for Tx or Rx flows. When a Tx flow and an Rx flow end up sharing a reference handle, flow offload does not seem to work. This could happen in the case of 2 flows having their L2 fields wildcarded but in different direction. Fix to incorporate the flow direction as part of the L2 key v2: Move the dir field to the end of the bnxt_tc_l2_key struct to fix the warning reported by kbuild test robot <lkp@intel.com>. There is existing code that initializes the structure using nested initializer and will warn with the new u8 field added to the beginning. The structure also packs nicer when this new u8 is added to the end of the structure [MChan]. Fixes: abd43a13525d ("bnxt_en: Support for 64-bit flow handle.") Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18bnxt_en: Use correct src_fid to determine direction of the flowVenkat Duvvuru
Direction of the flow is determined using src_fid. For an RX flow, src_fid is PF's fid and for TX flow, src_fid is VF's fid. Direction of the flow must be specified, when getting statistics for that flow. Currently, for DECAP flow, direction is determined incorrectly, i.e., direction is initialized as TX for DECAP flow, instead of RX. Because of which, stats are not reported for this DECAP flow, though it is offloaded and there is traffic for that flow, resulting in flow age out. This patch fixes the problem by determining the DECAP flow's direction using correct fid. Set the flow direction in all cases for consistency even if 64-bit flow handle is not used. Fixes: abd43a13525d ("bnxt_en: Support for 64-bit flow handle.") Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18bnxt_en: Suppress HWRM errors for HWRM_NVM_GET_VARIABLE commandVasundhara Volam
For newly added NVM parameters, older firmware may not have the support. Suppress the error message to avoid the unncessary error message which is triggered when devlink calls the driver during initialization. Fixes: 782a624d00fa ("bnxt_en: Add bnxt_en initial params table and register it.") Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18bnxt_en: Fix handling FRAG_ERR when NVM_INSTALL_UPDATE cmd failsVasundhara Volam
If FW returns FRAG_ERR in response error code, driver is resending the command only when HWRM command returns success. Fix the code to resend NVM_INSTALL_UPDATE command with DEFRAG install flags, if FW returns FRAG_ERR in its response error code. Fixes: cb4d1d626145 ("bnxt_en: Retry failed NVM_INSTALL_UPDATE with defragmentation flag enabled.") Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18bnxt_en: Improve RX doorbell sequence.Michael Chan
When both RX buffers and RX aggregation buffers have to be replenished at the end of NAPI, post the RX aggregation buffers first before RX buffers. Otherwise, we may run into a situation where there are only RX buffers without RX aggregation buffers for a split second. This will cause the hardware to abort the RX packet and report buffer errors, which will cause unnecessary cleanup by the driver. Ringing the Aggregation ring doorbell first before the RX ring doorbell will prevent some of these buffer errors. Use the same sequence during ring initialization as well. Fixes: 697197e5a173 ("bnxt_en: Re-structure doorbells.") Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18bnxt_en: Fix VNIC clearing logic for 57500 chips.Michael Chan
During device shutdown, the VNIC clearing sequence needs to be modified to free the VNIC first before freeing the RSS contexts. The current code is doing the reverse and we can get mis-directed RX completions to CP ring ID 0 when the RSS contexts are freed and zeroed. The clearing of RSS contexts is not required with the new sequence. Refactor the VNIC clearing logic into a new function bnxt_clear_vnic() and do the chip specific VNIC clearing sequence. Fixes: 7b3af4f75b81 ("bnxt_en: Add RSS support for 57500 chips.") Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18net: kalmia: fix memory leaksWenwen Wang
In kalmia_init_and_get_ethernet_addr(), 'usb_buf' is allocated through kmalloc(). In the following execution, if the 'status' returned by kalmia_send_init_packet() is not 0, 'usb_buf' is not deallocated, leading to memory leaks. To fix this issue, add the 'out' label to free 'usb_buf'. Signed-off-by: Wenwen Wang <wenwen@cs.uga.edu> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18cx82310_eth: fix a memory leak bugWenwen Wang
In cx82310_bind(), 'dev->partial_data' is allocated through kmalloc(). Then, the execution waits for the firmware to become ready. If the firmware is not ready in time, the execution is terminated. However, the allocated 'dev->partial_data' is not deallocated on this path, leading to a memory leak bug. To fix this issue, free 'dev->partial_data' before returning the error. Signed-off-by: Wenwen Wang <wenwen@cs.uga.edu> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18net: hns3: add phy_attached_info() to the hns3 driverYonglong Liu
This patch adds the call to phy_attached_info() to the hns3 driver to identify which exact PHY drivers and models is in use. Signed-off-by: Yonglong Liu <liuyonglong@huawei.com> Reviewed-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18net: hns3: prevent unnecessary MAC TNL interruptHuazhong Tan
MAC TNL interrupt is used to collect statistic info about link status changing suddenly when netdev is running. But when stopping netdev, the enabled MAC TNL interrupt is unnecessary, and may add some noises to the statistic info. So this patch disables it before stopping MAC. Fixes: a63457878b12 ("net: hns3: Add handling of MAC tunnel interruption") Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Reviewed-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18net: hns3: change print level of RAS error log from warning to errorXiaofei Tan
This patch changes print level of RAS error log from warning to error. Because RAS error and its recovery process could cause application failure. Also uses %u instead of %d when the parameter is unsigned. Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18net: hns3: fix error and incorrect formatGuojia Liao
The pointer type parameter should be declare as const for preventing from its pointed value being unexpected modified. The uninitialized variable can not be return directly. The default return value is 0 if no abnormal result. This patch fixes the preceding two errors, deletes redundant declaration of a function and align one parameter. Signed-off-by: Guojia Liao <liaoguojia@huawei.com> Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Jian Shen <shenjian15@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18net: hns3: modify redundant initialization of variableGuojia Liao
Some temporary variables do not need to be initialized that they will be set before used, so this patch deletes the initialization value of these temporary variables. Signed-off-by: Guojia Liao <liaoguojia@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huzhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18net: hns3: add or modify commentsGuojia Liao
To explain some code, this patch adds some comments, and modifies or merges some comments to make them more neat. Signed-off-by: Guojia Liao <liaoguojia@huawei.com> Signed-off-by: Zhongzhu Liu <liuzhongzhu@huawei.com> Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18bnx2x: Fix VF's VLAN reconfiguration in reload.Manish Chopra
Commit 04f05230c5c13 ("bnx2x: Remove configured vlans as part of unload sequence."), introduced a regression in driver that as a part of VF's reload flow, VLANs created on the VF doesn't get re-configured in hardware as vlan metadata/info was not getting cleared for the VFs which causes vlan PING to stop. This patch clears the vlan metadata/info so that VLANs gets re-configured back in the hardware in VF's reload flow and PING/traffic continues for VLANs created over the VFs. Fixes: 04f05230c5c13 ("bnx2x: Remove configured vlans as part of unload sequence.") Signed-off-by: Manish Chopra <manishc@marvell.com> Signed-off-by: Sudarsana Kalluru <skalluru@marvell.com> Signed-off-by: Shahed Shaikh <shshaikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net/mlx5e: Add AF_XDP need_wakeup supportMaxim Mikityanskiy
This commit adds support for the new need_wakeup feature of AF_XDP. The applications can opt-in by using the XDP_USE_NEED_WAKEUP bind() flag. When this feature is enabled, some behavior changes: RX side: If the Fill Ring is empty, instead of busy-polling, set the flag to tell the application to kick the driver when it refills the Fill Ring. TX side: If there are pending completions or packets queued for transmission, set the flag to tell the application that it can skip the sendto() syscall and save time. The performance testing was performed on a machine with the following configuration: - 24 cores of Intel Xeon E5-2620 v3 @ 2.40 GHz - Mellanox ConnectX-5 Ex with 100 Gbit/s link The results with retpoline disabled: | without need_wakeup | with need_wakeup | |----------------------|----------------------| | one core | two cores | one core | two cores | -------|----------|-----------|----------|-----------| txonly | 20.1 | 33.5 | 29.0 | 34.2 | rxdrop | 0.065 | 14.1 | 12.0 | 14.1 | l2fwd | 0.032 | 7.3 | 6.6 | 7.2 | "One core" means the application and NAPI run on the same core. "Two cores" means they are pinned to different cores. Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Reviewed-by: Saeed Mahameed <saeedm@mellanox.com> Acked-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
2019-08-17net/mlx5e: Move the SW XSK code from NAPI poll to a separate functionMaxim Mikityanskiy
Two XSK tasks are performed during NAPI polling, that are not bound to hardware interrupts: TXing packets and polling for frames in the Fill Ring. They are special in a way that the hardware doesn't know about these tasks, so it doesn't trigger interrupts if there is still some work to be done, it's our driver's responsibility to ensure NAPI will be rescheduled if needed. Create a new function to handle these tasks and move the corresponding code from mlx5e_napi_poll to the new function to improve modularity and prepare for the changes in the following patch. Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Reviewed-by: Saeed Mahameed <saeedm@mellanox.com> Acked-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
2019-08-17ixgbe: add support for AF_XDP need_wakeup featureMagnus Karlsson
This patch adds support for the need_wakeup feature of AF_XDP. If the application has told the kernel that it might sleep using the new bind flag XDP_USE_NEED_WAKEUP, the driver will then set this flag if it has no more buffers on the NIC Rx ring and yield to the application. For Tx, it will set the flag if it has no outstanding Tx completion interrupts and return to the application. Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com> Acked-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
2019-08-17i40e: add support for AF_XDP need_wakeup featureMagnus Karlsson
This patch adds support for the need_wakeup feature of AF_XDP. If the application has told the kernel that it might sleep using the new bind flag XDP_USE_NEED_WAKEUP, the driver will then set this flag if it has no more buffers on the NIC Rx ring and yield to the application. For Tx, it will set the flag if it has no outstanding Tx completion interrupts and return to the application. Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com> Acked-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
2019-08-17xsk: replace ndo_xsk_async_xmit with ndo_xsk_wakeupMagnus Karlsson
This commit replaces ndo_xsk_async_xmit with ndo_xsk_wakeup. This new ndo provides the same functionality as before but with the addition of a new flags field that is used to specifiy if Rx, Tx or both should be woken up. The previous ndo only woke up Tx, as implied by the name. The i40e and ixgbe drivers (which are all the supported ones) are updated with this new interface. This new ndo will be used by the new need_wakeup functionality of XDP sockets that need to be able to wake up both Rx and Tx driver processing. Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com> Acked-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
2019-08-17net: stmmac: selftests: Add selftest for VLAN TX OffloadJose Abreu
Add 2 new selftests for VLAN Insertion offloading. Tests are for inner and outer VLAN offloading. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: stmmac: Add support for VLAN Insertion OffloadJose Abreu
Adds the logic to insert a given VLAN ID in a packet. This is offloaded to HW and its descriptor based. For now, only XGMAC implements the necessary callbacks. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: stmmac: xgmac: Add EEE supportJose Abreu
Add support for EEE in XGMAC cores by implementing the necessary callbacks. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: stmmac: selftests: Add tests for SA Insertion/ReplacementJose Abreu
Add 4 new tests: - SA Insertion (register based) - SA Insertion (descriptor based) - SA Replacament (register based) - SA Replacement (descriptor based) Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: stmmac: Add support for SA Insertion/Replacement in XGMAC coresJose Abreu
Add the support for Source Address Insertion and Replacement in XGMAC cores. Two methods are supported: Descriptor based and register based. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: stmmac: Add ethtool register dump for XGMAC coresJose Abreu
Add the ethtool interface to dump the register map in XGMAC cores. Changes from v2: - Remove uneeded memset (Jakub) Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: stmmac: dwxgmac: Add Flexible PPS supportJose Abreu
Add the support for Flexible PPS in XGMAC cores. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: stmmac: Add a counter for Split Header packetsJose Abreu
Add a counter that increments each time a packet with split header is received. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: stmmac: Add Split Header support and enable it in XGMAC coresJose Abreu
Add the support for Split Header feature in the RX path and enable it in XGMAC cores. This does not impact neither beneficts bandwidth but it does reduces CPU usage because without the feature all the entire packet is memcpy'ed, while that with the feature only the header is. With Split Header disabled 'perf stat -d' gives: 86870.624945 task-clock (msec) # 0.429 CPUs utilized 1073352 context-switches # 0.012 M/sec 1 cpu-migrations # 0.000 K/sec 213 page-faults # 0.002 K/sec 327113872376 cycles # 3.766 GHz (62.53%) 56618161216 instructions # 0.17 insn per cycle (75.06%) 10742205071 branches # 123.658 M/sec (75.36%) 584309242 branch-misses # 5.44% of all branches (75.19%) 17594787965 L1-dcache-loads # 202.540 M/sec (74.88%) 4003773131 L1-dcache-load-misses # 22.76% of all L1-dcache hits (74.89%) 1313301468 LLC-loads # 15.118 M/sec (49.75%) 355906510 LLC-load-misses # 27.10% of all LL-cache hits (49.92%) With Split Header enabled 'perf stat -d' gives: 49324.456539 task-clock (msec) # 0.245 CPUs utilized 2542387 context-switches # 0.052 M/sec 1 cpu-migrations # 0.000 K/sec 213 page-faults # 0.004 K/sec 177092791469 cycles # 3.590 GHz (62.30%) 68555756017 instructions # 0.39 insn per cycle (75.16%) 12697019382 branches # 257.418 M/sec (74.81%) 442081897 branch-misses # 3.48% of all branches (74.79%) 20337958358 L1-dcache-loads # 412.330 M/sec (75.46%) 3820210140 L1-dcache-load-misses # 18.78% of all L1-dcache hits (75.35%) 1257719198 LLC-loads # 25.499 M/sec (49.73%) 685543923 LLC-load-misses # 54.51% of all LL-cache hits (49.86%) Changes from v2: - Reword commit message (Jakub) Changes from v1: - Add performance info (David) - Add misssing dma_sync_single_for_device() Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: stmmac: xgmac: Correctly return that RX descriptor is not last oneJose Abreu
Return the correct value when RX descriptor is not the last one. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: stmmac: Prepare to add Split Header supportJose Abreu
In order to add Split Header support, stmmac_rx() needs to take into account that packet may be split accross multiple descriptors. Refactor the logic of this function in order to support this scenario. Changes from v2: - Fixup if condition detection (Jakub) - Don't stop NAPI with unfinished packet (Jakub) - Use napi_alloc_skb() (Jakub) Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: stmmac: Get correct timestamp values from XGMACJose Abreu
TX Timestamp in XGMAC comes from MAC instead of descriptors. Implement this in a new callback. Also, RX Timestamp in XGMAC must be cheked against corruption and we need a barrier to make sure that descriptor fields are read correctly. Changes from v2: - Rework return code check (Jakub) Changes from v1: - Rework the get timestamp function (David) Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17Documentation: Add description of netdevsim trapsIdo Schimmel
Signed-off-by: Ido Schimmel <idosch@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17netdevsim: Add devlink-trap supportIdo Schimmel
Have netdevsim register its trap groups and traps with devlink during initialization and periodically report trapped packets to devlink core. Since netdevsim is not a real device, the trapped packets are emulated using a workqueue that periodically reports a UDP packet with a random 5-tuple from each active packet trap and from each running netdev. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: phy: remove genphy_config_initHeiner Kallweit
Now that all users have been removed we can remove genphy_config_init. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-17net: phy: remove calls to genphy_config_initHeiner Kallweit
Supported PHY features are either auto-detected or explicitly set. In both cases calling genphy_config_init isn't needed. All that genphy_config_init does is removing features that are set as supported but can't be auto-detected. Basically it duplicates the code in genphy_read_abilities. Therefore remove such calls from all PHY drivers. v2: - remove call also from new adin PHY driver v3: - pass NULL as config_init function pointer for dp83848 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16ipvlan: set hw_enc_features like macvlanBill Sommerfeld
Allow encapsulated packets sent to tunnels layered over ipvlan to use offloads rather than forcing SW fallbacks. Since commit f21e5077010acda73a60 ("macvlan: add offload features for encapsulation"), macvlan has set dev->hw_enc_features to include everything in dev->features; do likewise in ipvlan. Signed-off-by: Bill Sommerfeld <wsommerfeld@google.com> Acked-by: Mahesh Bandewar <maheshb@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16lan78xx: Fix memory leaksWenwen Wang
In lan78xx_probe(), a new urb is allocated through usb_alloc_urb() and saved to 'dev->urb_intr'. However, in the following execution, if an error occurs, 'dev->urb_intr' is not deallocated, leading to memory leaks. To fix this issue, invoke usb_free_urb() to free the allocated urb before returning from the function. Signed-off-by: Wenwen Wang <wenwen@cs.uga.edu> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16net: dsa: mv88e6xxx: check for mode change in port_setup_macMarek BehĂșn
The mv88e6xxx_port_setup_mac checks if the requested MAC settings are different from the current ones, and if not, does nothing (since chaning them requires putting the link down). In this check it only looks if the triplet [link, speed, duplex] is being changed. This patch adds support to also check if the mode parameter (of type phy_interface_t) is requested to be changed. The current mode is computed by the ->port_link_state() method, and if it is different from PHY_INTERFACE_MODE_NA, we check for equality with the requested mode. In the implementations of the mv88e6250_port_link_state() method we set the current mode to PHY_INTERFACE_MODE_NA - so the code does not check for mode change on 6250. In the mv88e6352_port_link_state() method, we use the cached cmode of the port to determine the mode as phy_interface_t (and if it is not enough, eg. for RGMII, we also look at the port control register for RX/TX timings). Signed-off-by: Marek BehĂșn <marek.behun@nic.cz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16net: phy: adin: add ethtool get_stats supportAlexandru Ardelean
This change implements retrieving all the error counters from the PHY. The counters require that the RxErrCnt register (0x0014) be read first, after which copies of the counters are latched into the registers. This ensures that all registers read after RxErrCnt are synchronized at the moment that they are read. The counter values need to be accumulated by the driver, as each time that RxErrCnt is read, the values that are latched are the ones that have incremented from the last read. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16net: phy: adin: implement downshift configuration via phy-tunableAlexandru Ardelean
Down-speed auto-negotiation may not always be enabled, in which case the PHY won't down-shift to 100 or 10 during auto-negotiation. This change enables downshift and configures the number of retries to default 4 (which is also in the datasheet The downshift control mechanism can also be controlled via the phy-tunable interface (ETHTOOL_PHY_DOWNSHIFT control). The change has been adapted from the Aquantia PHY driver. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16net: phy: adin: implement PHY subsystem software resetAlexandru Ardelean
The ADIN PHYs supports 4 types of reset: 1. The standard PHY reset via BMCR_RESET bit in MII_BMCR reg 2. Reset via GPIO 3. Reset via reg GeSftRst (0xff0c) & reload previous pin configs 4. Reset via reg GeSftRst (0xff0c) & request new pin configs Resets 2, 3 & 4 are almost identical, with the exception that the crystal oscillator is available during reset for 2. This change implements subsystem software reset via the GeSftRst and reloading the previous pin configuration (so reset number 3). This will also reset the PHY core regs (similar to reset 1). Since writing bit 1 to reg GeSftRst is self-clearing, the only thing that can be done, is to write to that register, wait a specific amount of time (10 milliseconds should be enough) and try to read back and check if there are no errors on read. A busy-wait-read won't work well, and may sometimes work or not work. In case phylib is configured to also do a reset via GPIO, the ADIN PHY may be reset twice when the PHY device registers, but that isn't a problem, since it's being done on boot (or PHY device register). Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16net: phy: adin: add EEE translation layer from Clause 45 to Clause 22Alexandru Ardelean
The ADIN1200 & ADIN1300 PHYs support EEE by using standard Clause 45 access to access MMD registers for EEE. The EEE register addresses (when using Clause 22) are available at different addresses (than Clause 45), and since accessing these regs (via Clause 22) needs a special mechanism, a translation table is required to convert these addresses. For Clause 45, this is not needed since the driver will likely never use this access mode. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16net: phy: adin: add support MDI/MDIX/Auto-MDI selectionAlexandru Ardelean
The ADIN PHYs support automatic MDI/MDIX negotiation. By default this is disabled, so this is enabled at `config_init`. This is controlled via the PHY Control 1 register. The supported modes are: 1. Manual MDI 2. Manual MDIX 3. Auto MDIX - prefer MDIX 4. Auto MDIX - prefer MDI The phydev mdix & mdix_ctrl fields include modes 3 & 4 into a single auto-mode. So, the default mode this driver enables is 4 when Auto-MDI mode is used. When detecting MDI/MDIX mode, a combination of the PHY Control 1 register and PHY Status 1 register is used to determine the correct MDI/MDIX mode. If Auto-MDI mode is not set, then the manual MDI/MDIX mode is returned. If Auto-MDI mode is set, then MDIX mode is returned differs from the preferred MDI/MDIX mode. This covers all cases where: 1. MDI preferred & Pair01Swapped == MDIX 2. MDIX preferred & Pair01Swapped == MDI 3. MDI preferred & ! Pair01Swapped == MDIX 4. MDIX preferred & ! Pair01Swapped == MDI The preferred MDI/MDIX mode is not configured via SW, but can be configured via HW pins. Note that the `Pair01Swapped` is the Green-Yellow physical pairs. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16net: phy: adin: make RMII fifo depth configurableAlexandru Ardelean
The FIFO depth can be configured for the RMII mode. This change adds support for doing this via device-tree (or ACPI). Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16net: phy: adin: make RGMII internal delays configurableAlexandru Ardelean
The internal delays for the RGMII are configurable for both RX & TX. This change adds support for configuring them via device-tree (or ACPI). Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16net: phy: adin: configure RGMII/RMII/MII modes on configAlexandru Ardelean
The ADIN1300 chip supports RGMII, RMII & MII modes. Default (if unconfigured) is RGMII. This change adds support for configuring these modes via the device registers. For RGMII with internal delays (modes RGMII_ID,RGMII_TXID, RGMII_RXID), the default delay is 2 ns. This can be configurable and will be done in a subsequent change. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16net: phy: adin: add {write,read}_mmd hooksAlexandru Ardelean
Both ADIN1200 & ADIN1300 support Clause 45 access for some registers. The Extended Management Interface (EMI) registers are accessible via both Clause 45 (at register MDIO_MMD_VEND1) and using Clause 22. The Clause 22 access for MMD regs differs from the standard one defined by 802.3. The ADIN PHYs use registers ExtRegPtr (0x0010) and ExtRegData (0x0011) to access Clause 45 & EMI registers. The indirect access is done via the following mechanism (for both R/W): 1. Write the address of the register in the ExtRegPtr 2. Read/write the value of the register via reg ExtRegData This mechanism is needed to manage configuration of chip settings and to access EEE registers via Clause 22. Since Clause 45 access will likely never be used, it is not implemented via this hook. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16net: phy: adin: add support for interruptsAlexandru Ardelean
This change hooks link-status-change interrupts to phylib. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>