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path: root/drivers/net
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2019-08-16net: phy: adin: hook genphy_{suspend, resume} into the driverAlexandru Ardelean
The chip supports standard suspend/resume via BMCR reg. Hook these functions into the `adin` driver. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-16net: phy: adin: add support for Analog Devices PHYsAlexandru Ardelean
This change adds support for Analog Devices Industrial Ethernet PHYs. Particularly the PHYs this driver adds support for: * ADIN1200 - Robust, Industrial, Low Power 10/100 Ethernet PHY * ADIN1300 - Robust, Industrial, Low Latency 10/100/1000 Gigabit Ethernet PHY The 2 chips are register compatible with one another. The main difference being that ADIN1200 doesn't operate in gigabit mode. The chips can be operated by the Generic PHY driver as well via the standard IEEE PHY registers (0x0000 - 0x000F) which are supported by the kernel as well. This assumes that configuration of the PHY has been done completely in HW, according to spec. Configuration can also be done via registers, which will be supported by this driver. Datasheets: https://www.analog.com/media/en/technical-documentation/data-sheets/ADIN1300.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/ADIN1200.pdf Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15net: mscc: PTP Hardware Clock (PHC) supportAntoine Tenart
This patch adds support for PTP Hardware Clock (PHC) to the Ocelot switch for both PTP 1-step and 2-step modes. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15net: mscc: remove the frame_info cpuq memberAntoine Tenart
In struct frame_info, the cpuq member is never used. This cosmetic patch removes it from the structure, and from the parsing of the frame header as it's only set but never used. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15net: mscc: improve the frame header parsing readabilityAntoine Tenart
This cosmetic patch improves the frame header parsing readability by introducing a new macro to access and mask its fields. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15net: mscc: describe the PTP register rangeAntoine Tenart
This patch adds support for using the PTP register range, and adds a description of its registers. This bank is used when configuring PTP. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15qed: Add driver API for flashing the config attributes.Sudarsana Reddy Kalluru
The patch adds driver interface for reading the config attributes from user provided buffer, and updates these values on nvm config flash partition. This is basically an expansion of our existing ethtool -f implementation. The management FW has exposed an additional method of configuring some of the nvram options, and this makes use of that. This implementation will come into use when newer FW files which contain configuration directives employing this API will be provided to ethtool -f. Signed-off-by: Sudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15qed: Add API for configuring NVM attributes.Sudarsana Reddy Kalluru
The patch adds API for configuring the NVM config attributes using Management FW (MFW) interfaces. Signed-off-by: Sudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15net: myri10ge: fix memory leaksWenwen Wang
In myri10ge_probe(), myri10ge_alloc_slices() is invoked to allocate slices related structures. Later on, myri10ge_request_irq() is used to get an irq. However, if this process fails, the allocated slices related structures are not deallocated, leading to memory leaks. To fix this issue, revise the target label of the goto statement to 'abort_with_slices'. Signed-off-by: Wenwen Wang <wenwen@cs.uga.edu> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15Merge tag 'linux-can-next-for-5.4-20190814' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next Marc Kleine-Budde says: ==================== pull-request: can-next 2019-08-14 this is a pull request for net-next/master consisting of 41 patches. The first two patches are for the kvaser_pciefd driver: Christer Beskow removes unnecessary code in the kvaser_pciefd_pwm_stop() function, YueHaibing removes the unused including of <linux/version.h>. In the next patch YueHaibing also removes the unused including of <linux/version.h> in the f81601 driver. In the ti_hecc driver the next 6 patches are by me and fix checkpatch warnings. YueHaibing's patch removes an unused variable in the ti_hecc_mailbox_read() function. The next 6 patches all target the xilinx_can driver. Anssi Hannula's patch fixes a chip start failure with an invalid bus. The patch by Venkatesh Yadav Abbarapu skips an error message in case of a deferred probe. The 3 patches by Appana Durga Kedareswara rao fix the RX and TX path for CAN-FD frames. Srinivas Neeli's patch fixes the bit timing calculations for CAN-FD. The next 12 patches are by me and several checkpatch warnings in the af_can, raw and bcm components. Thomas Gleixner provides a patch for the bcm, which switches the timer to HRTIMER_MODE_SOFT and removes the hrtimer_tasklet. Then 6 more patches by me for the gw component, which fix checkpatch warnings, followed by 2 patches by Oliver Hartkopp to add CAN-FD support. The vcan driver gets 3 patches by me, fixing checkpatch warnings. And finally a patch by Andre Hartmann to fix typos in CAN's netlink header. ====================
2019-08-15liquidio: add cleanup in octeon_setup_iq()Wenwen Wang
If oct->fn_list.enable_io_queues() fails, no cleanup is executed, leading to memory/resource leaks. To fix this issue, invoke octeon_delete_instr_queue() before returning from the function. Signed-off-by: Wenwen Wang <wenwen@cs.uga.edu> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15net: lpc-enet: allow compile testingArnd Bergmann
The lpc-enet driver can now be built on all platforms, so allow compile testing as well. Add one missing header inclusion that is required in some configurations. Link: https://lore.kernel.org/r/20190809144043.476786-11-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15net: lpc-enet: fix printk format stringsArnd Bergmann
compile-testing this driver on other architectures showed multiple warnings: drivers/net/ethernet/nxp/lpc_eth.c: In function 'lpc_eth_drv_probe': drivers/net/ethernet/nxp/lpc_eth.c:1337:19: warning: format '%d' expects argument of type 'int', but argument 4 has type 'resource_size_t {aka long long unsigned int}' [-Wformat=] drivers/net/ethernet/nxp/lpc_eth.c:1342:19: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=] Use format strings that work on all architectures. Link: https://lore.kernel.org/r/20190809144043.476786-10-arnd@arndb.de Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15net: lpc-enet: fix badzero.cocci warningskbuild test robot
drivers/net/ethernet/nxp/lpc_eth.c:1316:31-32: WARNING comparing pointer to 0 Compare pointer-typed values to NULL rather than 0 Semantic patch information: This makes an effort to choose between !x and x == NULL. !x is used if it has previously been used with the function used to initialize x. This relies on type information. More type information can be obtained using the option -all_includes and the option -I to specify an include path. Generated by: scripts/coccinelle/null/badzero.cocci Link: https://lore.kernel.org/r/20190809144043.476786-9-arnd@arndb.de Fixes: e42016eb3844 ("net: lpc-enet: allow compile testing") Signed-off-by: kbuild test robot <lkp@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15net: lpc-enet: move phy setup into platform codeArnd Bergmann
Setting the phy mode requires touching a platform specific register, which prevents us from building the driver without its header files. Move it into a separate function in arch/arm/mach/lpc32xx to hide the core registers from the network driver. Link: https://lore.kernel.org/r/20190809144043.476786-8-arnd@arndb.de Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15net: lpc-enet: factor out iram accessArnd Bergmann
The lpc_eth driver uses a platform specific method to find the internal sram. This prevents building it on other machines. Rework to only use one function call and keep the other platform internals where they belong. Ideally this would look up the sram location from DT, but as this is a rarely used driver, I want to keep the modifications to a minimum. Link: https://lore.kernel.org/r/20190809144043.476786-7-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15netdevsim: implement support for devlink region and snapshotsJiri Pirko
Implement dummy region of size 32K and allow user to create snapshots or random data using debugfs file trigger. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15r8169: sync EEE handling for RTL8168h with vendor driverHeiner Kallweit
Sync EEE init for RTL8168h with vendor driver and add two writes to vendor-specific registers. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15r8169: use the generic EEE management functionsHeiner Kallweit
Now that the Realtek PHY driver maps the vendor-specific EEE registers to the standard MMD registers, we can remove all special handling and use the generic functions phy_ethtool_get/set_eee. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15net: phy: realtek: add support for EEE registers on integrated PHY'sHeiner Kallweit
EEE-related registers on newer integrated PHY's have the standard layout, but are accessible not via MMD but via vendor-specific registers. Emulating the standard MMD registers allows to use the generic functions for EEE control. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15net/mlx5e: Fix compatibility issue with ethtool flash deviceEran Ben Elisha
Cited patch deleted ethtool flash device support, as ethtool core can fallback into devlink flash callback. However, this is supported only if there is a devlink port registered over the corresponding netdevice. As mlx5e do not have devlink port support over native netdevice, it broke the ability to flash device via ethtool. This patch re-add the ethtool callback to avoid user functionality breakage when trying to flash device via ethtool. Fixes: 9c8bca2637b8 ("mlx5: Move firmware flash implementation to devlink") Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-08-15net/mlx5e: Fix a race with XSKICOSQ in XSK wakeup flowMaxim Mikityanskiy
Add a missing spinlock around XSKICOSQ usage at the activation stage, because there is a race between a configuration change and the application calling sendto(). Fixes: db05815b36cb ("net/mlx5e: Add XSK zero-copy support") Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-08-15net: phy: swphy: emulate register MII_ESTATUSHeiner Kallweit
When the genphy driver binds to a swphy it will call genphy_read_abilites that will try to read MII_ESTATUS if BMSR_ESTATEN is set in MII_BMSR. So far this would read the default value 0xffff and 1000FD and 1000HD are reported as supported just by chance. Better add explicit support for emulating MII_ESTATUS. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15net: phy: read MII_CTRL1000 in genphy_read_status only if neededHeiner Kallweit
Value of MII_CTRL1000 is needed only if LPA_1000MSFAIL is set. Therefore move reading this register. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-14cxgb4: fix a memory leak bugWenwen Wang
In blocked_fl_write(), 't' is not deallocated if bitmap_parse_user() fails, leading to a memory leak bug. To fix this issue, free t before returning the error. Signed-off-by: Wenwen Wang <wenwen@cs.uga.edu> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-14net/mvpp2: Replace tasklet with softirq hrtimerThomas Gleixner
The tx_done_tasklet tasklet is used in invoke the hrtimer (mvpp2_hr_timer_cb) in softirq context. This can be also achieved without the tasklet but with HRTIMER_MODE_SOFT as hrtimer mode. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-14net: phy: realtek: add NBase-T PHY auto-detectionHeiner Kallweit
Realtek provided information on how the new NIC-integrated PHY's expose whether they support 2.5G/5G/10G. This allows to automatically differentiate 1Gbps and 2.5Gbps PHY's, and therefore allows to remove the fake PHY ID mechanism for RTL8125. So far RTL8125 supports 2.5Gbps only, but register layout for faster modes has been defined already, so let's use this information to be future-proof. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-14r8169: fix sporadic transmit timeout issueHeiner Kallweit
Holger reported sporadic transmit timeouts and it turned out that one path misses ringing the doorbell. Fix was suggested by Eric. Fixes: ef14358546b1 ("r8169: make use of xmit_more") Suggested-by: Eric Dumazet <edumazet@google.com> Tested-by: Holger Hoffstätte <holger@applied-asynchrony.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-13net: phy: consider AN_RESTART status when reading link statusHeiner Kallweit
After configuring and restarting aneg we immediately try to read the link status. On some systems the PHY may not yet have cleared the "aneg complete" and "link up" bits, resulting in a false link-up signal. See [0] for a report. Clause 22 and 45 both require the PHY to keep the AN_RESTART bit set until the PHY actually starts auto-negotiation. Let's consider this in the generic functions for reading link status. The commit marked as fixed is the first one where the patch applies cleanly. [0] https://marc.info/?t=156518400300003&r=1&w=2 Fixes: c1164bb1a631 ("net: phy: check PMAPMD link status only in genphy_c45_read_link") Tested-by: Yonglong Liu <liuyonglong@huawei.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-08-13net/mlx4_en: fix a memory leak bugWenwen Wang
In mlx4_en_config_rss_steer(), 'rss_map->indir_qp' is allocated through kzalloc(). After that, mlx4_qp_alloc() is invoked to configure RSS indirection. However, if mlx4_qp_alloc() fails, the allocated 'rss_map->indir_qp' is not deallocated, leading to a memory leak bug. To fix the above issue, add the 'qp_alloc_err' label to free 'rss_map->indir_qp'. Fixes: 4931c6ef04b4 ("net/mlx4_en: Optimized single ring steering") Signed-off-by: Wenwen Wang <wenwen@cs.uga.edu> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-08-13ibmveth: Convert multicast list size for little-endian systemThomas Falcon
The ibm,mac-address-filters property defines the maximum number of addresses the hypervisor's multicast filter list can support. It is encoded as a big-endian integer in the OF device tree, but the virtual ethernet driver does not convert it for use by little-endian systems. As a result, the driver is not behaving as it should on affected systems when a large number of multicast addresses are assigned to the device. Reported-by: Hangbin Liu <liuhangbin@gmail.com> Signed-off-by: Thomas Falcon <tlfalcon@linux.ibm.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-08-13r8152: change rx_copybreak and rx_pending through ethtoolHayes Wang
Let the rx_copybreak and rx_pending could be modified by ethtool. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-08-13r8152: support skb_add_rx_fragHayes Wang
Use skb_add_rx_frag() to reduce the memory copy for rx data. Use a new list of rx_used to store the rx buffer which couldn't be reused yet. Besides, the total number of rx buffer may be increased or decreased dynamically. And it is limited by RTL8152_MAX_RX_AGG. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-08-13r8152: use alloc_pages for rx bufferHayes Wang
Replace kmalloc_node() with alloc_pages() for rx buffer. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-08-13r8152: replace array with linking list for rx informationHayes Wang
The original method uses an array to store the rx information. The new one uses a list to link each rx structure. Then, it is possible to increase/decrease the number of rx structure dynamically. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-08-13r8152: separate the rx buffer sizeHayes Wang
The different chips may accept different rx buffer sizes. The RTL8152 supports 16K bytes, and RTL8153 support 32K bytes. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-08-13net: phy: let phy_speed_down/up support speeds >1GbpsHeiner Kallweit
So far phy_speed_down/up can be used up to 1Gbps only. Remove this restriction by using new helper __phy_speed_down. New member adv_old in struct phy_device is used by phy_speed_up to restore the advertised modes before calling phy_speed_down. Don't simply advertise what is supported because a user may have intentionally removed modes from advertisement. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-08-13net: phy: add phy_speed_down_core and phy_resolve_min_speedHeiner Kallweit
phy_speed_down_core provides most of the functionality for phy_speed_down. It makes use of new helper phy_resolve_min_speed that is based on the sorting of the settings[] array. In certain cases it may be helpful to be able to exclude legacy half duplex modes, therefore prepare phy_resolve_min_speed() for it. v2: - rename __phy_speed_down to phy_speed_down_core Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-08-13net: phy: add __set_linkmode_max_speedHeiner Kallweit
We will need the functionality of __set_linkmode_max_speed also for linkmode bitmaps other than phydev->supported. Therefore split it. v2: - remove unused parameter from __set_linkmode_max_speed Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-08-13net: hns3: Make hclge_func_reset_sync_vf staticYueHaibing
Fix sparse warning: drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c:3190:5: warning: symbol 'hclge_func_reset_sync_vf' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-08-13Merge remote-tracking branch 'mlx5-next/mlx5-next' into wip/dl-for-nextDoug Ledford
Merging tip of mlx5-next in order to get changes related to adding XRQ support to the DEVX interface needed prior to the following two patches. Signed-off-by: Doug Ledford <dledford@redhat.com>
2019-08-13can: vcan: introduce pr_fmt and make use of itMarc Kleine-Budde
This patch introduces pr_fmt and makes use of it, also it converts a printk() to pr_info(). Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2019-08-13can: vcan: remove unnecessary blank linesMarc Kleine-Budde
This patch removes unnecessary blank lines, so that checkpatch doesn't complain anymore. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2019-08-13can: vcan: convert block comments to network style commentsMarc Kleine-Budde
This patch converts all block comments to network subsystem style block comments. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2019-08-13can: xilinx_can: xcan_set_bittiming(): fix the data phase btr1 calculationSrinivas Neeli
While calculating bitrate for the data phase, the driver is using phase segment 1 of the arbitration phase instead of the data phase. Fixes: c223da6 ("can: xilinx_can: Add support for CANFD FD frames") Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Acked-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2019-08-13can: xilinx_can: xcan_rx_fifo_get_next_frame(): fix FSR register FL and RI ↵Appana Durga Kedareswara rao
mask values for canfd 2.0 For CANFD 2.0 IP configuration existing driver is using incorrect mask values for FSR register FL and RI fields. Fixes: c223da6 ("can: xilinx_can: Add support for CANFD FD frames") Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Acked-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2019-08-13can: xilinx_can: fix the data update logic for CANFD FD framesAppana Durga Kedareswara rao
commit c223da689324 ("can: xilinx_can: Add support for CANFD FD frames") is writing data to a wrong offset for FD frames. This patch fixes this issue. Fixes: c223da6 ("can: xilinx_can: Add support for CANFD FD frames") Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Reviewed-by: Shubhrajyoti Datta <Shubhrajyoti.datta@xilinx.com> Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2019-08-13can: xilinx_can: xcanfd_rx(): fix FSR register handling in the RX pathAppana Durga Kedareswara rao
After commit c223da689324 ("can: xilinx_can: Add support for CANFD FD frames") the driver is updating the FSR IRI index multiple times (i.e in xcanfd_rx() and xcan_rx_fifo_get_next_frame()), It should be updated once per RX packet. This patch fixes this issue, also this patch removes the unnecessary fsr register checks in xcanfd_rx() API. Fixes: c223da6 ("can: xilinx_can: Add support for CANFD FD frames") Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Reviewed-by: Shubhrajyoti Datta <Shubhrajyoti.datta@xilinx.com> Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2019-08-13can: xilinx_can: xcan_probe(): skip error message on deferred probeVenkatesh Yadav Abbarapu
When can clock is provided from the clock wizard, clock wizard driver may not be available when can driver probes resulting to the error message "Device clock not found error". As this error message is not very userful to the end user, skip printing it in the case of deferred probe. Fixes: b1201e44 ("can: xilinx CAN controller support") Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2019-08-13can: xilinx_can: xcan_chip_start(): fix failure with invalid busAnssi Hannula
Currently the xilinx_can xcan_chip_start() function, called from .ndo_open() and via CAN_MODE_START (bus-off restart), waits for the SR register to show the wanted operating state, with a 1 sec timeout. However, that register bit will only be set once the HW has observed 11 consecutive recessive bits (BusIdle) on the bus. If the bus will not see the 11 bits (e.g. it is stuck dominant), the function will timeout and return an error. If this was done as part of a scheduled restart from bus-off, the interface will stay in bus-off state forever even if the bus recovers later. According to M_CAN and FLEXCAN documentation they also wait for 11 consecutive recessive bits, but their drivers do not seem to wait for that. To make the behavior consistent, modify xilinx_can to also not wait for the synchronization to complete. The only way for users to know for sure that the bus has been joined successfully is to see successfully received or transmitted frames. That does not seem optimal, but it is consistent with other drivers and we should have a properly working restart-ms with xilinx_can. Tested on ZynqMP with Xilinx CAN-FD 1.0. Fixes: b1201e44f50b ("can: xilinx CAN controller support") Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi> Tested-by: Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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