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path: root/drivers/usb/dwc3
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2011-09-09usb: dwc3: ep0: fix 'transfered' typoFelipe Balbi
trivial patch. No functional changes. Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09usb: dwc3: core: add missing @ for kerneldocFelipe Balbi
trivial patch, no functional changes Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09usb: dwc3: debugfs: add a kfree() on error to dwc3_testmode_open()Dan Carpenter
We may as well fix this potential leak so we don't have to listen to the static checkers complain. Signed-off-by: Dan Carpenter <error27@gmail.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09usb: dwc3: gaget: clear DWC3_EP_WILL_SHUTDOWN bitSebastian Andrzej Siewior
Without this patch we won't clear that bit and instead will clear all other bits on our endpoint flag. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09usb: dwc3: gadget: use TRB type 6 for ISOC transfersSebastian Andrzej Siewior
Type 6 should be used for the first transfer during an interval. This is also what the reference driver is using. Type 7 seems to be for following or additional transfers within the same interval. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09usb: dwc3: gadget: reset resource index to zeroSebastian Andrzej Siewior
If we collected two requests together (i.e. only the last of them has LST=1) then we only have to stop transfer once: The clean-up code will cleanup everything until first TRB with the LST bit set. After XferComplete this index should be no longer valid since there is no transfer pending. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09usb: dwc3: gadget: fixing dequeue of TRBsSebastian Andrzej Siewior
A TRB which is dequeued seems to have its HWO bits set to 1. Therefore we ignore it if we dequeue it after the command is completed. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-08-24usb: fix dwc3 build when USB_GADGET_DWC3 is not enabledRandy Dunlap
Fix build error when CONFIG_USB_GADGET_DWC3 is not enabled: ERROR: "dwc3_send_gadget_ep_cmd" [drivers/usb/dwc3/dwc3.ko] undefined! Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-23USB: use usb_endpoint_maxp() instead of le16_to_cpu()Kuninori Morimoto
Now ${LINUX}/drivers/usb/* can use usb_endpoint_maxp(desc) to get maximum packet size instead of le16_to_cpu(desc->wMaxPacketSize). This patch fix it up Cc: Armin Fuerst <fuerst@in.tum.de> Cc: Pavel Machek <pavel@ucw.cz> Cc: Johannes Erdfelt <johannes@erdfelt.com> Cc: Vojtech Pavlik <vojtech@suse.cz> Cc: Oliver Neukum <oliver@neukum.name> Cc: David Kubicek <dave@awk.cz> Cc: Johan Hovold <jhovold@gmail.com> Cc: Brad Hards <bhards@bigpond.net.au> Acked-by: Felipe Balbi <balbi@ti.com> Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Thomas Dahlmann <dahlmann.thomas@arcor.de> Cc: David Brownell <david-b@pacbell.net> Cc: David Lopo <dlopo@chipidea.mips.com> Cc: Alan Stern <stern@rowland.harvard.edu> Cc: Michal Nazarewicz <m.nazarewicz@samsung.com> Cc: Xie Xiaobo <X.Xie@freescale.com> Cc: Li Yang <leoli@freescale.com> Cc: Jiang Bo <tanya.jiang@freescale.com> Cc: Yuan-hsin Chen <yhchen@faraday-tech.com> Cc: Darius Augulis <augulis.darius@gmail.com> Cc: Xiaochen Shen <xiaochen.shen@intel.com> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Cc: OKI SEMICONDUCTOR, <toshiharu-linux@dsn.okisemi.com> Cc: Robert Jarzmik <robert.jarzmik@free.fr> Cc: Ben Dooks <ben@simtec.co.uk> Cc: Thomas Abraham <thomas.ab@samsung.com> Cc: Herbert Pƶtzl <herbert@13thfloor.at> Cc: Arnaud Patard <arnaud.patard@rtp-net.org> Cc: Roman Weissgaerber <weissg@vienna.at> Acked-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Cc: Tony Olech <tony.olech@elandigitalsystems.com> Cc: Florian Floe Echtler <echtler@fs.tum.de> Cc: Christian Lucht <lucht@codemercs.com> Cc: Juergen Stuber <starblue@sourceforge.net> Cc: Georges Toth <g.toth@e-biz.lu> Cc: Bill Ryder <bryder@sgi.com> Cc: Kuba Ober <kuba@mareimbrium.org> Cc: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-23usb: include module.h in the DesignWare USB3 DRD driverStephen Rothwell
Fixes this build error: drivers/usb/dwc3/dwc3-pci.c: In function 'dwc3_pci_init': drivers/usb/dwc3/dwc3-pci.c:211:9: error: 'THIS_MODULE' undeclared (first use in this function) Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-22usb: Introduce DesignWare USB3 DRD DriverFelipe Balbi
The DesignWare USB3 is a highly configurable IP Core which can be instantiated as Dual-Role Device (DRD), Peripheral Only and Host Only (XHCI) configurations. Several other parameters can be configured like amount of FIFO space, amount of TX and RX endpoints, amount of Host Interrupters, etc. The current driver has been validated with a virtual model of version 1.73a of that core and with an FPGA burned with version 1.83a of the DRD core. We have support for PCIe bus, which is used on FPGA prototyping, and for the OMAP5, more adaptation (or glue) layers can be easily added and the driver is half prepared to handle any possible configuration the HW engineer has chosen considering we have the information on one of the GHWPARAMS registers to do runtime checking of certain features. More runtime checks can, and should, be added in order to make this driver even more flexible with regards to number of endpoints, FIFO sizes, transfer types, etc. While this supports only the device side, for now, we will add support for Host side (xHCI - see the updated series Sebastian has sent [1]) and OTG after we have it all stabilized. [1] http://marc.info/?l=linux-usb&m=131341992020339&w=2 Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>