summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2019-02-25cpufreq: ap806: add missing of_node_put after of_device_is_availableJulia Lawall
Add an of_node_put when a tested device node is not available. The semantic patch that fixes this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ identifier f; local idexpression e; expression x; @@ e = f(...); ... when != of_node_put(e) when != x = e when != e = x when any if (<+...of_device_is_available(e)...+>) { ... when != of_node_put(e) ( return e; | + of_node_put(e); return ...; ) } // </smpl> Fixes: f525a670533d9 ("cpufreq: ap806: add cpufreq driver for Armada 8K") Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2019-02-24net: hns3: fix improper error handling for hns3_client_startHuazhong Tan
If hns3_client_start() failed in the hns3_client_init(), register_dev() should be undo in its error handling. Fixes: a6d818e31d08 ("net: hns3: Add vport alive state checking support") Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: hns3: fix setting of the hns reset_type for rdma hw errorsShiju Jose
Presently the hns reset_type for the roce errors is set in the hclge_log_and_clear_rocee_ras_error function. This function is also called to detect and clear roce errors while enabling the rdma error interrupts. However there is no hns reset requested for this case. This can cause issue of wrong reset_type used with subsequent hns reset as the reset_type set in the above case was not cleared. This patch moves setting of hns reset_type for the roce errors from hclge_log_and_clear_rocee_ras_error function to hclge_handle_rocee_ras_error. Fixes: 630ba007f475 ("net: hns3: add handling of RDMA RAS errors") Reported-by: Huazhong Tan <tanhuazhong@huawei.com> Reported-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: hns3: fix get VF RSS issueJian Shen
For revision 0x20, VF shares the same RSS config with PF. In original codes, it always return 0 when query RSS hash key for VF. This patch fixes it by return the hash key got from PF. Fixes: 374ad291762a ("net: hns3: net: hns3: Add RSS general configuration support for VF") Signed-off-by: Jian Shen <shenjian15@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: hns3: enable VF VLAN filter for each VF when initializingJian Shen
For revision 0x21, the switch of VF VLAN filter is per function. It's necessary to enable VF VLAN filter for each VF when initializing. Otherwise, VF will be able to receive broadcast packets with unknown VLAN when PF enters promisc mode. Fixes: 64d114f0a750 ("net: hns3: Add egress/ingress vlan filter for revision 0x21") Signed-off-by: Jian Shen <shenjian15@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: hns3: add support to config depth for tx|rx ring separatelyPeng Li
This patch adds support to config depth for tx|rx ring separately by ethtool command "-G". Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: hns3: remove hnae3_get_bit in data pathYunsheng Lin
The hnae3_get_bit uses hnae3_get_field, and hnae3_get_field masks the data, which is unnecessary in data path. Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: hns3: replace hnae3_set_bit and hnae3_set_field in data pathYunsheng Lin
hnae3_set_bit and hnae3_set_field masks the data before setting the field or bit, which is unnecessary because the data is already zero initialized. Suggested-by: John Garry <john.garry@huawei.com> Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: hns3: add unlikely for error handling in data pathYunsheng Lin
This patch adds unlikely hint for error handling in critical data path. Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: hns3: remove some ops in struct hns3_nic_opsYunsheng Lin
The fill_desc ops has only one implementation, and get_rxd_bnum has not been used, so this patch removes them. Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: hns3: limit some variable scope in critical data pathYunsheng Lin
This patch limits some variables' scope as much as possible in hns3_fill_desc. Also, only set l3_type and l4_type when necessary. Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Huazhong tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: hns3: avoid mult + div op in critical data pathYunsheng Lin
This patch uses shift offset to avoid doing mult and div operation. Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: hns3: add xps setting support for hns3 driverYunsheng Lin
This patch adds xps setting support for hns3 driver based on the interrupt affinity info. Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24mlxsw: spectrum_acl: Add vregion migration end tracepointJiri Pirko
Hit the new tracepoint once the vregion migration ends. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24mlxsw: spectrum_acl: Don't take mutex in mlxsw_sp_acl_tcam_vregion_rehash_work()Jiri Pirko
Other mutexes are taking care of proper locking for this, no longer needed to take RTNL mutex here. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24mlxsw: spectrum_acl: Remove RTNL lock assertions from ERP codeJiri Pirko
No longer require RTNL lock in this code. Newly introduced mutexes take care of guarding objagg and bloom filter. There is no need to guard gen_pool_alloc()/gen_pool_free() as they are fine to be called lockless. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24mlxsw: spectrum_acl: Don't take rtnl lock during vregion_rehash_intrvl_set()Jiri Pirko
Relax dependency on rtnl mutex during vregion_rehash_intrvl_set(). The vregion list is protected with newly introduced mutex. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24mlxsw: spectrum_acl: Introduce a mutex to guard objagg instance manipulationJiri Pirko
Protect objagg structures by adding a mutex to ERP code and take it during the structure manipulation. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24mlxsw: spectrum_acl: Enable vregion rehash per-profileJiri Pirko
For MR ACL profile is does not make sense to do periodical rehashes, as there is only one mask in use during the whole vregion lifetime. Therefore periodical work is scheduled but the rehash never happens. So allow to enable/disable rehash for the whole group, which is added per-profile. Disable rehashing for MR profile. Addition to the vregion list is done only in case the rehash is enable on the particular vregion. Also, the addition is moved after delayed work init to avoid schedule of uninitialized work from vregion_rehash_intrvl_set(). Symmetrically, deletion from the list is done before canceling the delayed work so it is not scheduled by vregion_rehash_intrvl_set() again. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24mlxsw: spectrum_acl: Introduce mutex to guard Bloom Filter updatesJiri Pirko
Bloom filter is shared within multiple regions. For updates, it needs to be guarded by a separate mutex. Do that in order to not rely on RTNL mutex. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24mlxsw: spectrum_acl: Introduce vregion mutexJiri Pirko
In order to remove dependency on RTNL, introduce a mutex to guard vregion structure, list of chunks and list of entries in chunks. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24mlxsw: spectrum_acl: Refactor vregion association codeJiri Pirko
Refactor existing _vchunk_assoc/_vchunk_deassoc() functions into _vregion_get()/_vregion_put() to make the code simpler and prepared for vregion locking. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24mlxsw: spectrum_acl: Introduce a mutex to guard region list updatesJiri Pirko
In order to remove RTNL lock dependency, it is needed to protect the regions list in a group. Introduce a mutex to do the job. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24mlxsw: spectrum_acl: Split TCAM group structure into twoJiri Pirko
Make the existing group structure to contain fields needed for HW region list manipulations. Move the rest of the fields into new vgroup struct. This makes layering cleaner as the vgroup struct is on higher level than low-level group struct. Also, this makes it possible to introduce fine-grained locking. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24mlxsw: spectrum_acl: Remove unused ops field from group structureJiri Pirko
Never used, remove it. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: dsa: microchip: add port_cleanup functionTristram Ha
Add port_cleanup function to reset some device variables when the port is disabled. Add a mutex to make sure changing those variables is thread-safe. Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: dsa: microchip: remove unnecessary include headersTristram Ha
Remove unnecessary header include. Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: dsa: microchip: get port link statusTristram Ha
Get port link status to know whether to read MIB counters when the link is going down. Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: dsa: microchip: add MIB counter reading supportTristram Ha
Add background MIB counter reading support. Port MIB counters should only be read when there is link. Otherwise it is a waste of time as hardware never increases those counters. There are exceptions as some switches keep track of dropped counts no matter what. Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: dsa: microchip: prepare PHY for proper advertisementTristram Ha
Prepare PHY for proper advertisement as sometimes the PHY in the switch has its own problems even though it may share the PHY id from regular PHY but the fixes in the PHY driver do not apply. Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: phy: marvell10g: add support for the 88x2110 PHYMaxime Chevallier
This patch adds support for the 88x2110 PHY, which is similar to the already supported 88x3310 PHY without the SFP interface. It supports 10/100/1000BASET along with 2.5GBASET, 5GBASET and 10GBASET, with the same interface modes that are used by the 3310. This PHY don't have the same issue as the 88x3310 regarding 2.5/5G abilities, and correctly follows the 802.3bz standard to list the supported abilities. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Suggested-by: Antoine Tenart <antoine.tenart@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: mvpp2: Add 2.5GBaseT supportMaxime Chevallier
The PPv2 controller is able to support 2.5G speeds, allowing to use 2.5GBASET in conjunction with PHYs that use 2500BASEX as their MII interface when using this mode. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: phy: marvell10g: Force reading of 2.5/5GMaxime Chevallier
As per 802.3bz, if bit 14 of (1.11) "PMA Extended Abilities" indicates whether or not we should read register (1.21) "2.52/5G PMA Extended Abilities", which contains information on the support of 2.5GBASET and 5GBASET. After testing on several variants of PHYS of this family, it appears that bit 14 in (1.11) isn't always set when it should be. PHYs 88X3310 (on MacchiatoBin) and 88E2010 do support 2.5G and 5GBASET, but don't have 1.11.14 set. Their register 1.21 is filled with the correct values, indicating 2.5G and 5G support. PHYs 88E2110 do have their 1.11.14 bit set, as it should. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: phy: marvell10g: Use a #define for 88X3310 family idMaxime Chevallier
The PHY ID corresponding to the 88X3310 is also used for other PHYs in the same family, such as the 88E2010. Use a #define for the PHY id, that ignores the last nibble. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: phy: marvell10g: Use 2500BASEX when using 2.5GBASETMaxime Chevallier
The Marvell Alaska family of PHYs supports 2.5GBaseT and 5GBaseT modes, as defined in the 802.3bz specification. Upon establishing a 2.5GBASET link, the PHY will reconfigure it's MII interface to 2500BASEX. At 5G, the PHY will reconfigure it's interface to 5GBASE-R, but this mode isn't supported by any MAC for now. This was tested with : - The 88X3310, which is on the MacchiatoBin - The 88E2010, an Alaska PHY that has no fiber interfaces, and is limited to 5G maximum speed. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: phy: marvell10g: Use linkmode_set_bit helper instead of __set_bitMaxime Chevallier
Cosmetic patch making use of helpers dedicated to linkmodes handling. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: phy: marvell10g: Use get_features to get the PHY abilitiesMaxime Chevallier
The Alaska family of 10G PHYs has more abilities than the ones listed in PHY_10GBIT_FULL_FEATURES, the exact list depending on the model. Make use of the newly introduced .get_features call to build this list, using genphy_c45_pma_read_abilities to build the list of supported linkmodes, and adding autoneg ability based on what's reported by the AN MMD. .config_init is still used to validate the interface_mode. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: phy: check PMAPMD link status only in genphy_c45_read_linkHeiner Kallweit
The current code reports a link as up if all devices (except a few blacklisted ones) report the link as up. This breaks Aquantia AQCS109 for lower speeds because on this PHY the PCS link status reflects a 10G link only. For Marvell there's a similar issue, therefore PHYXS device isn't checked. There may be more PHYs where depending on the mode the link status of only selected devices is relevant. For now it seems to be sufficient to check the link status of the PMAPMD device only. Leave the loop in the code to be prepared in case we have to add functionality to check more than one device, depending on the mode. Successfully tested on a board with an AQCS109. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: Remove switchdev.h inclusion from team/bond/vlanFlorian Fainelli
This is no longer necessary after eca59f691566 ("net: Remove support for bridge bypass ndos from stacked devices") Suggested-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andy Gospodarek <andy@greyhouse.net> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24nfp: Remove switchdev.h inclusionFlorian Fainelli
This is no longer necessary after a5084bb71fa4 ("nfp: Implement ndo_get_port_parent_id()") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Jakub Kicinski <jakub.kicinski@netronome.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: lantiq: Do not use eth_change_mtu()Hauke Mehrtens
eth_change_mtu() is not needed any more, the networking subsystem will call it automatically when this callback is not implemented. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: dsa: lantiq: Add GPHY firmware filesHauke Mehrtens
This adds the file names of the FW files which this driver handles into the module description. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24vxlan: add ndo_change_proto_down supportAndy Roulin
Add ndo_change_proto_down support through dev_change_proto_down_generic for use by control protocols like VRRPD. Signed-off-by: Andy Roulin <aroulin@cumulusnetworks.com> Acked-by: Roopa Prabhu <roopa@cumulusnetworks.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24macvlan: add ndo_change_proto_down supportAndy Roulin
Add ndo_change_proto_down support through dev_change_proto_down_generic for use by control protocols like VRRPD. Signed-off-by: Andy Roulin <aroulin@cumulusnetworks.com> Acked-by: Roopa Prabhu <roopa@cumulusnetworks.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: phy: let genphy_c45_read_abilities also check aneg capabilityHeiner Kallweit
When using genphy_c45_read_abilities() as get_features callback we also have to set the autoneg capability in phydev->supported. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24Merge back earlier PM core material for v5.1.Rafael J. Wysocki
2019-02-24Merge back earlier cpufreq material for v5.1.Rafael J. Wysocki
2019-02-24ACPI/ACPICA: Trivial: fix spelling mistakes and fix whitespace formattingErik Schmauss
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-02-24ACPICA: ACPI 6.3: add Error Disconnect Recover Notification valueErik Schmauss
ACPICA commit 205ac8fc721073f1e609df963b14ef2237aeba73 Link: https://github.com/acpica/acpica/commit/205ac8fc Reviewed-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-02-24ACPICA: ACPI 6.3: add PCC operation region support for AML interpreterErik Schmauss
ACPICA commit a4849944e80f97970e99843f4975850753584a4e This change adds PCC operation region support in the AML interpreter and a default handler for acpiexec. According to the specification, the PCC operation region performs a transaction when the COMD field is written. This allows ASL to write data to other fields before sending the data. In order to accommodate this protocol, a temorary buffer is added to the regionfield object to accumulate writes. If any offset that spans COMD is written, the temporary buffer is sent to the PCC operation region handler to be processed. This change also renames the PCC keyword to platform_comm_channel. Link: https://github.com/acpica/acpica/commit/a4849944 Reviewed-by: Kyle Pelton <kyle.d.pelton@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
generated by cgit (git 2.34.1) at 2025-09-18 10:03:35 +0000