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2024-10-24thermal: core: Relocate thermal zone initialization routineRafael J. Wysocki
Move thermal_zone_device_init() along with thermal_zone_device_check() closer to the callers of the former, where they fit better together. No functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/1906685.CQOukoFCf9@rjwysocki.net
2024-10-24thermal: core: Use trip lists for trip crossing detectionRafael J. Wysocki
Modify the thermal core to use three lists of trip points: trips_high, containing trips with thresholds strictly above the current thermal zone temperature, trips_reached, containing trips with thresholds at or below the current zone temperature, trips_invalid, containing trips with temperature equal to THERMAL_ZONE_INVALID, where the first two lists are always sorted by the current trip threshold. For each trip in trips_high, there is no mitigation under way and the trip threshold is equal to its temperature. In turn, for each trip in trips_reached, there is mitigation under way and the trip threshold is equal to its low temperature. The trips in trips_invalid, of course, need not be taken into consideration. The idea is to make __thermal_zone_device_update() walk trips_high and trips_reached instead of walking the entire table of trip points in a thermal zone. Usually, it will only need to walk a few entries in one of the lists and check one entry in the other list, depending on the direction of the zone temperature changes, because crossing many trips by the zone temperature in one go between two consecutive temperature checks should be unlikely (if it occurs often, the thermal zone temperature should probably be checked more often either or there are too many trips). This also helps to eliminate one temporary trip list used for trip crossing notification (only one temporary list is needed for this purpose instead of two) and the remaining temporary list may be sorted by the current trip threshold value, like the trips_reached list, so the additional notify_temp field in struct thermal_trip_desc is not necessary any more. Moreover, since the trips_reached and trips_high lists are sorted, the "low" and "high" values needed by thermal_zone_set_trips() can be determined in a straightforward way by looking at one end of each list. Of course, additional work is needed in some places in order to maintain the ordering of the lists, but it is limited to situations that should be rare, like updating a trip point temperature or hysteresis, thermal zone initialization, or system resume. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/2003443.usQuhbGJ8B@rjwysocki.net [ rjw: Added a comment to thermal_zone_handle_trips() ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-10-24thermal: core: Eliminate thermal_zone_trip_down()Rafael J. Wysocki
Since thermal_zone_set_trip_temp() is now located in the same file as thermal_trip_crossed(), it can invoke the latter directly without using the thermal_zone_trip_down() wrapper that has no other users. Update thermal_zone_set_trip_temp() accordingly and drop thermal_zone_trip_down(). No functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/1807510.VLH7GnMWUR@rjwysocki.net
2024-10-24thermal: core: Relocate functions that update trip pointsRafael J. Wysocki
In preparation for subsequent changes, move two functions used for updating trip points, thermal_zone_set_trip_temp() and thermal_zone_set_trip_hyst(), to thermal_core.c. No functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/3248558.5fSG56mABF@rjwysocki.net
2024-10-24thermal: core: Move some trip processing to thermal_trip_crossed()Rafael J. Wysocki
Notice that some processing related to trip point crossing carried out in handle_thermal_trip() and thermal_zone_set_trip_temp() may as well be done in thermal_trip_crossed(), which allows code duplication to be reduced, so change the code accordingly. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/1982859.PYKUYFuaPT@rjwysocki.net
2024-10-24thermal: core: Pass trip descriptor to thermal_trip_crossed()Rafael J. Wysocki
In preparation for subsequent changes, modify thermal_trip_crossed() to take a trip descriptor pointer instead of a pointer to struct thermal_trip and propagate this change to thermal_zone_trip_down(). No functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/10547668.nUPlyArG6x@rjwysocki.net
2024-10-24thermal: core: Rearrange __thermal_zone_device_update()Rafael J. Wysocki
In preparation for subsequent changes, move the invocations of thermal_thresholds_handle() and thermal_zone_set_trips() in __thermal_zone_device_update() after the processing of the temporary trip lists. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/3323276.44csPzL39Z@rjwysocki.net
2024-10-24thermal: core: Prepare for moving trips between sorted listsRafael J. Wysocki
Subsequently, trips will be moved between sorted lists in multiple places, so replace add_trip_to_sorted_list() with an analogous function, move_trip_to_sorted_list(), that will move a given trip to a given sorted list. To allow list_del() used in the new function to work, initialize the list_node fields in trip descriptors where applicable so they are always valid. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/2960197.e9J7NaK4W3@rjwysocki.net
2024-10-24thermal: core: Rename trip list node in struct thermal_trip_descRafael J. Wysocki
Since the list node field in struct thermal_trip_desc is going to be used for purposes other than trip crossing notification, rename it to list_node. No functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/2201558.irdbgypaU6@rjwysocki.net
2024-10-24thermal: core: Build sorted lists instead of sorting them laterRafael J. Wysocki
Since it is not expected that multiple trip points will be crossed in one go very often (if this happens, there are too many trip points in the given thermal zone or they are checked too rarely), quite likely it is more efficient to build a sorted list of crossed trip points than to put them on an unsorted list and sort it later. Moreover, trip points are often sorted in ascending temperature order during thermal zone registration, so building a sorted list out of them is quite straightforward and relatively inexpensive. Accordingly, make handle_thermal_trip() maintain list ordering when adding trip points to the lists and get rid of separate list sorting in __thermal_zone_device_update(). No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/4930656.GXAFRqVoOG@rjwysocki.net
2024-10-24soc: qcom: socinfo: fix revision check in qcom_socinfo_probe()Manikanta Mylavarapu
In success case, the revision holds a non-null pointer. The current logic incorrectly returns an error for a non-null pointer, whereas it should return an error for a null pointer. The socinfo driver for IPQ9574 and IPQ5332 is currently broken, resulting in the following error message qcom-socinfo qcom-socinfo: probe with driver qcom-socinfo failed with error -12 Add a null check for the revision to ensure it returns an error only in failure case (null pointer). Fixes: e694d2b5c58b ("soc: qcom: Add check devm_kasprintf() returned value") Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241016144852.2888679-1-quic_mmanikan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-24thermal: thresholds: Fix thermal lock annotation issueDaniel Lezcano
When the thermal zone is unregistered (thermal sensor module being unloaded), no lock is held when flushing the thresholds. That results in a WARN when the lockdep validation is set in the kernel config. This has been reported by syzbot. As the thermal zone is in the process of being destroyed, there is no need to send a notification about purging the thresholds to the userspace as this one will receive a thermal zone deletion notification which imply the deletion of all the associated resources like the trip points or the user thresholds. Split the function thermal_thresholds_flush() into a lockless one without notification and its call with the lock annotation followed with the thresholds flushing notification. Please note this scenario is unlikely to happen, as the sensor drivers are usually compiled-in in order to have the thermal framework to be able to kick in at boot time if needed. Fixes: 445936f9e258 ("thermal: core: Add user thresholds support") Link: https://lore.kernel.org/all/67124175.050a0220.10f4f4.0012.GAE@google.com Reported-by: syzbot+f24dd060c1911fe54c85@syzkaller.appspotmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://patch.msgid.link/20241024102303.1086147-1-daniel.lezcano@linaro.org [ rjw: Subject edit, added Fixes tag ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-10-24thermal: netlink: Add the commands and the events for the thresholdsDaniel Lezcano
The thresholds exist but there is no notification neither action code related to them yet. These changes implement the netlink for the notifications when the thresholds are crossed, added, deleted or flushed as well as the commands which allows to get the list of the thresholds, flush them, add and delete. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/20241022155147.463475-3-daniel.lezcano@linaro.org [ rjw: Use the thermal_zone guard for locking, subject edit ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-10-24thermal: core: Manage thermal_governor_lock using a mutex guardRafael J. Wysocki
Switch over the thermal core to using a mutex guard for thermal_governor_lock management. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3679429.R56niFO833@rjwysocki.net Reviewed-by: Lukasz Luba <lukasz.luba@arm.com>
2024-10-24thermal: core: Separate thermal zone governor initializationRafael J. Wysocki
In preparation for a subsequent change that will switch over the thermal core to using a mutex guard for managing thermal_governor_lock, move the code running in thermal_zone_device_register_with_trips() under that lock into a separate function called thermal_zone_init_governor(). While at it, drop a useless comment. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/4408795.ejJDZkT8p0@rjwysocki.net Reviewed-by: Lukasz Luba <lukasz.luba@arm.com>
2024-10-24thermal: core: Add and use cooling device guardRafael J. Wysocki
Add and use a special guard for cooling devices. This allows quite a few error code paths to be simplified among other things and brings in code size reduction for a good measure. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/5837621.DvuYhMxLoT@rjwysocki.net Reviewed-by: Lukasz Luba <lukasz.luba@arm.com>
2024-10-24mmc: sdhci-pci-gli: enable UHS-II mode for GL9767Victor Shih
Changes are: * Enable the internal clock when do reset on UHS-II mode. * Increase timeout value before detecting UHS-II interface. * Add vendor settings for UHS-II mode. * Use the function sdhci_gli_wait_software_reset_done() for gl9767 reset. * Remove unnecessary code from sdhci_gl9767_reset(). Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Signed-off-by: Lucas Lai <lucas.lai@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-17-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-pci-gli: enable UHS-II mode for GL9755Victor Shih
Changes are: * Disable GL9755 overcurrent interrupt when power on/off on UHS-II. * Enable the internal clock when do reset on UHS-II mode. * Increase timeout value before detecting UHS-II interface. * Add vendor settings fro UHS-II mode. * Remove sdhci_gli_enable_internal_clock functon unused clk_ctrl variable. * Make a function sdhci_gli_wait_software_reset_done() for gl9755 reset. * Remove unnecessary code from sdhci_gl9755_reset(). Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Signed-off-by: Lucas Lai <lucas.lai@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-16-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-pci: add UHS-II support frameworkVictor Shih
This patch prepares for adding UHS-II support at a specific UHS-II capable sdhci-pci controller, GL9755 for now. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-15-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add pre-detect_init hookBen Chuang
This "pre" hook for detect_init(), uhs2_pre_detect_init, will be required to enable UHS-II support, at least, on GL9755. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-14-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add request() and othersVictor Shih
This is a sdhci version of mmc's request operation. It covers both UHS-I and UHS-II. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-13-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add irq() and othersVictor Shih
This is a UHS-II version of sdhci's request() operation. It handles UHS-II related command interrupts and errors. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-12-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add related functions to initialize the interfaceVictor Shih
UHS-II interface (related registers) will be initialized here. The operations include mmc's uhs2_set_reg operations, mmc's uhs2_detect_init operations, uhs2_[enable|disable]_clk operations. After detected the UHS-II interface, the host's UHS-II capabilities will be set up here and interrupts will also be enabled. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-11-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add set_ios()Victor Shih
This is a sdhci version of mmc's set_ios operation. This is used to handle basic IO bus setting. It covers both UHS-I and UHS-II. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-10-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add add_host() and others to set up the driverVictor Shih
This is a UHS-II version of sdhci's add_host/remove_host operation. Any sdhci drivers which are capable of handling UHS-II cards must call those functions instead of the corresponding sdhci's. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-9-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add set_timeout()Victor Shih
This is a UHS-II version of sdhci's set_timeout() operation. Use sdhci_uhs2_set_timeout() to set and calculate the timeout time. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-8-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add set_power() to support vdd2Victor Shih
This is a UHS-II version of sdhci's set_power operation. Use sdhci_uhs2_set_power() to set VDD2 for support UHS2 interface. VDD2, as well as VDD, is handled here. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-7-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add reset functionVictor Shih
Sdhci_uhs2_reset() does a UHS-II specific reset operation. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-6-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: dump UHS-II registersVictor Shih
Dump UHS-II specific registers, if available, in sdhci_dumpregs() for informative/debugging use. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-5-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci: add UHS-II module and add a kernel configurationVictor Shih
This patch adds sdhci-uhs2.c as a module for UHS-II support. This is a skeleton for further development in this patch series. This kernel configuration, CONFIG_MMC_SDHCI_UHS2, will be used in the following commits to indicate UHS-II specific code in sdhci controllers. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-4-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci: add UHS-II related definitions in headersVictor Shih
Add UHS-II related definitions in sdhci.h and sdhci-uhs2.h. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-3-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: core: Support UHS-II card control and accessVictor Shih
Embed UHS-II access/control functionality into the MMC request processing flow. Signed-off-by: Jason Lai <jason.lai@genesyslogic.com.tw> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Message-ID: <20241018105333.4569-2-victorshihgli@gmail.com> [Ulf: A couple of cleanups and fixed sd_uhs2_power_off()] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24perf/dwc_pcie: Convert the events with mixed case to lowercaseIlkka Koskinen
Group #1 events had both upper and lower case characters in their names. Trying to count such events with perf tool results in an error: $ perf stat -e dwc_rootport_10008/Tx_PCIe_TLP_Data_Payload/ sleep 1 event syntax error: 'dwc_rootport_10008/Tx_PCIe_TLP_Data_Payload/' \___ Bad event or PMU Unable to find PMU or event on a PMU of 'dwc_rootport_10008' event syntax error: '..port_10008/Tx_PCIe_TLP_Data_Payload/' \___ unknown term 'Tx_PCIe_TLP_Data_Payload' for pmu 'dwc_rootport_10008' valid terms: eventid,type,lane,config,config1,config2,config3,name,period,percore,metric-id Run 'perf list' for a list of valid events Usage: perf stat [<options>] [<command>] -e, --event <event> event selector. use 'perf list' to list available events Perf tool assumes the event names are either in lower or upper case. This is also mentioned in Documentation/ABI/testing/sysfs-bus-event_source-devices-events "As performance monitoring event names are case insensitive in the perf tool, the perf tool only looks for lower or upper case event names in sysfs to avoid scanning the directory. It is therefore required the name of the event here is either lower or upper case." Change the Group #1 events names to lower case. Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com> Link: https://lore.kernel.org/r/20241016210136.65452-1-ilkka@os.amperecomputing.com Signed-off-by: Will Deacon <will@kernel.org>
2024-10-24perf/cxlpmu: Support missing events in 3.1 specDavidlohr Bueso
Update the CXL PMU driver to support the new events introduced in the latest revision. These are: - read/write accesses with TEE constraints. - S2M indicating Modified state. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Signed-off-by: Davidlohr Bueso <dave@stgolabs.net> Link: https://lore.kernel.org/r/20241010025208.180458-1-dave@stgolabs.net Signed-off-by: Will Deacon <will@kernel.org>
2024-10-24perf: imx_perf: add support for i.MX91 platformXu Yang
This will add compatible and identifier for i.MX91 platform. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240924061251.3387850-2-xu.yang_2@nxp.com Signed-off-by: Will Deacon <will@kernel.org>
2024-10-24net: dsa: mv88e6xxx: support 4000ps cycle counter periodShenghao Yang
The MV88E6393X family of devices can run its cycle counter off an internal 250MHz clock instead of an external 125MHz one. Add support for this cycle counter period by adding another set of coefficients and lowering the periodic cycle counter read interval to compensate for faster overflows at the increased frequency. Otherwise, the PHC runs at 2x real time in userspace and cannot be synchronized. Fixes: de776d0d316f ("net: dsa: mv88e6xxx: add support for mv88e6393x family") Signed-off-by: Shenghao Yang <me@shenghaoyang.info> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2024-10-24net: dsa: mv88e6xxx: read cycle counter period from hardwareShenghao Yang
Instead of relying on a fixed mapping of hardware family to cycle counter frequency, pull this information from the MV88E6XXX_TAI_CLOCK_PERIOD register. This lets us support switches whose cycle counter frequencies depend on board design. Fixes: de776d0d316f ("net: dsa: mv88e6xxx: add support for mv88e6393x family") Suggested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shenghao Yang <me@shenghaoyang.info> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2024-10-24net: dsa: mv88e6xxx: group cycle counter coefficientsShenghao Yang
Instead of having them as individual fields in ptp_ops, wrap the coefficients in a separate struct so they can be referenced together. Fixes: de776d0d316f ("net: dsa: mv88e6xxx: add support for mv88e6393x family") Signed-off-by: Shenghao Yang <me@shenghaoyang.info> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2024-10-24net: usb: qmi_wwan: add Fibocom FG132 0x0112 compositionReinhard Speyerer
Add Fibocom FG132 0x0112 composition: T: Bus=03 Lev=02 Prnt=06 Port=01 Cnt=02 Dev#= 10 Spd=12 MxCh= 0 D: Ver= 2.01 Cls=00(>ifc ) Sub=00 Prot=00 MxPS=64 #Cfgs= 1 P: Vendor=2cb7 ProdID=0112 Rev= 5.15 S: Manufacturer=Fibocom Wireless Inc. S: Product=Fibocom Module S: SerialNumber=xxxxxxxx C:* #Ifs= 4 Cfg#= 1 Atr=a0 MxPwr=500mA I:* If#= 0 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=50 Driver=qmi_wwan E: Ad=82(I) Atr=03(Int.) MxPS= 8 Ivl=32ms E: Ad=81(I) Atr=02(Bulk) MxPS= 64 Ivl=0ms E: Ad=01(O) Atr=02(Bulk) MxPS= 64 Ivl=0ms I:* If#= 1 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=ff Prot=30 Driver=option E: Ad=02(O) Atr=02(Bulk) MxPS= 64 Ivl=0ms E: Ad=83(I) Atr=02(Bulk) MxPS= 64 Ivl=0ms I:* If#= 2 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=40 Driver=option E: Ad=85(I) Atr=03(Int.) MxPS= 10 Ivl=32ms E: Ad=84(I) Atr=02(Bulk) MxPS= 64 Ivl=0ms E: Ad=03(O) Atr=02(Bulk) MxPS= 64 Ivl=0ms I:* If#= 3 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=00 Prot=00 Driver=option E: Ad=86(I) Atr=02(Bulk) MxPS= 64 Ivl=0ms E: Ad=04(O) Atr=02(Bulk) MxPS= 64 Ivl=0ms Signed-off-by: Reinhard Speyerer <rspmn@arcor.de> Link: https://patch.msgid.link/ZxLKp5YZDy-OM0-e@arcor.de Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2024-10-24hv_netvsc: Fix VF namespace also in synthetic NIC NETDEV_REGISTER eventHaiyang Zhang
The existing code moves VF to the same namespace as the synthetic NIC during netvsc_register_vf(). But, if the synthetic device is moved to a new namespace after the VF registration, the VF won't be moved together. To make the behavior more consistent, add a namespace check for synthetic NIC's NETDEV_REGISTER event (generated during its move), and move the VF if it is not in the same namespace. Cc: stable@vger.kernel.org Fixes: c0a41b887ce6 ("hv_netvsc: move VF to same namespace as netvsc device") Suggested-by: Stephen Hemminger <stephen@networkplumber.org> Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/1729275922-17595-1-git-send-email-haiyangz@microsoft.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2024-10-24net: dsa: microchip: disable EEE for KSZ879x/KSZ877x/KSZ876xTim Harvey
The well-known errata regarding EEE not being functional on various KSZ switches has been refactored a few times. Recently the refactoring has excluded several switches that the errata should also apply to. Disable EEE for additional switches with this errata and provide additional comments referring to the public errata document. The original workaround for the errata was applied with a register write to manually disable the EEE feature in MMD 7:60 which was being applied for KSZ9477/KSZ9897/KSZ9567 switch ID's. Then came commit 26dd2974c5b5 ("net: phy: micrel: Move KSZ9477 errata fixes to PHY driver") and commit 6068e6d7ba50 ("net: dsa: microchip: remove KSZ9477 PHY errata handling") which moved the errata from the switch driver to the PHY driver but only for PHY_ID_KSZ9477 (PHY ID) however that PHY code was dead code because an entry was never added for PHY_ID_KSZ9477 via MODULE_DEVICE_TABLE. This was apparently realized much later and commit 54a4e5c16382 ("net: phy: micrel: add Microchip KSZ 9477 to the device table") added the PHY_ID_KSZ9477 to the PHY driver but as the errata was only being applied to PHY_ID_KSZ9477 it's not completely clear what switches that relates to. Later commit 6149db4997f5 ("net: phy: micrel: fix KSZ9477 PHY issues after suspend/resume") breaks this again for all but KSZ9897 by only applying the errata for that PHY ID. Following that this was affected with commit 08c6d8bae48c("net: phy: Provide Module 4 KSZ9477 errata (DS80000754C)") which removes the blatant register write to MMD 7:60 and replaces it by setting phydev->eee_broken_modes = -1 so that the generic phy-c45 code disables EEE but this is only done for the KSZ9477_CHIP_ID (Switch ID). Lastly commit 0411f73c13af ("net: dsa: microchip: disable EEE for KSZ8567/KSZ9567/KSZ9896/KSZ9897.") adds some additional switches that were missing to the errata due to the previous changes. This commit adds an additional set of switches. Fixes: 0411f73c13af ("net: dsa: microchip: disable EEE for KSZ8567/KSZ9567/KSZ9896/KSZ9897.") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://patch.msgid.link/20241018160658.781564-1-tharvey@gateworks.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2024-10-24reset: mchp: sparx5: set the dev member of the reset controllerClément Léger
In order to guarantee the device will not be deleted by the reset controller consumer, set the dev member of the reset controller. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20241014124636.24221-7-herve.codina@bootlin.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2024-10-24reset: mchp: sparx5: Allow building as a moduleClément Léger
This reset controller can be used by the LAN966x PCI device. The LAN966x PCI device driver can be built as a module and this reset controller driver has no reason to be a builtin driver in that case. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20241014124636.24221-6-herve.codina@bootlin.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2024-10-24reset: mchp: sparx5: Add MCHP_LAN966X_PCI dependencyHerve Codina
The sparx5 reset controller depends on the SPARX5 architecture or the LAN966x SoC. This reset controller can be used by the LAN966x PCI device and so it needs to be available when the LAN966x PCI device is enabled. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20241014124636.24221-5-herve.codina@bootlin.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2024-10-24reset: mchp: sparx5: Map cpu-syscon locally in case of LAN966xHerve Codina
In the LAN966x PCI device use case, the syscon API cannot be used as it does not support device removal [1]. A syscon device is a core "system" device and not a device available in some addon boards and so, it is not supposed to be removed. The syscon API follows this assumption but this assumption is no longer valid in the LAN966x use case. In order to avoid the use of the syscon API and so, support for removal, use a local mapping of the syscon device. Link: https://lore.kernel.org/all/20240923100741.11277439@bootlin.com/ [1] Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20241014124636.24221-4-herve.codina@bootlin.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2024-10-24misc: Add support for LAN966x PCI deviceHerve Codina
Add a PCI driver that handles the LAN966x PCI device using a device-tree overlay. This overlay is applied to the PCI device DT node and allows to describe components that are present in the device. The memory from the device-tree is remapped to the BAR memory thanks to "ranges" properties computed at runtime by the PCI core during the PCI enumeration. The PCI device itself acts as an interrupt controller and is used as the parent of the internal LAN966x interrupt controller to route the interrupts to the assigned PCI INTx interrupt. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Bjorn Helgaas <bhelgaas@google.com> # quirks.c Link: https://lore.kernel.org/r/20241014124636.24221-2-herve.codina@bootlin.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2024-10-24ata: libata: Set DID_TIME_OUT for commands that actually timed outNiklas Cassel
When ata_qc_complete() schedules a command for EH using ata_qc_schedule_eh(), blk_abort_request() will be called, which leads to req->q->mq_ops->timeout() / scsi_timeout() being called. scsi_timeout(), if the LLDD has no abort handler (libata has no abort handler), will set host byte to DID_TIME_OUT, and then call scsi_eh_scmd_add() to add the command to EH. Thus, when commands first enter libata's EH strategy_handler, all the commands that have been added to EH will have DID_TIME_OUT set. Commit e5dd410acb34 ("ata: libata: Clear DID_TIME_OUT for ATA PT commands with sense data") clears this bogus DID_TIME_OUT flag for all commands that reached libata's EH strategy_handler. libata has its own flag (AC_ERR_TIMEOUT), that it sets for commands that have not received a completion at the time of entering EH. ata_eh_worth_retry() has no special handling for AC_ERR_TIMEOUT, so by default timed out commands will get flag ATA_QCFLAG_RETRY set, and will be retried after the port has been reset (ata_eh_link_autopsy() always triggers a port reset if any command has AC_ERR_TIMEOUT set). For a command that has ATA_QCFLAG_RETRY set, while also having an error flag set (e.g. AC_ERR_TIMEOUT), ata_eh_finish() will not increment scmd->allowed, so the command will at most be retried scmd->allowed number of times (which by default is set to 3). However, scsi_eh_flush_done_q() will only retry commands for which scsi_noretry_cmd() returns false. For a command that has DID_TIME_OUT set, while also having either the FAILFAST flag set, or the command being a passthrough command, scsi_noretry_cmd() will return true. Thus, such a command will never be retried. Thus, make sure that libata sets SCSI's DID_TIME_OUT flag for commands that actually timed out (libata's AC_ERR_TIMEOUT flag), such that timed out commands will once again not be retried if they are also a FAILFAST or passthrough command. Cc: stable@vger.kernel.org Fixes: e5dd410acb34 ("ata: libata: Clear DID_TIME_OUT for ATA PT commands with sense data") Reported-by: Lai, Yi <yi1.lai@linux.intel.com> Closes: https://lore.kernel.org/linux-ide/ZxYz871I3Blsi30F@ly-workstation/ Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Link: https://lore.kernel.org/r/20241023105540.1070012-2-cassel@kernel.org Signed-off-by: Niklas Cassel <cassel@kernel.org>
2024-10-24gpio: mb86s7x: remove some dead code in mb86s70_gpio_to_irq()Dan Carpenter
The platform_get_irq() function never returns zero so delete this check. Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/b7f3a78b-7163-42a0-bd09-8b3184f29661@stanley.mountain Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-10-23spi: spi-fsl-dspi: Fix crash when not using GPIO chip selectFrank Li
Add check for the return value of spi_get_csgpiod() to avoid passing a NULL pointer to gpiod_direction_output(), preventing a crash when GPIO chip select is not used. Fix below crash: [ 4.251960] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000 [ 4.260762] Mem abort info: [ 4.263556] ESR = 0x0000000096000004 [ 4.267308] EC = 0x25: DABT (current EL), IL = 32 bits [ 4.272624] SET = 0, FnV = 0 [ 4.275681] EA = 0, S1PTW = 0 [ 4.278822] FSC = 0x04: level 0 translation fault [ 4.283704] Data abort info: [ 4.286583] ISV = 0, ISS = 0x00000004, ISS2 = 0x00000000 [ 4.292074] CM = 0, WnR = 0, TnD = 0, TagAccess = 0 [ 4.297130] GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0 [ 4.302445] [0000000000000000] user address but active_mm is swapper [ 4.308805] Internal error: Oops: 0000000096000004 [#1] PREEMPT SMP [ 4.315072] Modules linked in: [ 4.318124] CPU: 2 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.12.0-rc4-next-20241023-00008-ga20ec42c5fc1 #359 [ 4.328130] Hardware name: LS1046A QDS Board (DT) [ 4.332832] pstate: 40000005 (nZcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 4.339794] pc : gpiod_direction_output+0x34/0x5c [ 4.344505] lr : gpiod_direction_output+0x18/0x5c [ 4.349208] sp : ffff80008003b8f0 [ 4.352517] x29: ffff80008003b8f0 x28: 0000000000000000 x27: ffffc96bcc7e9068 [ 4.359659] x26: ffffc96bcc6e00b0 x25: ffffc96bcc598398 x24: ffff447400132810 [ 4.366800] x23: 0000000000000000 x22: 0000000011e1a300 x21: 0000000000020002 [ 4.373940] x20: 0000000000000000 x19: 0000000000000000 x18: ffffffffffffffff [ 4.381081] x17: ffff44740016e600 x16: 0000000500000003 x15: 0000000000000007 [ 4.388221] x14: 0000000000989680 x13: 0000000000020000 x12: 000000000000001e [ 4.395362] x11: 0044b82fa09b5a53 x10: 0000000000000019 x9 : 0000000000000008 [ 4.402502] x8 : 0000000000000002 x7 : 0000000000000007 x6 : 0000000000000000 [ 4.409641] x5 : 0000000000000200 x4 : 0000000002000000 x3 : 0000000000000000 [ 4.416781] x2 : 0000000000022202 x1 : 0000000000000000 x0 : 0000000000000000 [ 4.423921] Call trace: [ 4.426362] gpiod_direction_output+0x34/0x5c (P) [ 4.431067] gpiod_direction_output+0x18/0x5c (L) [ 4.435771] dspi_setup+0x220/0x334 Fixes: 9e264f3f85a5 ("spi: Replace all spi->chip_select and spi->cs_gpiod references with function call") Cc: stable@vger.kernel.org Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20241023203032.1388491-1-Frank.Li@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-10-23EDAC/{skx_common,i10nm}: Fix incorrect far-memory error source indicatorQiuxu Zhuo
The Granite Rapids CPUs with Flat2LM memory configurations may mistakenly report near-memory errors as far-memory errors, resulting in the invalid decoded ADXL results: EDAC skx: Bad imc -1 Fix this incorrect far-memory error source indicator by prefetching the decoded far-memory controller ID, and adjust the error source indicator to near-memory if the far-memory controller ID is invalid. Fixes: ba987eaaabf9 ("EDAC/i10nm: Add Intel Granite Rapids server support") Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Tested-by: Diego Garcia Rodriguez <diego.garcia.rodriguez@intel.com> Link: https://lore.kernel.org/r/20241015072236.24543-3-qiuxu.zhuo@intel.com