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2021-12-21net/mlx5e: Save memory by using dynamic allocation in netdev privTariq Toukan
Many arrays in priv are statically allocated with a pre-defined maximum (for num channels, num TCs, etc...), that is in some cases significantly larger than the actual maximum. Examples: - The more VFs are supported, the less MSIX vectors each of them could have. This limits the max_nch for each. - Systems with limited number of cores or MSIX (< 64). - Netdev profiles that do not support: QoS (DCB / HTB), PTP TX port timestamping. Here we save some amount of memory by moving several structures and arrays to follow the actual maximum instead. This patch also prepares the code for even more savings to follow. For example, on a system where the maximum num of channel is 8, the channels stats structs alone go down from 3648*64 = 228 KB to 3648*8 = 28.5 KB per interface. This is important for environments with high number of VFs/SFs or limited memory. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Reviewed-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5e: Add profile indications for PTP and QOS HTB featuresTariq Toukan
Let the profile indicate support of the PTP and HTB (QOS) features. This unifies the logic that calculates the number of netdev queues needed for the features, and allows simplification of mlx5e_create_netdev(), which no longer requires number of rx/tx queues as parameters. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Reviewed-by: Aya Levin <ayal@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5e: Use bitmap field for profile featuresTariq Toukan
Use a features bitmap field in mlx5e_profile to declare profile support state of the different features. Let it replace the existing rx_ptp_support boolean. It will be extended to cover more features in a downstream patch. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5: Remove the repeated declarationShaokun Zhang
Function 'mlx5_esw_vport_match_metadata_supported' and 'mlx5_esw_offloads_vport_metadata_set' are declared twice, so remove the repeated declaration and blank line. Cc: Saeed Mahameed <saeedm@nvidia.com> Cc: Leon Romanovsky <leon@kernel.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5: Let user configure max_macs generic paramShay Drory
Currently, max_macs is taking 70Kbytes of memory per function. This size is not needed in all use cases, and is critical with large scale. Hence, allow user to configure the number of max_macs. For example, to reduce the number of max_macs to 1, execute:: $ devlink dev param set pci/0000:00:0b.0 name max_macs value 1 \ cmode driverinit $ devlink dev reload pci/0000:00:0b.0 Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Reviewed-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5: Let user configure event_eq_size paramShay Drory
Event EQ is an EQ which received the notification of almost all the events generated by the NIC. Currently, each event EQ is taking 512KB of memory. This size is not needed in most use cases, and is critical with large scale. Hence, allow user to configure the size of the event EQ. For example to reduce event EQ size to 64, execute:: $ devlink dev param set pci/0000:00:0b.0 name event_eq_size value 64 \ cmode driverinit $ devlink dev reload pci/0000:00:0b.0 Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5: Let user configure io_eq_size paramShay Drory
Currently, each I/O EQ is taking 128KB of memory. This size is not needed in all use cases, and is critical with large scale. Hence, allow user to configure the size of I/O EQs. For example, to reduce I/O EQ size to 64, execute: $ devlink dev param set pci/0000:00:0b.0 name io_eq_size value 64 \ cmode driverinit $ devlink dev reload pci/0000:00:0b.0 Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-22drm/exynos: drop the use of label from exynos_dsi_register_te_irqInki Dae
Dropped the use of 'out' label from exynos_dsi_register_te_irq function because the label isn't needed. This patch returns an error in each error case directly not going to 'out' label. With this patch build warning[1] is also fixed, which was reported by kernel test robot <lkp@intel.com> [1] https://www.spinics.net/lists/dri-devel/msg323803.html Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2021-12-22drm/exynos: remove useless type conversionBernard Zhao
This change is to cleanup the code a bit. Signed-off-by: Bernard Zhao <bernard@vivo.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2021-12-22drm/exynos: Implement mmap as GEM object functionThomas Zimmermann
Moving the driver-specific mmap code into a GEM object function allows for using DRM helpers for various mmap callbacks. The respective exynos functions are being removed. The file_operations structure exynos_drm_driver_fops is now being created by the helper macro DEFINE_DRM_GEM_FOPS(). Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Fixed merge conflict. Signed-off-by: Inki Dae <inki.dae@samsung.com>
2021-12-22drm/exynos: Replace legacy gpio interface for gpiod interfaceMaíra Canal
Considering the current transition of the GPIO subsystem, remove all dependencies of the legacy GPIO interface (linux/gpio.h and linux /of_gpio.h) and replace it with the descriptor-based GPIO approach. Signed-off-by: Maíra Canal <maira.canal@usp.br> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2021-12-22pinctrl: Propagate firmware node from a parent deviceAndy Shevchenko
When creating MFD platform devices the firmware node is left unset. This, in particular, prevents GPIO library to use it for different purposes. Propagate firmware node from the parent device and let GPIO library do the right thing. While at it, slightly modify the headers to reflect the usage of APIs. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Link: https://lore.kernel.org/r/20211216151227.58687-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-22pinctrl: add one more "const" for generic function groupsRafał Miłecki
Generic code doesn't modify those strings and .get_function_groups callback has that extra "const" as well. This allows more flexibility in GENERIC_PINMUX_FUNCTIONS users. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211216162206.8027-4-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-22pinctrl: keembay: rework loops looking for groups namesRafał Miłecki
Make the outer loop iterate over functions as that's the real subject. This simplifies code (and reduces amount of lines of code) as allocating memory for names doesn't require extra checks anymore. While at it use local "group_names" variable. The plan for "struct function_desc" is to make its "group_names" /double/ const. That will allow drivers to use it with static const data. This keembay "group_names" change is required to avoid: drivers/pinctrl/pinctrl-keembay.c: In function 'keembay_add_functions': drivers/pinctrl/pinctrl-keembay.c:1594:8: warning: assignment discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers] 1594 | grp = func->group_names; | ^ Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211216162206.8027-3-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-22pinctrl: keembay: comment process of building functions a bitRafał Miłecki
This should make code a bit easier to follow. While at it use some "for" loops to simplify array iteration loops. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211216162206.8027-2-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-22pinctrl: imx: prepare for making "group_names" in "function_desc" constRafał Miłecki
The plan for "struct function_desc" is to make its "group_names" /double/ const. That will allow drivers to use it with static const data. This imx change is required to avoid: drivers/pinctrl/freescale/pinctrl-imx.c: In function 'imx_pinctrl_parse_functions': drivers/pinctrl/freescale/pinctrl-imx.c:672:24: error: assignment of read-only location '*(func->group_names + (sizetype)(i * 4))' 672 | func->group_names[i] = child->name; | ^ Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211216162206.8027-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-21Merge branch '1GbE' of ↵Jakub Kicinski
git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue Tony Nguyen says: ==================== 1GbE Intel Wired LAN Driver Updates 2021-12-21 This series contains updates to igc, igb, igbvf, and fm10k drivers. Sasha removes unused defines and enum values from igc driver. Jason Wang removes a variable whose value never changes and, instead, returns the value directly for igb. Karen adjusts a reset message from warning to info for igbvf. Xiang wangx removes a repeated word for fm10k. * '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue: fm10k: Fix syntax errors in comments igbvf: Refactor trace igb: remove never changed variable `ret_val' igc: Remove obsolete define igc: Remove obsolete mask igc: Remove obsolete nvm type igc: Remove unused phy type igc: Remove unused _I_PHY_ID define ==================== Link: https://lore.kernel.org/r/20211221180200.3176851-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-12-21net: phy: micrel: Adding interrupt support for Link up/Link down in LAN8814 ↵Divya Koppera
Quad phy This patch add support for Link up or Link down interrupt support in LAN8814 Quad phy Signed-off-by: Divya Koppera <Divya.Koppera@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20211221112217.9502-1-Divya.Koppera@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-12-21bonding: fix ad_actor_system option setting to defaultFernando Fernandez Mancera
When 802.3ad bond mode is configured the ad_actor_system option is set to "00:00:00:00:00:00". But when trying to set the all-zeroes MAC as actors' system address it was failing with EINVAL. An all-zeroes ethernet address is valid, only multicast addresses are not valid values. Fixes: 171a42c38c6e ("bonding: add netlink support for sys prio, actor sys mac, and port key") Signed-off-by: Fernando Fernandez Mancera <ffmancera@riseup.net> Acked-by: Jay Vosburgh <jay.vosburgh@canonical.com> Link: https://lore.kernel.org/r/20211221111345.2462-1-ffmancera@riseup.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-12-21Bluetooth: btusb: Add two more Bluetooth parts for WCN6855Zijun Hu
Add USB IDs (0x10ab, 0x9309) and (0x10ab, 0x9409) to usb_device_id table for WCN6855. * /sys/kernel/debug/usb/devices T: Bus=02 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#= 10 Spd=12 MxCh= 0 D: Ver= 1.10 Cls=e0(wlcon) Sub=01 Prot=01 MxPS=64 #Cfgs= 1 P: Vendor=10ab ProdID=9309 Rev= 0.01 C:* #Ifs= 2 Cfg#= 1 Atr=e0 MxPwr=100mA I:* If#= 0 Alt= 0 #EPs= 3 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=81(I) Atr=03(Int.) MxPS= 16 Ivl=1ms E: Ad=82(I) Atr=02(Bulk) MxPS= 64 Ivl=0ms E: Ad=02(O) Atr=02(Bulk) MxPS= 64 Ivl=0ms I:* If#= 1 Alt= 0 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 0 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 0 Ivl=1ms I: If#= 1 Alt= 1 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 9 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 9 Ivl=1ms I: If#= 1 Alt= 2 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 17 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 17 Ivl=1ms I: If#= 1 Alt= 3 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 25 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 25 Ivl=1ms I: If#= 1 Alt= 4 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 33 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 33 Ivl=1ms I: If#= 1 Alt= 5 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 49 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 49 Ivl=1ms I: If#= 1 Alt= 6 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 63 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 63 Ivl=1ms I: If#= 1 Alt= 7 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 65 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 65 Ivl=1ms T: Bus=02 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#= 11 Spd=12 MxCh= 0 D: Ver= 1.10 Cls=e0(wlcon) Sub=01 Prot=01 MxPS=64 #Cfgs= 1 P: Vendor=10ab ProdID=9409 Rev= 0.01 C:* #Ifs= 2 Cfg#= 1 Atr=e0 MxPwr=100mA I:* If#= 0 Alt= 0 #EPs= 3 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=81(I) Atr=03(Int.) MxPS= 16 Ivl=1ms E: Ad=82(I) Atr=02(Bulk) MxPS= 64 Ivl=0ms E: Ad=02(O) Atr=02(Bulk) MxPS= 64 Ivl=0ms I:* If#= 1 Alt= 0 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 0 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 0 Ivl=1ms I: If#= 1 Alt= 1 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 9 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 9 Ivl=1ms I: If#= 1 Alt= 2 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 17 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 17 Ivl=1ms I: If#= 1 Alt= 3 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 25 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 25 Ivl=1ms I: If#= 1 Alt= 4 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 33 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 33 Ivl=1ms I: If#= 1 Alt= 5 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 49 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 49 Ivl=1ms I: If#= 1 Alt= 6 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 63 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 63 Ivl=1ms I: If#= 1 Alt= 7 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb E: Ad=83(I) Atr=01(Isoc) MxPS= 65 Ivl=1ms E: Ad=03(O) Atr=01(Isoc) MxPS= 65 Ivl=1ms Signed-off-by: Zijun Hu <quic_zijuhu@quicinc.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org> Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2021-12-21Merge tag 'pm-5.16-rc7' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management fix from Rafael Wysocki: "Fix a recent regression causing the loop in dpm_prepare() to become infinite if one of the device ->prepare() callbacks returns an error" * tag 'pm-5.16-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: PM: sleep: Fix error handling in dpm_prepare()
2021-12-21drm/i915/guc: Request RP0 before loading firmwareVinay Belgaumkar
By default, GT (and GuC) run at RPn. Requesting for RP0 before firmware load can speed up DMA and HuC auth as well. In addition to writing to 0xA008, we also need to enable swreq in 0xA024 so that Punit will pay heed to our request. SLPC will restore the frequency back to RPn after initialization, but we need to manually do that for the non-SLPC path. We don't need a manual override in the SLPC disabled case, just use the intel_rps_set function to ensure consistent RPS state. Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Reviewed-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211216233022.21351-1-vinay.belgaumkar@intel.com
2021-12-21platform/x86: asus-wmi: Reshuffle headers for better maintenanceAndy Shevchenko
Reshuffle headers in alphabetical order for better maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20211210163009.19894-3-andriy.shevchenko@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-21platform/x86: asus-wmi: Split MODULE_AUTHOR() on per author basisAndy Shevchenko
There are as many as needed MODULE_AUTHOR() macro entries allowed in the single driver. Split author list to a few macro entries. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20211210163009.19894-2-andriy.shevchenko@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-21platform/x86: asus-wmi: Join string literals backAndy Shevchenko
For easy grepping on debug purposes join string literals back in the messages. No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20211210163009.19894-1-andriy.shevchenko@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-21platform/x86: apple-gmux: use resource_size() with resWang Qing
This should be (res->end - res->start + 1) here actually, use resource_size() derectly. Signed-off-by: Wang Qing <wangqing@vivo.com> Link: https://lore.kernel.org/r/1639484316-75873-1-git-send-email-wangqing@vivo.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-21platform/x86: amd-pmc: only use callbacks for suspendMario Limonciello
This driver is intended to be used exclusively for suspend to idle so callbacks to send OS_HINT during hibernate and S5 will set OS_HINT at the wrong time leading to an undefined behavior. Cc: stable@vger.kernel.org Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20211210143529.10594-1-mario.limonciello@amd.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-21platform/mellanox: mlxbf-pmc: Fix an IS_ERR() vs NULL bug in ↵Miaoqian Lin
mlxbf_pmc_map_counters The devm_ioremap() function returns NULL on error, it doesn't return error pointers. Also according to doc of device_property_read_u64_array, values in info array are properties of device or NULL. Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20211210070753.10761-1-linmq006@gmail.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-21rtw88: support SAR via kernel common APIZong-Zhe Yang
Register cfg80211_sar_capa with type NL80211_SAR_TYPE_POWER and four frequency ranges for configurations in unit of 0.25 dBm. And handle callback set_sar_specs. Originally, TX power has three main parameters, i.e. power base, power by rate, and power limit. The formula can be simply considered as TX power = power base + min(power by rate, power limit). With the support of SAR which can be treated as another power limit, there is one more parameter for TX power. And the formula will evolve into TX power = power base + min(power by rate, power limit, power sar). Besides, debugfs tx_pwr_tbl is also refined to show SAR information. The following is an example for the difference. Before supporting SAR, ----------------------------------- ... path rate pwr base (byr lmt ) rem A CCK_1M 66(0x42) 78 -12 ( 12 -12) 0 A CCK_2M 66(0x42) 78 -12 ( 8 -12) 0 ... ----------------------------------- After supporting SAR and making some configurations, ----------------------------------- ... path rate pwr base (byr lmt sar ) rem A CCK_1M 62(0x3e) 78 -16 ( 12 -12 -16) 0 A CCK_2M 62(0x3e) 78 -16 ( 8 -12 -16) 0 ... ----------------------------------- Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20211220093656.65312-1-pkshih@realtek.com
2021-12-21rtw88: 8822c: add ieee80211_ops::hw_scanPo-Hao Huang
Declare this function allows us to use customized scanning policy. By doing so we can be more time efficient on each scan. In order to make existing coex mechanism work as usual, firmware notifies driver on each channel switch event, then decide antenna ownership based on the current channel/band. Do note that this new mechanism affects throughput more than the sw_scan we used to have, but the overall average throughput is not affected since each scan take less time. Since the firmware size is limited, we only support probe requests with custom IEs length under 128 bytes for now, if any user space tools requires more than that, we'll introduce related changes afterwards. For backward compatibility, we fallback to sw_scan when using older firmware that does not support this feature. Signed-off-by: Po-Hao Huang <phhuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20211221085010.39421-1-pkshih@realtek.com
2021-12-21Merge tag 'iwlwifi-next-for-kalle-2021-12-21-v2' of ↵Kalle Valo
git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-next wlwifi patches for v5.17 v2 * Support for Time-Aware-SAR (TAS) as read from the BIOS; * Fix scan timeout issue when 6GHz is enabled; * Work continues for new HW family Bz; * Support for Optimized Connectivity Experience (OCE) scan; * A bunch of FW debugging improvements and fixes; * Fix one 32-bit compilation issue; * Some RX changes for new HW family * Some fixes for 6 GHz scan; * Fix SAR table fixes with newer platforms; * Fix early restart crash; * Small fix in the debugging code; * Add new Killer device IDs; * Datapath updates for Bz family continues; * A couple of important fixes in iwlmei; * Some other small fixes, clean-ups and improvements.
2021-12-21platform/x86: think-lmi: Prevent underflow in index_store()Dan Carpenter
There needs to be a check to prevent negative offsets for setting->index. I have reviewed this code and I think that the "if (block->instance_count <= instance)" check in __query_block() will prevent this from resulting in an out of bounds access. But it's still worth fixing. Fixes: 640a5fa50a42 ("platform/x86: think-lmi: Opcode support") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20211217071209.GF26548@kili Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-21platform/x86: apple-gmux: use resource_size() with resWang Qing
This should be (res->end - res->start + 1) here actually, use resource_size() derectly. Signed-off-by: Wang Qing <wangqing@vivo.com> Link: https://lore.kernel.org/r/1639484316-75873-1-git-send-email-wangqing@vivo.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-21platform/x86: amd-pmc: only use callbacks for suspendMario Limonciello
This driver is intended to be used exclusively for suspend to idle so callbacks to send OS_HINT during hibernate and S5 will set OS_HINT at the wrong time leading to an undefined behavior. Cc: stable@vger.kernel.org Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20211210143529.10594-1-mario.limonciello@amd.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-21platform/mellanox: mlxbf-pmc: Fix an IS_ERR() vs NULL bug in ↵Miaoqian Lin
mlxbf_pmc_map_counters The devm_ioremap() function returns NULL on error, it doesn't return error pointers. Also according to doc of device_property_read_u64_array, values in info array are properties of device or NULL. Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20211210070753.10761-1-linmq006@gmail.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-21platform/x86: amd-pmc: Add support for AMD Smart Trace BufferSanket Goswami
STB (Smart Trace Buffer), is a debug trace buffer that isolates the failures by analyzing the last running feature of a system. This non-intrusive way always runs in the background and stores the trace into the SoC. This patch enables the STB feature by passing module param "enable_stb=1" while loading the driver and provides mechanism to access the STB buffer using the read and write routines. Co-developed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> Link: https://lore.kernel.org/r/20211130112318.92850-3-Sanket.Goswami@amd.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-21platform/x86: amd-pmc: Simplify error handling and store the pci_dev in ↵Sanket Goswami
amd_pmc_dev structure Handle error-exits in the amd_pmc_probe() to avoid duplication and store the root port information in amd_pmc_probe() so that the information can be used across multiple routines. Suggested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> Link: https://lore.kernel.org/r/20211130112318.92850-2-Sanket.Goswami@amd.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-21Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid Pull HID fixes from Jiri Kosina: - NULL pointer dereference fix in Vivaldi driver (Jiasheng Jiang) - regression fix for device probing in Holtek driver (Benjamin Tissoires) * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid: HID: potential dereference of null pointer HID: holtek: fix mouse probing
2021-12-21fm10k: Fix syntax errors in commentsXiang wangx
Delete the redundant word 'by'. Signed-off-by: Xiang wangx <wangxiang@cdjrlc.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-21igbvf: Refactor traceKaren Sornek
Refactoring "PF still resetting" message, because previous version looked like a bug - it informed about changes that worked as designed but might confuse users. Changes requested to make message more user-friendly. Signed-off-by: Karen Sornek <karen.sornek@intel.com> Tested-by: Tony Brelinski <tony.brelinski@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-21igb: remove never changed variable `ret_val'Jason Wang
The variable used for return status in `igb_write_xmdio_reg' function is never changed and this function is just need return 0. Thus, the `ret_val' can be removed and return 0 at the end of the `igb_write_xmdio_reg' function. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-21igc: Remove obsolete defineSasha Neftin
'MII_CR_FULL_DUPLEX' define not in use. This patch comes to tidy up obsolete define. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-21igc: Remove obsolete maskSasha Neftin
'IGC_CTRL_EXT_LINK_MODE_MASK' not in use. This patch comes to tidy up obsolete define. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Nechama Kraus <nechamax.kraus@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-21igc: Remove obsolete nvm typeSasha Neftin
i225 devices use only spi nvm type. This patch comes to tidy up obsolete nvm types. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Nechama Kraus <nechamax.kraus@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-21igc: Remove unused phy typeSasha Neftin
_phy_none type not in use. Clean up the code accordingly, and get rid of the unused enum line Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de> Tested-by: Nechama Kraus <nechamax.kraus@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-21igc: Remove unused _I_PHY_ID defineSasha Neftin
_I_PHY_ID not in use. Clean up the code accordingly, and get rid of the unused define Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Nechama Kraus <nechamax.kraus@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-21ice: support crosstimestamping on E822 devices if supportedJacob Keller
E822 devices on supported platforms can generate a cross timestamp between the platform ART and the device time. This process allows for very precise measurement of the difference between the PTP hardware clock and the platform time. This is only supported if we know the TSC frequency relative to ART, so we do not enable this unless the boot CPU has a known TSC frequency (as required by convert_art_ns_to_tsc). Because PCIe PTM support is not available on all platforms, introduce CONFIG_ICE_HWTS and make it depend on X86 where we know the support exists. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-21ice: exit bypass mode once hardware finishes timestamp calibrationJacob Keller
Once the E822 device has sent and received one packet, the hardware computes the internal delay of the PHY using a process known as Vernier calibration. This calibration calculates a more accurate offset for the Tx and Rx timestamps. To make use of this offset, we need to exit the bypass mode. This cannot be done until the PHY has completed offset calibration, as indicated by the offset valid bits. To handle this, introduce a kthread work item which will poll the offset valid bits every few milliseconds seeing if it is safe to exit bypass mode. Once we have finished calibrating the offsets, we can program the total Tx and Rx offset registers and turn off the bypass bit. This allows the hardware to include the more precise vernier calibration offset, and improves the timestamp precision. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-21ice: ensure the hardware Clock Generation Unit is configuredJacob Keller
The E822 device has a Clock Generation Unit (CGU) responsible for determining the clock frequency that drives the timers. Ensure this function is initialized when bringing up the PTP support, so that the clock has a known frequency. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-12-21ice: implement basic E822 PTP supportJacob Keller
Implement support for the basic operations needed to enable the PTP hardware clock on E822 devices. This includes implementations for the various PHY access functions, as well as the ability to start and stop the PHY timers. This is different from the E810 device because the configuration depends on link speed, so we cannot just start the PHYs immediately. We must wait until the link is up to get proper values for the speed based initialization. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
generated by cgit (git 2.34.1) at 2025-09-17 02:46:38 +0000