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2023-06-26thermal/drivers/qcom/temp-alarm: Use dev_err_probeLuca Weiss
Use the dev_err_probe function instead of dev_err in the probe function so that the printed message includes the return value and also handles -EPROBE_DEFER nicely. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230625-spmi-temp-alarm-defer-v1-1-2d57acf36855@z3ntu.xyz
2023-06-26thermal/drivers/generic-adc: Register thermal zones as hwmon sensorsChen-Yu Tsai
Register thermal zones as hwmon sensors to let userspace read temperatures using standard hwmon interface. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> [Yangtao: only keep devm_thermal_add_hwmon_sysfs] Signed-off-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230620090732.50025-11-frank.li@vivo.com
2023-06-26thermal/drivers/mediatek/lvts_thermal: Remove redundant msg in lvts_ctrl_start()Yangtao Li
The upper-layer devm_thermal_add_hwmon_sysfs() function can directly print error information. Signed-off-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230620090732.50025-10-frank.li@vivo.com
2023-06-26thermal/drivers/qcom: Remove redundant msg at probe timeYangtao Li
The upper-layer devm_thermal_add_hwmon_sysfs() function can directly print error information. Signed-off-by: Yangtao Li <frank.li@vivo.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230620090732.50025-9-frank.li@vivo.com
2023-06-26thermal/drivers/ti-soc: Remove redundant msg in ti_thermal_expose_sensor()Yangtao Li
The upper-layer devm_thermal_add_hwmon_sysfs() function can directly print error information. Signed-off-by: Yangtao Li <frank.li@vivo.com> Acked-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230620090732.50025-8-frank.li@vivo.com
2023-06-26thermal/drivers/qoriq: Remove redundant msg in qoriq_tmu_register_tmu_zone()Yangtao Li
The upper-layer devm_thermal_add_hwmon_sysfs() function can directly print error information. Signed-off-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230620090732.50025-7-frank.li@vivo.com
2023-06-26thermal/drivers/tegra: Remove redundant msg in tegra_tsensor_register_channel()Yangtao Li
The upper-layer devm_thermal_add_hwmon_sysfs() function can directly print error information. Signed-off-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230620090732.50025-6-frank.li@vivo.com
2023-06-26drivers/thermal/k3: Remove redundant msg in k3_bandgap_probe()Yangtao Li
The upper-layer devm_thermal_add_hwmon_sysfs() function can directly print error information. Signed-off-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230620090732.50025-5-frank.li@vivo.com
2023-06-26thermal/drivers/imx: Remove redundant msg in imx8mm_tmu_probe() and ↵Yangtao Li
imx_sc_thermal_probe() The upper-layer devm_thermal_add_hwmon_sysfs() function can directly print error information. Signed-off-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230620090732.50025-4-frank.li@vivo.com
2023-06-26thermal/drivers/amlogic: Remove redundant msg in amlogic_thermal_probe()Yangtao Li
The upper-layer devm_thermal_add_hwmon_sysfs() function can directly print error information. Signed-off-by: Yangtao Li <frank.li@vivo.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230620090732.50025-3-frank.li@vivo.com
2023-06-26thermal/drivers/sun8i: Remove redundant msg in sun8i_ths_register()Yangtao Li
The upper-layer devm_thermal_add_hwmon_sysfs() function can directly print error information. Signed-off-by: Yangtao Li <frank.li@vivo.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230620090732.50025-2-frank.li@vivo.com
2023-06-26thermal/hwmon: Add error information printing for devm_thermal_add_hwmon_sysfs()Yangtao Li
Ensure that all error handling branches print error information. In this way, when this function fails, the upper-layer functions can directly return an error code without missing debugging information. Otherwise, the error message will be printed redundantly or missing. Signed-off-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230620090732.50025-1-frank.li@vivo.com
2023-06-26thermal/drivers/stm32: Convert to platform remove callback returning voidUwe Kleine-König
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. st_thermal_unregister() always returned zero, so convert it to return void without any loss and then just drop the return from st_mmap_remove(). Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230616165641.1055854-1-u.kleine-koenig@pengutronix.de
2023-06-26net/mlx5: Update the driver with the recent thermal changesDaniel Lezcano
The thermal framework is migrating to the generic trip points. The set of changes also implies a self-encapsulation of the thermal zone device structure where the internals are no longer directly accessible but with accessors. Use the new API instead, so the next changes can be pushed in the thermal framework without this driver failing to compile. No functional changes intended. Cc: Sandipan Patra <spatra@nvidia.com> Cc: Gal Pressman <gal@nvidia.com> Cc: Saeed Mahameed <saeedm@nvidia.com> Cc: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Simon Horman <simon.horman@corigine.com> Link: https://lore.kernel.org/r/20230525140135.3589917-2-daniel.lezcano@linaro.org
2023-06-26thermal/drivers/armada: Add support for AP807 thermal dataAlex Leibovich
Add support for the AP807 die thermal data. This is the same as AP806, except for the coefficients. ap807 values taken from TSENSE_ADC_16FFC spec, which says: T(in Celsius) = T(code)*TSENE_GAIN+TSENE_OFFSET where in default: TSENE_OFFSET = 128.9 TSENE_GAIN = 0.394 Signed-off-by: Alex Leibovich <alexl@marvell.com> Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/E1qA7yU-00Ea4u-Je@rmk-PC.armlinux.org.uk
2023-06-26thermal/drivers/qoriq: Support version 2.1Peng Fan
i.MX93 use TMU version 2.1, which supports: - TRITSR_TP5(When this field is 1, you must add 0.5 K to the temperature that TEMP reports. For example, if TEMP is 300 K and TP5=1, then the final temperature is 300.5 K.) - Has 16 TTRCR register: Temperature Range Control (TTRCR0 - TTRCR15) This patch is to add this support. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230516083746.63436-4-peng.fan@oss.nxp.com
2023-06-26thermal/drivers/qoriq: Only enable supported sensorsPeng Fan
There are MAX 16 sensors, but not all of them supported. Such as i.MX8MQ, there are only 3 sensors. Enabling all 16 sensors will touch reserved bits from i.MX8MQ reference mannual, and TMU will stuck, temperature will not update anymore. Fixes: 45038e03d633 ("thermal: qoriq: Enable all sensors before registering them") Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230516083746.63436-3-peng.fan@oss.nxp.com
2023-06-26thermal/drivers/qoriq: No need to program site adjustment registerPankit Garg
No need to program site adjustment register, as programming these registers do not give accurate value and also these registers are not mentioned in Reference Manual. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230516083746.63436-2-peng.fan@oss.nxp.com
2023-06-26thermal/drivers/mediatek/lvts_thermal: Register thermal zones as hwmon sensorsChen-Yu Tsai
Register thermal zones as hwmon sensors to let userspace read temperatures using standard hwmon interface. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230613091317.1691247-1-wenst@chromium.org
2023-06-26thermal/drivers/sun8i: Fix some error handling paths in sun8i_ths_probe()Christophe JAILLET
Should an error occur after calling sun8i_ths_resource_init() in the probe function, some resources need to be released, as already done in the .remove() function. Switch to the devm_clk_get_enabled() helper and add a new devm_action to turn sun8i_ths_resource_init() into a fully managed function. Move the place where reset_control_deassert() is called so that the recommended order of reset release/clock enable steps is kept. A64 manual states that: 3.3.6.4. Gating and reset Make sure that the reset signal has been released before the release of module clock gating; This fixes the issue and removes some LoC at the same time. Fixes: dccc5c3b6f30 ("thermal/drivers/sun8i: Add thermal driver for H6/H5/H3/A64/A83T/R40") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/a8ae84bd2dc4b55fe428f8e20f31438bf8bb6762.1684089931.git.christophe.jaillet@wanadoo.fr
2023-06-26Revert "thermal/drivers/mediatek: Use devm_of_iomap to avoid resource leak ↵Ricardo Cañuelo
in mtk_thermal_probe" This reverts commit f05c7b7d9ea9477fcc388476c6f4ade8c66d2d26. That change was causing a regression in the generic-adc-thermal-probed bootrr test as reported in the kernelci-results list [1]. A proper rework will take longer, so revert it for now. [1] https://groups.io/g/kernelci-results/message/42660 Fixes: f05c7b7d9ea9 ("thermal/drivers/mediatek: Use devm_of_iomap to avoid resource leak in mtk_thermal_probe") Signed-off-by: Ricardo Cañuelo <ricardo.canuelo@collabora.com> Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230525121811.3360268-1-ricardo.canuelo@collabora.com
2023-06-26thermal/drivers/qcom/tsens-v0_1: Add MSM8909 dataStephan Gerhold
The MSM8909 SoC has 5 thermal sensors in a TSENS v0.1 block. Like MDM9607 it uses a non-standard default slope value of 3000 [1] and needs per-sensor "correction factors" to workaround issues with the factory calibration [2]. [1]: https://git.codelinaro.org/clo/la/kernel/msm-3.18/-/blob/LA.UM.7.7.c26-09100-8x09.0/arch/arm/boot/dts/qcom/msm8909.dtsi#L476 [2]: https://git.codelinaro.org/clo/la/kernel/msm-3.18/-/commit/6df022c6d0c2c1b4a5a6c2124dba4d57910c0911 Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230508-msm8909-tsens-v5-6-5eb632235ba7@kernkonzept.com
2023-06-26thermal/drivers/qcom/tsens-v0_1: Add mdm9607 correction offsetsStephan Gerhold
According to the msm-3.18 vendor kernel from Qualcomm, mdm9607 needs "correction factors" to adjust for additional offsets observed after the factory calibration values in the fuses [1, 2]. The fixed offsets should be applied unless there is a special calibration mode value that indicates that no offsets are needed [3]. Note that the new calibration mode values are called differently in this patch compared to the vendor kernel: - TSENS_TWO_POINT_CALIB_N_WA -> ONE_PT_CALIB2_NO_OFFSET - TSENS_TWO_POINT_CALIB_N_OFFSET_WA -> TWO_PT_CALIB_NO_OFFSET This is because close inspection of the calibration function [3] reveals that TSENS_TWO_POINT_CALIB_N_WA is actually a "one point" calibration because the if statements skip all "point2" related code for it. [1]: https://git.codelinaro.org/clo/la/kernel/msm-3.18/-/commit/d9d2db1b82bf3f72f5de0803d55e6849eb5b671e [2]: https://git.codelinaro.org/clo/la/kernel/msm-3.18/-/commit/d75aef53a760e8ff7bac54049d00c8b2ee1b193e [3]: https://git.codelinaro.org/clo/la/kernel/msm-3.18/-/blob/LE.UM.4.3.2.r1-04200-9x07/drivers/thermal/msm-tsens.c#L2987-3136 Fixes: a2149ab815fc ("thermal/drivers/qcom/tsens-v0_1: Add support for MDM9607") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230508-msm8909-tsens-v5-3-5eb632235ba7@kernkonzept.com
2023-06-26thermal/drivers/qcom/tsens-v0_1: Fix mdm9607 slope valuesStephan Gerhold
According to the msm-3.18 vendor kernel from Qualcomm [1], mdm9607 uses a non-standard slope value of 3000 (instead of 3200) for all sensors. Fill it properly similar to the 8939 code added recently. [1]: https://git.codelinaro.org/clo/la/kernel/msm-3.18/-/blob/LE.UM.4.3.2.r1-04200-9x07/arch/arm/boot/dts/qcom/mdm9607.dtsi#L875 Fixes: a2149ab815fc ("thermal/drivers/qcom/tsens-v0_1: Add support for MDM9607") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230508-msm8909-tsens-v5-2-5eb632235ba7@kernkonzept.com
2023-06-26thermal/drivers/qcom/tsens: Drop unused legacy structsStephan Gerhold
The old single-cell parsing code was removed for MSM8939, MDM9607 and MSM8976 but for some reason the structs defining the bit positions etc were kept around (unused). Drop them now. Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: 51d78b8b1beb ("thermal/drivers/tsens: Drop single-cell code for mdm9607") Fixes: dfadb4599ab0 ("thermal/drivers/tsens: Drop single-cell code for msm8939") Fixes: 3a908971f7cb ("thermal/drivers/tsens: Drop single-cell code for msm8976/msm8956") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230508-msm8909-tsens-v5-1-5eb632235ba7@kernkonzept.com
2023-06-26thermal: Allow selecting the bang-bang governor as defaultThierry Reding
For many setups the bang-bang governor is exactly what we want. Many ARM SoC-based devices use fans to cool down the entire SoC and that works well only with the bang-bang governor because it uses the hysteresis in order to let the fan run for a while to cool the SoC down below the trip point before switching it off again. The step-wise governor will behave strangely in these situations. It doesn't use the hysteresis, so it can lead to situations where the fan is turned on for only a very brief period and then is switched back off, only to get switched back on again very quickly because the SoC hasn't cooled down very much. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20230609124408.3788680-1-thierry.reding@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2023-06-26thermal/drivers/qcom/tsens-v0_1: Add support for MSM8226Matti Lehtimäki
The MSM8226 TSENS IP has 6 thermal sensors in a TSENS v0.1 block. The thermal sensors use non-standard slope values. Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230507201225.89694-4-matti.lehtimaki@gmail.com
2023-06-26drivers/thermal/rcar_gen3_thermal: add reading fuses for Gen4Wolfram Sang
The registers are differently named and at different offsets, but their functionality is the same as for Gen3. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230511192220.7523-4-wsa+renesas@sang-engineering.com
2023-06-26drivers/thermal/rcar_gen3_thermal: refactor reading fuses into seprarate ↵Wolfram Sang
function Gen4 will be very different, so refactor Gen3 access into separate call first. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230511192220.7523-3-wsa+renesas@sang-engineering.com
2023-06-26drivers/thermal/rcar_gen3_thermal: introduce 'info' structureWolfram Sang
More items to describe the TSCs are needed soon, so encapsulate the current 'ths_tj_1' item into a struct. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230511192220.7523-2-wsa+renesas@sang-engineering.com
2023-06-26sfc: falcon: use padding to fix alignment in loopback testEdward Cree
Add two bytes of padding to the start of struct ef4_loopback_payload, which are not sent on the wire. This ensures the 'ip' member is 4-byte aligned, preventing the following W=1 warning: net/ethernet/sfc/falcon/selftest.c:43:15: error: field ip within 'struct ef4_loopback_payload' is less aligned than 'struct iphdr' and is usually due to 'struct ef4_loopback_payload' being packed, which can lead to unaligned accesses [-Werror,-Wunaligned-access] struct iphdr ip; Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-06-26sfc: siena: use padding to fix alignment in loopback testEdward Cree
Add two bytes of padding to the start of struct efx_loopback_payload, which are not sent on the wire. This ensures the 'ip' member is 4-byte aligned, preventing the following W=1 warning: net/ethernet/sfc/siena/selftest.c:46:15: error: field ip within 'struct efx_loopback_payload' is less aligned than 'struct iphdr' and is usually due to 'struct efx_loopback_payload' being packed, which can lead to unaligned accesses [-Werror,-Wunaligned-access] struct iphdr ip; Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-06-26sfc: use padding to fix alignment in loopback testEdward Cree
Add two bytes of padding to the start of struct efx_loopback_payload, which are not sent on the wire. This ensures the 'ip' member is 4-byte aligned, preventing the following W=1 warning: net/ethernet/sfc/selftest.c:46:15: error: field ip within 'struct efx_loopback_payload' is less aligned than 'struct iphdr' and is usually due to 'struct efx_loopback_payload' being packed, which can lead to unaligned accesses [-Werror,-Wunaligned-access] struct iphdr ip; Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-06-26dmaengine: ioat: Free up __cleanup() namePeter Zijlstra
In order to use __cleanup for __attribute__((__cleanup__(func))) the name must not be used for anything else. Avoid the conflict. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Dave Jiang <dave.jiang@intel.com> Link: https://lkml.kernel.org/r/20230612093537.467120754%40infradead.org
2023-06-26bsr: fix build problem with bsr_class static cleanupGreg Kroah-Hartman
In commit e55ce9fd3d8f ("bsr: make bsr_class a static const structure"), the bsr_init function was converted to handle a static class structure, but the conversion got a variable name wrong, which caused build errors so fix that up. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Ivan Orlov <ivan.orlov0322@gmail.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20230626142537.755ec782@canb.auug.org.au Fixes: e55ce9fd3d8f ("bsr: make bsr_class a static const structure") Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-06-26sfc: fix crash when reading stats while NIC is resettingEdward Cree
efx_net_stats() (.ndo_get_stats64) can be called during an ethtool selftest, during which time nic_data->mc_stats is NULL as the NIC has been fini'd. In this case do not attempt to fetch the latest stats from the hardware, else we will crash on a NULL dereference: BUG: kernel NULL pointer dereference, address: 0000000000000038 RIP efx_nic_update_stats abridged calltrace: efx_ef10_update_stats_pf efx_net_stats dev_get_stats dev_seq_printf_stats Skipping the read is safe, we will simply give out stale stats. To ensure that the free in efx_ef10_fini_nic() does not race against efx_ef10_update_stats_pf(), which could cause a TOCTTOU bug, take the efx->stats_lock in fini_nic (it is already held across update_stats). Fixes: d3142c193dca ("sfc: refactor EF10 stats handling") Reviewed-by: Pieter Jansen van Vuuren <pieter.jansen-van-vuuren@amd.com> Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-06-26OPP: Use dev_err_probe() when failing to get icc_pathAndrew Halaney
This, in tandem with dynamic debug, can print useful information about -EPROBE_DEFFER like below, and keeps similar behavior for other errors: [ 16.561072] cpu cpu0: error -EPROBE_DEFER: dev_pm_opp_of_find_icc_paths: Unable to get path0 [ 16.575777] platform 18591000.cpufreq: deferred probe pending Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2023-06-26cpufreq: qcom-cpufreq-hw: Use dev_err_probe() when failing to get icc pathsAndrew Halaney
This way, if there's an issue (in this case a -EPROBE_DEFER), you can get useful output: [root@dhcp19-243-150 ~]# cat /sys/kernel/debug/devices_deferred 18591000.cpufreq qcom-cpufreq-hw: Failed to find icc paths Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2023-06-26iscsi_ibft: Fix finding the iBFT under Xen Dom 0Ross Lagerwall
To facilitate diskless iSCSI boot, the firmware can place a table of configuration details in memory called the iBFT. The presence of this table is not specified, nor is the precise location (and it's not in the E820) so the kernel has to search for a magic marker to find it. When running under Xen, Dom 0 does not have access to the entire host's memory, only certain regions which are identity-mapped which means that the pseudo-physical address in Dom0 == real host physical address. Add the iBFT search bounds as a reserved region which causes it to be identity-mapped in xen_set_identity_and_remap_chunk() which allows Dom0 access to the specific physical memory to correctly search for the iBFT magic marker (and later access the full table). This necessitates moving the call to reserve_ibft_region() somewhat later so that it is called after e820__memory_setup() which is when the Xen identity mapping adjustments are applied. The precise location of the call is not too important so I've put it alongside dmi_setup() which does similar scanning of memory for configuration tables. Finally in the iBFT find code, instead of using isa_bus_to_virt() which doesn't do the right thing under Xen, use early_memremap() like the dmi_setup() code does. The result of these changes is that it is possible to boot a diskless Xen + Dom0 running off an iSCSI disk whereas previously it would fail to find the iBFT and consequently, the iSCSI root disk. Signed-off-by: Ross Lagerwall <ross.lagerwall@citrix.com> Reviewed-by: Juergen Gross <jgross@suse.com> Acked-by: Konrad Rzeszutek Wilk <konrad@darnok.org> Acked-by: Dave Hansen <dave.hansen@linux.intel.com> # for x86 Link: https://lore.kernel.org/r/20230605102840.1521549-1-ross.lagerwall@citrix.com Signed-off-by: Juergen Gross <jgross@suse.com>
2023-06-25Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxlDan Williams
Pick up the first half of the RCH error handling series. The back half needs some fixups for test regressions. Small conflicts with the PMU work around register enumeration and setup helpers.
2023-06-25Merge branch 'for-6.5/cxl-perf' into for-6.5/cxlDan Williams
Pick up initial support for the CXL 3.0 performance monitoring definition. Small conflicts with the firmware update work as they both placed their init code in the same location.
2023-06-25perf: CXL Performance Monitoring Unit driverJonathan Cameron
CXL rev 3.0 introduces a standard performance monitoring hardware block to CXL. Instances are discovered using CXL Register Locator DVSEC entries. Each CXL component may have multiple PMUs. This initial driver supports a subset of types of counter. It supports counters that are either fixed or configurable, but requires that they support the ability to freeze and write value whilst frozen. Development done with QEMU model which will be posted shortly. Example: $ perf stat -a -e cxl_pmu_mem0.0/h2d_req_snpcur/ -e cxl_pmu_mem0.0/h2d_req_snpdata/ -e cxl_pmu_mem0.0/clock_ticks/ sleep 1 Performance counter stats for 'system wide': 96,757,023,244,321 cxl_pmu_mem0.0/h2d_req_snpcur/ 96,757,023,244,365 cxl_pmu_mem0.0/h2d_req_snpdata/ 193,514,046,488,653 cxl_pmu_mem0.0/clock_ticks/ 1.090539600 seconds time elapsed Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20230526095824.16336-5-Jonathan.Cameron@huawei.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2023-06-25Merge branch 'for-6.5/cxl-region-fixes' into for-6.5/cxlDan Williams
Pick up the recent fixes to how CPU caches are managed relative to region setup / teardown, and make sure that all decoders transition successfully before updating the region state from COMMIT => ACTIVE.
2023-06-25Merge branch 'for-6.5/cxl-type-2' into for-6.5/cxlDan Williams
Pick up the driver cleanups identified in preparation for CXL "type-2" (accelerator) device support. The major change here from a conflict generation perspective is the split of 'struct cxl_memdev_state' from the core 'struct cxl_dev_state'. Since an accelerator may not care about all the optional features that are standard on a CXL "type-3" (host-only memory expander) device. A silent conflict also occurs with the move of the endpoint port to be a formal property of a 'struct cxl_memdev' rather than drvdata.
2023-06-26rtc: Add rtc driver for the Loongson family chipsBinbin Zhou
The Loongson family chips use an on-chip counter 0 (Time Of Year counter) as the RTC. We will refer to them as rtc-loongson. Cc: Keguang Zhang <keguang.zhang@gmail.com> Cc: Yang Ling <gnaygnil@gmail.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@kernel.org> Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Keguang Zhang <keguang.zhang@gmail.com> Tested-by: Keguang Zhang <keguang.zhang@gmail.com> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> # LS7A Link: https://lore.kernel.org/r/0c5171156390f614d72f36ceb04a20f432ca639e.1685693501.git.zhoubinbin@loongson.cn Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-06-26rtc: Remove the Loongson-1 RTC driverBinbin Zhou
Remove the ls1x-rtc driver as it is obsolete. We will continue to support the ls1x RTC in the upcoming Loongson unified RTC driver rtc-loongson. Cc: Keguang Zhang <keguang.zhang@gmail.com> Cc: zhao zhang <zhzhl555@gmail.com> Cc: Yang Ling <gnaygnil@gmail.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Acked-by: Keguang Zhang <keguang.zhang@gmail.com> Link: https://lore.kernel.org/r/c38c666015a162d7031b20a48209ce577bab62cd.1685693501.git.zhoubinbin@loongson.cn Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-06-25Merge branch 'for-6.5/cxl-fwupd' into for-6.5/cxlDan Williams
Add the first typical (non-sanitization) consumer of the new background command infrastructure, firmware update. Given both firmware-update and sanitization were developed in parallel from the common background-command baseline, resolve some minor context conflicts.
2023-06-26rtc: rv3028: make rv3028 probeable from userspaceJohannes Kirchmair
With this commit, it will be possible to bind a rv3028 device from userspace This is done by: echo rtc-rv3028 0x52 > /sys/bus/i2c/devices/i2c-XX/new_device Signed-off-by: Johannes Kirchmair <johannes.kirchmair@sigmatek.at> Link: https://lore.kernel.org/r/20230327085550.1721861-1-johannes.kirchmair@sigmatek.at Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-06-25Merge branch 'for-6.5/cxl-background' into for-6.5/cxlDan Williams
Pick up the sanitization work and the infrastructure for other background commands for 6.5. Sanitization has a different completion path than typical background commands so it was important to have both thought out and implemented before either went upstream.
2023-06-25cxl: add a firmware update mechanism using the sysfs firmware loaderVishal Verma
The sysfs based firmware loader mechanism was created to easily allow userspace to upload firmware images to FPGA cards. This also happens to be pretty suitable to create a user-initiated but kernel-controlled firmware update mechanism for CXL devices, using the CXL specified mailbox commands. Since firmware update commands can be long-running, and can be processed in the background by the endpoint device, it is desirable to have the ability to chunk the firmware transfer down to smaller pieces, so that one operation does not monopolize the mailbox, locking out any other long running background commands entirely - e.g. security commands like 'sanitize' or poison scanning operations. The firmware loader mechanism allows a natural way to perform this chunking, as after each mailbox command, that is restricted to the maximum mailbox payload size, the cxl memdev driver relinquishes control back to the fw_loader system and awaits the next chunk of data to transfer. This opens opportunities for other background commands to access the mailbox and send their own slices of background commands. Add the necessary helpers and state tracking to be able to perform the 'Get FW Info', 'Transfer FW', and 'Activate FW' mailbox commands as described in the CXL spec. Wire these up to the firmware loader callbacks, and register with that system to create the memX/firmware/ sysfs ABI. Cc: Davidlohr Bueso <dave@stgolabs.net> Cc: Jonathan Cameron <Jonathan.Cameron@Huawei.com> Cc: Russ Weight <russell.h.weight@intel.com> Cc: Alison Schofield <alison.schofield@intel.com> Cc: Ira Weiny <ira.weiny@intel.com> Cc: Dave Jiang <dave.jiang@intel.com> Cc: Ben Widawsky <bwidawsk@kernel.org> Cc: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vishal Verma <vishal.l.verma@intel.com> Link: https://lore.kernel.org/r/20230602-vv-fw_update-v4-1-c6265bd7343b@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
generated by cgit (git 2.34.1) at 2025-09-11 12:03:17 +0000