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2022-09-28sfc: add a hashtable for offloaded TC rulesEdward Cree
Nothing inserts into this table yet, but we have code to remove rules on FLOW_CLS_DESTROY or at driver teardown time, in both cases also attempting to remove the corresponding hardware rules. Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-28sfc: optional logging of TC offload errorsEdward Cree
TC offload support will involve complex limitations on what matches and actions a rule can do, in some cases potentially depending on rules already offloaded. So add an ethtool private flag "log-tc-errors" which controls reporting the reasons for un-offloadable TC rules at NETIF_INFO. Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-28sfc: bind indirect blocks for TC offload on EF100Edward Cree
Bind indirect blocks for recognised tunnel netdevices. Currently these connect to a stub efx_tc_flower() that only returns -EOPNOTSUPP; subsequent patches will implement flower offloads to the Match-Action Engine. Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-28sfc: bind blocks for TC offload on EF100Edward Cree
Bind direct blocks for the MAE-admin PF and each VF representor. Currently these connect to a stub efx_tc_flower() that only returns -EOPNOTSUPP; subsequent patches will implement flower offloads to the Match-Action Engine. Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-28net: ethernet: rmnet: Replace zero-length array with DECLARE_FLEX_ARRAY() helperGustavo A. R. Silva
Zero-length arrays are deprecated and we are moving towards adopting C99 flexible-array members, instead. So, replace zero-length arrays declarations in anonymous union with the new DECLARE_FLEX_ARRAY() helper macro. This helper allows for flexible-array members in unions. Link: https://github.com/KSPP/linux/issues/193 Link: https://github.com/KSPP/linux/issues/221 Link: https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-28net: lan966x: Add offload support for etsHoratiu Vultur
Add ets qdisc which allows to mix strict priority with bandwidth-sharing bands. The ets qdisc needs to be attached as root qdisc. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-28net: lan966x: Add offload support for cbsHoratiu Vultur
Lan966x switch supports credit based shaper in hardware according to IEEE Std 802.1Q-2018 Section 8.6.8.2. Add support for cbs configuration on egress port of lan966x switch. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-28net: lan966x: Add offload support for tbfHoratiu Vultur
The tbf qdisc allows to attach a shaper on traffic egress on a port or on a queue. On port they are attached directly to the root and on queue they are attached on one of the classes of the parent qdisc. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-28can: c_can: don't cache TX messages for C_CAN coresMarc Kleine-Budde
As Jacob noticed, the optimization introduced in 387da6bc7a82 ("can: c_can: cache frames to operate as a true FIFO") doesn't properly work on C_CAN, but on D_CAN IP cores. The exact reasons are still unknown. For now disable caching if CAN frames in the TX path for C_CAN cores. Fixes: 387da6bc7a82 ("can: c_can: cache frames to operate as a true FIFO") Link: https://lore.kernel.org/all/20220928083354.1062321-1-mkl@pengutronix.de Link: https://lore.kernel.org/all/15a8084b-9617-2da1-6704-d7e39d60643b@gmail.com Reported-by: Jacob Kroon <jacob.kroon@gmail.com> Tested-by: Jacob Kroon <jacob.kroon@gmail.com> Cc: stable@vger.kernel.org # v5.15 Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-28mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v6.0rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.1. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-09-28mmc: sdhci: Centralize CMD and DATA reset handlingAdrian Hunter
Centralize CMD and DATA reset handling so that is more obvious how reset is handled in different situations. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220926192022.85660-5-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-09-28mmc: sdhci: Get rid of SDHCI_QUIRK_RESET_CMD_DATA_ON_IOSAdrian Hunter
SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS is used by only ENE controllers but can be replaced by driver code. Amend the ENE code to hook the ->set_ios() mmc host operation and do the reset there. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220926192022.85660-4-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-09-28mmc: sdhci: Remove misleading comment about resetsAdrian Hunter
In SDHCI specification section 3.10.1 Error Interrupt Recovery, the flow chart shows Software Reset for CMD separately and before Software Reset for DAT, so the comment "Spec says we should do both at the same time" is not correct. Remove it. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220926192022.85660-3-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-09-28mmc: sdhci: Separate out sdhci_reset_for_all()Adrian Hunter
Tidy sdhci_do_reset() slightly by separating out sdhci_reset_for_all() which removes the need to test the mask in sdhci_do_reset(). Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220926192022.85660-2-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-09-28wifi: rtw89: 8852b: configure DLE memPing-Ke Shih
Configure DLE (data link engine) memory size for operating modes. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-10-pkshih@realtek.com
2022-09-28wifi: rtw89: check DLE FIFO size with reserved sizePing-Ke Shih
For SCC mode, some FIFO are reserved, so compare the quantity after minus the reserved size. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-9-pkshih@realtek.com
2022-09-28wifi: rtw89: mac: correct register of report IMRPing-Ke Shih
The register of report IMR is chip specific, so add a field to strut to correct them. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-8-pkshih@realtek.com
2022-09-28wifi: rtw89: pci: set power cut closed for 8852bePing-Ke Shih
Entering LPS with PCIe APHY power cut closed would cause PCIe link issue. To avoid the combinational issue, keep PCIe APHY power cut always on. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-7-pkshih@realtek.com
2022-09-28wifi: rtw89: pci: add to do PCI auto calibrationPing-Ke Shih
8852be needs this with n times calibration to correct hardware clock. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-6-pkshih@realtek.com
2022-09-28wifi: rtw89: 8852b: implement chip_ops::{enable,disable}_bb_rfPing-Ke Shih
Implement to power on/off BB and RF via MAC registers. Add return type of chip_ops::disable_bb_rf, because it could fail to disable. Also, correct naming of register 0x0200 used by the ops as well. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-5-pkshih@realtek.com
2022-09-28wifi: rtw89: add DMA busy checking bits to chip infoPing-Ke Shih
8852B has less DMA channels, so its checking bits are different from other chips. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-4-pkshih@realtek.com
2022-09-28wifi: rtw89: mac: define DMA channel mask to avoid unsupported channelsPing-Ke Shih
Six channels are unsupported by 8852b, so mask them out to prevent to access undefined registers in this chip. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-3-pkshih@realtek.com
2022-09-28wifi: rtw89: pci: mask out unsupported TX channelsPing-Ke Shih
8852BE doesn't support some TX channels, so mask them out, or it access undefined registers. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-2-pkshih@realtek.com
2022-09-28iwlegacy: Replace zero-length arrays with DECLARE_FLEX_ARRAY() helperGustavo A. R. Silva
Zero-length arrays are deprecated and we are moving towards adopting C99 flexible-array members, instead. So, replace zero-length arrays declarations in anonymous union with the new DECLARE_FLEX_ARRAY() helper macro. This helper allows for flexible-array members in unions. Link: https://github.com/KSPP/linux/issues/193 Link: https://github.com/KSPP/linux/issues/223 Link: https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/YzIvzc0jsYLigO8a@work
2022-09-28ipw2x00: Replace zero-length array with DECLARE_FLEX_ARRAY() helperGustavo A. R. Silva
Zero-length arrays are deprecated and we are moving towards adopting C99 flexible-array members, instead. So, replace zero-length arrays declarations in anonymous union with the new DECLARE_FLEX_ARRAY() helper macro. This helper allows for flexible-array members in unions. Link: https://github.com/KSPP/linux/issues/193 Link: https://github.com/KSPP/linux/issues/220 Link: https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/YzIeULWc17XSIglv@work
2022-09-28wifi: iwlwifi: Track scan_cmd allocation size explicitlyKees Cook
In preparation for reducing the use of ksize(), explicitly track the size of scan_cmd allocations. This also allows for noticing if the scan size changes unexpectedly. Note that using ksize() was already incorrect here, in the sense that ksize() would not match the actual allocation size, which would trigger future run-time allocation bounds checking. (In other words, memset() may know how large scan_cmd was allocated for, but ksize() will return the upper bounds of the actually allocated memory, causing a run-time warning about an overflow.) Cc: Gregory Greenman <gregory.greenman@intel.com> Cc: Kalle Valo <kvalo@kernel.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Eric Dumazet <edumazet@google.com> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Paolo Abeni <pabeni@redhat.com> Cc: Luca Coelho <luciano.coelho@intel.com> Cc: Johannes Berg <johannes.berg@intel.com> Cc: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Cc: Miri Korenblit <miriam.rachel.korenblit@intel.com> Cc: Ilan Peer <ilan.peer@intel.com> Cc: linux-wireless@vger.kernel.org Cc: netdev@vger.kernel.org Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220923220853.3302056-1-keescook@chromium.org
2022-09-28Merge tag 'amd-drm-next-6.1-2022-09-23' of ↵Dave Airlie
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-6.1-2022-09-23: amdgpu: - SDMA fix - Add new firmware types to debugfs/IOCTL version queries - Misc spelling and grammar fixes - Misc code cleanups - DCN 3.2.x fixes - DCN 3.1.x fixes - CS cleanup - Gang submit support - Clang fixes - Non-DC audio fix - GPUVM locking fixes - Vega10 PWN fan speed fix amdkgd: - MQD manager cleanup - Misc spelling and grammar fixes UAPI: - Add new firmware types to the FW version query IOCTL Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220923215729.6061-1-alexander.deucher@amd.com
2022-09-28Merge tag 'drm-misc-next-2022-09-23' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 6.1: UAPI Changes: Cross-subsystem Changes: - dma-buf: Improve signaling when debugging Core Changes: - Backlight handling improvements - format-helper: Add drm_fb_build_fourcc_list() - fourcc: Kunit tests improvements - modes: Add DRM_MODE_INIT() macro - plane: Remove drm_plane_init(), Allocate planes with drm_universal_plane_alloc() - plane-helper: Add drm_plane_helper_atomic_check() - probe-helper: Add drm_connector_helper_get_modes_fixed() and drm_crtc_helper_mode_valid_fixed() - tests: Conversion to parametrized tests, test name consistency Driver Changes: - amdgpu: Fix for a VRAM eviction issue - ast: Resolution handling improvements - mediatek: small code improvements for DP - omap: Refcounting fix, small improvements - rockchip: RK3568 support, Gamma support for RK3399 - sun4i: Build failure fix when !OF - udl: Multiple fixes here and there - vc4: HDMI hotplug handling improvements - vkms: Warning fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20220923073943.d43tne5hni3iknlv@houat
2022-09-27clk: qcom: Add global clock controller driver for SM6375Konrad Dybcio
Add support for the global clock controller found on SM6375. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220921001303.56151-3-konrad.dybcio@somainline.org
2022-09-27clk: qcom: alpha: Add support for programming the PLL_FSM_LEGACY_MODE bitKonrad Dybcio
This is used on at least SM6375 and its variations. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220921001303.56151-1-konrad.dybcio@somainline.org
2022-09-27clk: qcom: gcc-sc7280: Update the .pwrsts for usb gdscsRajendra Nayak
The USB controllers on sc7280 do not retain the state when the system goes into low power state and the GDSCs are turned off. This results in the controllers reinitializing and re-enumerating all the connected devices (resulting in additional delay while coming out of suspend) Fix this by updating the .pwrsts for the USB GDSCs so they only transition to retention state in low power. Since sc7280 only supports cx (parent of usb gdscs) Retention, there are no cxcs offsets mentioned in order to support the Retention state. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Tested-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220920111517.10407-3-quic_rjendra@quicinc.com
2022-09-27clk: qcom: gcc-sc7180: Update the .pwrsts for usb gdscRajendra Nayak
The USB controller on sc7180 does not retain the state when the system goes into low power state and the GDSC is turned off. This results in the controller reinitializing and re-enumerating all the connected devices (resulting in additional delay while coming out of suspend) Fix this by updating the .pwrsts for the USB GDSC so it only transitions to retention state in low power. Since sc7180 only supports cx (parent of usb gdsc) Retention, there are no cxcs offsets mentioned in order to support the Retention state. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220920111517.10407-2-quic_rjendra@quicinc.com
2022-09-27clk: qcom: gdsc: Fix the handling of PWRSTS_RET supportRajendra Nayak
GDSCs cannot be transitioned into a Retention state in SW. When either the RETAIN_MEM bit, or both the RETAIN_MEM and RETAIN_PERIPH bits are set, and the GDSC is left ON, the HW takes care of retaining the memory/logic for the domain when the parent domain transitions to power collapse/power off state. On some platforms where the parent domains lowest power state itself is Retention, just leaving the GDSC in ON (without any RETAIN_MEM/RETAIN_PERIPH bits being set) will also transition it to Retention. The existing logic handling the PWRSTS_RET seems to set the RETAIN_MEM/RETAIN_PERIPH bits if the cxcs offsets are specified but then explicitly turns the GDSC OFF as part of _gdsc_disable(). Fix that by leaving the GDSC in ON state. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220920111517.10407-1-quic_rjendra@quicinc.com
2022-09-27mlxsw: core_acl_flex_actions: Split memcpy() of struct flow_action_cookie ↵Kees Cook
flexible array To work around a misbehavior of the compiler's ability to see into composite flexible array structs (as detailed in the coming memcpy() hardening series[1]), split the memcpy() of the header and the payload so no false positive run-time overflow warning will be generated. [1] https://lore.kernel.org/linux-hardening/20220901065914.1417829-2-keescook@chromium.org Cc: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Petr Machata <petrm@nvidia.com> Link: https://lore.kernel.org/r/20220927004033.1942992-1-keescook@chromium.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define remaining IPA register fieldsAlex Elder
Define the fields for the ENDP_INIT_DEAGGR, ENDP_INIT_RSRC_GRP, ENDP_INIT_SEQ, ENDP_STATUS, and ENDP_FILTER_ROUTER_HSH_CFG, and IPA_IRQ_UC IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_FIELDS() and IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_encode() and ipa_reg_bit() to build up the values to be written to these registers, remove an inline function and all the *_FMASK symbols that are now no longer used. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define more IPA endpoint register fieldsAlex Elder
Define the fields for the ENDP_INIT_MODE, ENDP_INIT_AGGR, ENDP_INIT_HOL_BLOCK_EN, and ENDP_INIT_HOL_BLOCK_TIMER IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Change aggr_time_limit_encode() and hol_block_timer_encode() so they take an ipa_reg pointer, and use those register's fields to compute their encoded results. Have aggr_time_limit_encode() take an IPA pointer rather than version, to match hol_block_timer_encode(). Use ipa_reg_encode(), ipa_reg_bit(), and ipa_reg_field_max() to manipulate values to be written to these registers, remove the definitions of the various inline functions and *_FMASK symbols that are now no longer used. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define some IPA endpoint register fieldsAlex Elder
Define the fields for the ENDP_INIT_CTRL, ENDP_INIT_CFG, ENDP_INIT_NAT, ENDP_INIT_HDR, and ENDP_INIT_HDR_EXT IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Move ipa_header_size_encoded() and ipa_metadata_offset_encoded() out of "ipa_reg.h" and into "ipa_endpoint.c". Change them so they take an additional ipa_reg structure argument, and use ipa_reg_encode() to encode the parts of the header size and offset prior to writing to the register. Change their names to be verbs rather than nouns. Use ipa_reg_encode(), ipa_reg_bit, and ipa_reg_field_max() to manipulate values to be written to these registers, remove the definition of the no-longer-used *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define resource group/type IPA register fieldsAlex Elder
Define the fields for the {SRC,DST}_RSRC_GRP_{01,23,45,67}_RSRC_TYPE IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_encode() to build up the values to be written to these registers. Remove the definition of the no-longer-used *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define even more IPA register fieldsAlex Elder
Define the fields for the FLAVOR_0, IDLE_INDICATION_CFG, QTIME_TIMESTAMP_CFG, TIMERS_XO_CLK_DIV_CFG and TIMERS_PULSE_GRAN_CFG IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers. Use ipa_reg_decode() to extract field values from the FLAVOR_0 register. Remove the definition of the no-longer-used *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define more IPA register fieldsAlex Elder
Define the fields for the LOCAL_PKT_PROC_CNTXT, COUNTER_CFG, and IPA_TX_CFG IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers. Remove the definition of the *_FMASK symbols as well as proc_cntxt_base_addr_encoded(), because they are no longer needed. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define some more IPA register fieldsAlex Elder
Define the fields for the SHARED_MEM_SIZE, QSB_MAX_WRITES, QSB_MAX_READS, FILT_ROUT_HASH_EN, and FILT_ROUT_HASH_FLUSH IPA registers for all supported IPA versions. Create enumerated types to identify fields for these registers. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers rather than using the *_FMASK preprocessor symbols. Remove the definition of the now unused *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define CLKON_CFG and ROUTE IPA register fieldsAlex Elder
Create the ipa_reg_clkon_cfg_field_id enumerated type, which identifies the fields for the CLKON_CFG IPA register. Add "CLKON_" to a few short names to try to avoid name conflicts. Create the ipa_reg_route_field_id enumerated type, which identifies the fields for the ROUTE IPA register. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers rather than using the *_FMASK preprocessor symbols. Remove the definition of the now unused *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define COMP_CFG IPA register fieldsAlex Elder
Create the ipa_reg_comp_cfg_field_id enumerated type, which identifies the fields for the COMP_CFG IPA register. Use IPA_REG_FIELDS() to specify the field mask values defined for this register, for each supported version of IPA. Use ipa_reg_bit() to build up the value to be written to this register rather than using the *_FMASK preprocessor symbols. Remove the definition of the *_FMASK symbols, along with the inline functions that were used to encode certain fields whose position and/or width within the register was dependent on IPA version. Take this opportunity to represent all one-bit fields using BIT(x) rather than GENMASK(x, x). Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: introduce ipa_reg field masksAlex Elder
Add register field descriptors to the ipa_reg structure. A field in a register is defined by a field mask, which is a 32-bit mask having a single contiguous range of bits set. For each register that has at least one field defined, an enumerated type will identify the register's fields. The ipa_reg structure for that register will include an array fmask[] of field masks, indexed by that enumerated type. Each field mask defines the position and bit width of a field. An additional "fcount" records how many fields (masks) are defined for a given register. Introduce two macros to be used to define registers that have at least one field. Introduce a few new functions related to field masks. The first simply returns a field mask, given an IPA register pointer and field mask ID. A variant of that is meant to be used for the special case of single-bit field masks. Next, ipa_reg_encode(), identifies a field with an IPA register pointer and a field ID, and takes a value to represent in that field. The result encodes the value in the appropriate place to be stored in the register. This is roughly modeled after the bitmask operations (like u32_encode_bits()). Another function (ipa_reg_decode()) similarly identifies a register field, but the value supplied to it represents a full register value. The value encoded in the field is extracted from the value and returned. This is also roughly modeled after bitmask operations (such as u32_get_bits()). Finally, ipa_reg_field_max() returns the maximum value representable by a field. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: introduce ipa_reg()Alex Elder
Create a new function that returns a register descriptor given its ID. Change ipa_reg_offset() and ipa_reg_n_offset() so they take a register descriptor argument rather than an IPA pointer and register ID. Have them accept null pointers (and return an invalid 0 offset), to avoid the need for excessive error checking. (A warning is issued whenever ipa_reg() returns 0). Call ipa_reg() or ipa_reg_n() to look up information about the register before calls to ipa_reg_offset() and ipa_reg_n_offset(). Delay looking up offsets until they're needed to read or write registers. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: use ipa_reg[] array for register offsetsAlex Elder
Use the array of register descriptors assigned at initialization time to determine the offset (and where used, stride) for IPA registers. Issue a warning if an offset is requested for a register that's not valid for the current system. Remove all IPE_REG_*_OFFSET macros, as well as inline static functions that returned register offsets. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: add per-version IPA register definition filesAlex Elder
Create a new subdirectory "reg", which contains a register definition file for each supported version of IPA. Each register definition contains the register's offset, and for parameterized registers, the stride (distance between consecutive instances of the register). Finally, it includes an all-caps printable register name. In these files, each IPA version defines an array of IPA register definition pointers, with unsupported registers defined with a null pointer. The array is indexed by the ipa_reg_id enumerated type. At initialization time, the appropriate register definition array to use is selected based on the IPA version, and assigned to a new "regs" field in the IPA structure. Extend ipa_reg_valid() so it fails if a valid register is not defined. This patch simply puts this infrastructure in place; the next will use it. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: use IPA register IDs to determine offsetsAlex Elder
Expose two inline functions that return the offset for a register whose ID is provided; one of them takes an additional argument that's used for registers that are parameterized. These both use a common helper function __ipa_reg_offset(), which just uses the offset symbols already defined. Replace all references to the offset macros defined for IPA registers with calls to ipa_reg_offset() or ipa_reg_n_offset(). Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: introduce IPA register IDsAlex Elder
Create a new ipa_reg_id enumerated type, which identifies each IPA register with a symbolic identifier. Use short names, but in some cases (such as "BCR") add "IPA_" to the name to help avoid name conflicts. Create two functions that indicate register validity. The first concisely indicates whether a register is valid for a given version of IPA, and if so, whether it is defined. The second indicates whether a register is valid for TX or RX endpoints. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28Merge tag 'drm-msm-next-2022-09-22' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/msm into drm-next msm-next for v6.1 DPU: - simplified VBIF configuration - cleaned up CTL interfaces to accept indices rather than flush masks DSI: - removed unused msm_display_dsc_config struct - switch regulator calls to new bulk API - switched to use PANEL_BRIDGE for directly attached panels DSI PHY: - converted drivers to use parent_hws instead of parent_names DP: - cleaned up pixel_rate handling HDMI PHY: - turned hdmi-phy-8996 into OF clk provider core: - misc dt-bindings fixes - choose eDP as primary display if it's available - support getting interconnects from either the mdss or the mdp5/dpu device nodes gpu+gem: - Shrinker + LRU re-work: - adds a shared GEM LRU+shrinker helper and moves msm over to that - reduces lock contention between retire and submit by avoiding the need to acquire obj lock in retire path (and instead using resv seeing obj's busyness in the shrinker - fix reclaim vs submit issues - GEM fault injection for triggering userspace error paths - Map/unmap optimization - Improved robustness for a6xx GPU recovery Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsrfrr9v1oR9S4oYfOs9jm=jbKQiwPBTrCRHrjYerJJFA@mail.gmail.com
generated by cgit (git 2.34.1) at 2025-09-13 13:56:47 +0000