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2024-01-03drm/amdgpu: Use kvcalloc instead of kvmalloc_array in amdgpu_cs_parser_bos()Srinivasan Shanmugam
kvmalloc_array + __GFP_ZERO is the same with kvcalloc. Fixes the below: drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:873 amdgpu_cs_parser_bos() warn: Please consider using kvcalloc instead of kvmalloc_array Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amdgpu: Use kzalloc instead of kmalloc+__GFP_ZERO in amdgpu_ras.cSrinivasan Shanmugam
Fixes the below smatch warnings: drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2543 amdgpu_ras_recovery_init() warn: Please consider using kzalloc instead of kmalloc drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2830 amdgpu_ras_init() warn: Please consider using kzalloc instead of kmalloc Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amdgpu: Cleanup indenting in amdgpu_connector_dvi_detect()Srinivasan Shanmugam
drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c:1106 amdgpu_connector_dvi_detect() warn: inconsistent indenting Fixes: 8a1de314d189 ("drm/amdgpu: Refactor 'amdgpu_connector_dvi_detect' in amdgpu_connectors.c") Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/pm: Use gpu_metrics_v1_5 for SMUv13.0.6Asad Kamal
Use gpu_metrics_v1_5 for SMUv13.0.6 to fill gpu metric info Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/pm: Add gpu_metrics_v1_5Asad Kamal
Add new gpu_metrics_v1_5 to acquire vcn/jpeg activity & pcie nak error counters Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/pm: Update metric table for jpeg/vcn dataAsad Kamal
Update pmfw metric table to include vcn & jpeg activity for smu_v_13_0_6 Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/pm: Use separate metric table for APUAsad Kamal
Use separate metric table for APU and Non APU systems for smu_v_13_0_6 to get metric data Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Add some functions for Panel ReplayTom Chung
[WHY] Prepare for enabling the Panel Replay feature [HOW] - Add some Panel Replay setting functions in DC - Add the Panel Replay resource in dcn35_resource.c - Add debug masks for Panel Replay Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03Re-revert "drm/amd/display: Enable Replay for static screen use cases"Ivan Lipski
This reverts commit 44e60b14d5a72f91fd0bdeae8da59ae37a3ca8e5. Since, it causes a regression in which eDP displays with PSR support, but no Replay support (Sink support <= 0x03), fail to enable PSR and consequently all IGT amd_psr tests fail. So, revert this until a more suitable fix can be found. This got brought back accidently with the backmerge. Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Ivan Lipski <ivlipski@amd.com> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03nvmet-trace: avoid dereferencing pointer too earlyDaniel Wagner
The first command issued from the host to the target is the fabrics connect command. At this point, neither the target queue nor the controller have been allocated. But we already try to trace this command in nvmet_req_init. Reported by KASAN. Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Daniel Wagner <dwagner@suse.de> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-01-03nvmet-fc: remove unnecessary bracketDaniel Wagner
There is no need for the bracket around the identifier. Remove it. Signed-off-by: Daniel Wagner <dwagner@suse.de> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-01-03nvme: simplify the max_discard_segments calculationChristoph Hellwig
Just stash away the DMRL value in the nvme_ctrl struture, and leave all interpretation to nvme_config_discard, where we know DSM is supported by the time we're configuring the number of segments. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-01-03nvme: fix max_discard_sectors calculationChristoph Hellwig
ctrl->max_discard_sectors stores a value that is potentially based of the DMRSL field in Identify Controller, which is in units of LBAs and thus dependent on the Format of a namespace. Fix this by moving the calculation of max_discard_sectors entirely into nvme_config_discard and replacing the ctrl->max_discard_sectors value with a local variable so that the calculation is always namespace-specific. Fixes: 1a86924e4f46 ("nvme: fix interpretation of DMRSL") Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-01-03nvme: also skip discard granularity updates in nvme_config_discardChristoph Hellwig
Don't just skip the discard sectors and segments but also the granularity if a value was already set before. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Max Gurtovoy <mgurtovoy@nvidia.com> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-01-03nvme: update the explanation for not updating the limits in nvme_config_discardChristoph Hellwig
Expeand the comment a bit to explain what is going on. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-01-03nvmet-tcp: fix a missing endianess conversion in nvmet_tcp_try_peek_pduChristoph Hellwig
No, a __le32 cast doesn't magically byteswap on big-endian systems.. Fixes: 70525e5d82f6 ("nvmet-tcp: peek icreq before starting TLS") Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Sagi Grimberg <sagi@grimberg.me> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-01-03nvme-common: mark nvme_tls_psk_prio staticChristoph Hellwig
Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Sagi Grimberg <sagi@grimberg.me> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-01-03nvme: tcp: remove unnecessary goto statementGuixin Liu
There is no requirement to call nvme_tcp_free_queue() for queue deallocation if the pskid is null or the queue allocation fails, as the NVME_TCP_Q_ALLOCATED flag would not be set in such scenarios. Signed-off-by: Guixin Liu <kanie@linux.alibaba.com> Reviewed-by: Sagi Grimberg <sagi@grimberg.me> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-01-03drm/amd/display: Fixing stream allocation regressionRelja Vojvodic
For certain dual display configs that had one display using a 1080p mode, the DPM level used to drive the configs regressed from DPM 0 to DPM 3. This was caused by a missing check that should have only limited the pipe segments on non-phantom pipes. This caused issues with detile buffer allocation, which dissallow subvp from being used Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Dillon Varone <dillon.varone@amd.com> Reviewed-by: Martin Leung <martin.leung@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Relja Vojvodic <relja.vojvodic@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Verify disallow bits were cleared for idleNicholas Kazlauskas
[Why] A hang was observed where a read-modify-write access occurred due to the register for idle state being shared between DMCUB and driver. dmcub read - idle allow / no commit driver read - idle allow / no commit driver write - idle disallow / no commit dmcub write - idle allow / commit Resulting in DMCUB re-entering IPS after a disable and keeping the allow high. [How] Long term we need to split commit/allow into two registers or use shared DRAM state, but short term we can reduce the repro rate by ensuring that the disallow went through by bounding the expected worst case scenario. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Hansen Dsouza <hansen.dsouza@amd.com> Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Fix Mismatch between pipe and streamGabe Teeger
[Why] Failing mode validation during dc_commit, leading to blackscreen with an 8k DP2 display during mode change. [What] Fix mixmatch between pipe and stream, which prevented us from recognizing the link as DP2. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Gabe Teeger <gabe.teeger@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Refactor INIT into component folderRevalla
[why] Move all init files to hwss folder. [how] moved the dcnxx_init.c and .h files into inside the hwss and cleared the linkage errors. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Martin Leung <martin.leung@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Revalla <hrevalla@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: For FPO and SubVP/DRR configs program vmin/max selAlvin Lee
For FPO and SubVP/DRR cases we need to ensure to program OTG_V_TOTAL_MIN/MAX_SEL, otherwise stretching the vblank in FPO / SubVP / DRR cases will not have any effect and we could hit underflow / corruption. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Add dpia display mode validation logicMeenakshikumar Somasundaram
[Why] If bandwidth allocation feature is enabled, connection manager wont limit the dp tunnel bandwidth. So, need to do display mode validation for streams on dpia links to avoid oversubscription of dp tunnel bandwidth. [How] - To read non reduced link rate and lane count and update reported link capability. - To calculate the bandwidth required for streams of dpia links per host router and validate against the allocated bandwidth for the host router. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: PeiChen Huang <peichen.huang@amd.com> Reviewed-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Switch DMCUB notify idle command to NO_WAITNicholas Kazlauskas
[Why] Race condition between notification of driver idle and the command being processed. We could theoretically enter idle between the submission and the wait for idle that occurs after. [How] Switch the notification to NO_WAIT to avoid the RPTR access. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Sung joon Kim <sungjoon.kim@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amdgpu/gfx11: need acquire mutex before access CP_VMID_RESET v2Jack Xiao
It's required to take the gfx mutex before access to CP_VMID_RESET, for there is a race condition with CP firmware to write the register. v2: add extra code to ensure the mutex releasing is successful. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Wait forever for DMCUB to wake upNicholas Kazlauskas
[Why] If we time out waiting for PMFW to finish the exit sequence and touch the DMCUB register the system will hang in a hard locked state. [How] Pol forever. This covers the case where things take too long but also enables for debugging to occur since the cores won't be hardlocked. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Sung joon Kim <sungjoon.kim@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Always exit DMCUB idle when calledNicholas Kazlauskas
[Why] dc->idle_optimizations_allowed may be desynced with the hardware state. [How] Make sure we always exit out when dc_dmub_srv_exit_low_power_state is called by removing the check. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Sung joon Kim <sungjoon.kim@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Add log end specifierRelja Vojvodic
[Why] Some debug tools, sometimes wrap around to multiple lines which causes issues with the DPM test script while it is looking for the logs. Need a way to tell when the log is finished. [How] Added "LOG_END" to the end of the log. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Relja Vojvodic <relja.vojvodic@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Assign stream status for FPO + Vactive casesAlvin Lee
A new check was added to ensure FPO is not enabled when the FPO pipe has 0 planes. This requires the stream status to check the plane count, but the stream status was not assigned for FPO + Vactive cases which leads to FPO not be enabled always. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Relja Vojvodic <relja.vojvodic@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amdgpu: Let KFD sync with VM fencesFelix Kuehling
Change the rules for amdgpu_sync_resv to let KFD synchronize with VM fences on page table reservations. This fixes intermittent memory corruption after evictions when using amdgpu_vm_handle_moved to update page tables for VM mappings managed through render nodes. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: pbn_div need be updated for hotplug eventWayne Lin
link_rate sometime will be changed when DP MST connector hotplug, so pbn_div also need be updated; otherwise, it will mismatch with link_rate, causes no output in external monitor. Cc: stable@vger.kernel.org Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Jerry Zuo <jerry.zuo@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Wade Wang <wade.wang@hp.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Correctly restore user_levelCamille Cho
[Why] BL1_PWM_USER_LEVEL is meant for the user brightness level setting from OS. However, we update it along with other ABM levels to the real PWM value which could be ABMed. [How] Driver to cache and restore the user brightness level setting so that DMUB can retrieve the last user setting in ABM config initialization. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Anthony Koo <anthony.koo@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Camille Cho <camille.cho@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Fix minor issues in BW Allocation Phase2Meenakshikumar Somasundaram
[Why] Fix minor issues in BW Allocation Phase2. [How] - In set_usb4_req_bw_req(), link->dpia_bw_alloc_config.response_ready flag should be reset before writing DPCD REQUEST_BW. - Fix the granularity for value of 2 in get_bw_granularity(). - Removed bandwidth allocation support display fw boot option as the fw would read feature enable status from bios. - Clean up DPIA_EST_BW_CHANGED and DPIA_BW_REQ_SUCCESS cases in dpia_handle_bw_alloc_response(). - Removed allocate_usb4_bw and deallocate_usb4_bw. - Optimized loop in get_lowest_dpia_index(). - Updated link_dp_dpia_allocate_usb4_bandwidth_for_stream() and set_usb4_req_bw_req() to always issue request bw. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: PeiChen Huang <peichen.huang@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Add null pointer guards where neededJosip Pavic
[Why] Some functions whose output is typically checked for null are not being checked for null at several call sites, causing some static analysis tools to throw an error. [How] Add null pointer guards around functions that typically have them at other call sites. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Josip Pavic <josip.pavic@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Add HDMI capacity computations using fixed31_32Leo (Hanghong) Ma
[Why] Certain HDMI modes failed at dml cap check for uncompressed video but they can still be supported for compressed video. [How] Add HDMI capacity computations using fixed31_32 in dc side. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Chris Park <chris.park@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Add more mechanisms for testsRelja Vojvodic
[Why] More information is desired for the test tools. [How] Refactored get_subvp_visual_confirm_color and get_mclk_switch_visual_confirm_color to support the new method of storing the p_state type, which was changed so that it could also be saved and output by the DPM log. Ensured that the p_state type is kept updated by looping through the pipes within commit_planes_for_stream. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Relja Vojvodic <relja.vojvodic@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Don't allow FPO if no planesAlvin Lee
In DCN32/321 FPO uses per-pipe P-State force. If there is no plane, then then HUBP is power gated, in which case any programming in HUBP has no effect and the pipe is always asserting P-State allow. This is contrary to what we want to happen for FPO (FW should moderate the P-State assertion), so block FPO if there's no plane for the FPO pipe. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Reviewed-by: Samson Tam <samson.tam@amd.com> Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Fix subvp+drr logic errorsAlvin Lee
[Why] There is some logic error where the wrong variable was used to check for OTG_MASTER and DPP_PIPE. [How] Add booleans to confirm that the expected pipes were found before validating schedulability. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Reviewed-by: Samson Tam <samson.tam@amd.com> Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amdgpu: Fix ecc irq enable/disable unpairedStanley.Yang
The ecc_irq is disabled while GPU mode2 reset suspending process, but not be enabled during GPU mode2 reset resume process. Changed from V1: only do sdma/gfx ras_late_init in aldebaran_mode2_restore_ip delete amdgpu_ras_late_resume function Changed from V2: check umc ras supported before put ecc_irq Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: enable dcn35 idle power optimizationRoman Li
[Why] Idle power optimization was disabled on dcn35 by default. [How] Enable by setting disable_idle_power_optimizations to false. Signed-off-by: Roman Li <roman.li@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: Disable IPS by defaultRoman Li
[Why] Instability is observed on DCN35 if idle power optimization is enabled. [How] Disable IPS until issue is resolved. Signed-off-by: Roman Li <Roman.Li@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amdgpu: Add register read/write debugfs support for AID'sMangesh Gadre
SMN address is larger than 32 bits for registers on different AID's Updating existing interface to support access to such registers. Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03drm/amd/display: remove redundant initialization of variable remainderColin Ian King
Variable remainder is being initialized with a value that is never read, the assignment is redundant and can be removed. Also add a newline after the declaration to clean up the coding style. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03thermal: intel: hfi: Disable an HFI instance when all its CPUs go offlineRicardo Neri
In preparation to support hibernation, add functionality to disable an HFI instance during CPU offline. The last CPU of an instance that goes offline will disable such instance. The Intel Software Development Manual states that the operating system must wait for the hardware to set MSR_IA32_PACKAGE_THERM_STATUS[26] after disabling an HFI instance to ensure that it will no longer write on the HFI memory. Some processors, however, do not ever set such bit. Wait a minimum of 2ms to give time hardware to complete any pending memory writes. Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-01-03thermal: intel: hfi: Enable an HFI instance from its first online CPURicardo Neri
Previously, HFI instances were never disabled once enabled. A CPU in an instance only had to check during boot whether another CPU had previously initialized the instance and its corresponding data structure. A subsequent changeset will add functionality to disable instances to support hibernation. Such change will also make possible to disable an HFI instance during runtime via CPU hotplug. Enable an HFI instance from the first of its CPUs that comes online. This covers the boot, CPU hotplug, and resume-from-suspend cases. It also covers systems with one or more HFI instances (i.e., packages). Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-01-03thermal: intel: hfi: Refactor enabling code into helper functionsRicardo Neri
In preparation for the addition of a suspend notifier, wrap the logic to enable HFI and program its memory buffer into helper functions. Both the CPU hotplug callback and the suspend notifier will use them. This refactoring does not introduce functional changes. Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-01-03nubus: Make nubus_bus_type static and constantGreg Kroah-Hartman
Now that the driver core can properly handle constant struct bus_type, move the nubus_bus_type variable to be a constant structure as well, placing it into read-only memory which can not be modified at runtime. It's also never used outside of drivers/nubus/bus.c so make it static and don't export it as no one is using it. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Finn Thain <fthain@linux-m68k.org> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/2023121940-enlarged-editor-c9a8@gregkh Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2024-01-03mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v6.7-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.8. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-01-03mmc: core: Do not force a retune before RPMB switchJorge Ramirez-Ortiz
Requesting a retune before switching to the RPMB partition has been observed to cause CRC errors on the RPMB reads (-EILSEQ). Since RPMB reads can not be retried, the clients would be directly affected by the errors. This commit disables the retune request prior to switching to the RPMB partition: mmc_retune_pause() no longer triggers a retune before the pause period begins. This was verified with the sdhci-of-arasan driver (ZynqMP) configured for HS200 using two separate eMMC cards (DG4064 and 064GB2). In both cases, the error was easy to reproduce triggering every few tenths of reads. With this commit, systems that were utilizing OP-TEE to access RPMB variables will experience an enhanced performance. Specifically, when OP-TEE is configured to employ RPMB as a secure storage solution, it not only writes the data but also the secure filesystem within the partition. As a result, retrieving any variable involves multiple RPMB reads, typically around five. For context, on ZynqMP, each retune request consumed approximately 8ms. Consequently, reading any RPMB variable used to take at the very minimum 40ms. After droping the need to retune before switching to the RPMB partition, this is no longer the case. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Avri Altman <avri.altman@wdc.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20240103112911.2954632-1-jorge@foundries.io Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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