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2022-07-18pinctrl: at91: remove #ifdef CONFIG_PMClaudiu Beznea
Remove #ifdef CONFIG_PM and use pm_ptr() macro instead. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220704101253.808519-2-claudiu.beznea@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-18pinctrl: at91-pio4: remove #ifdef CONFIG_PM_SLEEPClaudiu Beznea
Remove #ifdef CONFIG_PM_SLEEP and use pm_sleep_ptr() macro instead. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220704101253.808519-1-claudiu.beznea@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-11pinctrl: qcom: Add pinctrl driver for MSM8909Stephan Gerhold
Make it possible to control pins using the TLMM block in the MSM8909 SoC by adding the necessary definitions for GPIOs, groups and functions. The driver is originally taken from the msm-4.9 release [1] from Qualcomm, but cleaned up significantly with several fixes and clarifications. [1]: https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LF.UM.8.7-22500-8x09.0/drivers/pinctrl/qcom/pinctrl-msm8909.c Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220628145502.4158234-3-stephan.gerhold@kernkonzept.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-11pinctrl: starfive: Serialize adding groups and functionsJianlong Huang
The pinctrl dt_node_to_map method may be called in parallel which leads us to call pinconf_generic_add_group and pinconf_generic_add_function in parallel. This is not supported though and leads to errors, so add a mutex to serialize these calls. Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20220627085333.1774396-1-emil.renner.berthing@canonical.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-10Merge tag 'renesas-pinctrl-for-v5.20-tag2' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.20 (take two) - Add support for the RZ/V2M and R-Car V4H SoCs, - Miscellaneous fixes and improvements.
2022-07-10pinctrl: amd: Remove contact informationBasavaraj Natikar
Remove contact information. Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Link: https://lore.kernel.org/r/20220613064127.220416-4-Basavaraj.Natikar@amd.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-10pinctrl: amd: Don't save/restore interrupt status and wake status bitsBasavaraj Natikar
Saving/restoring interrupt and wake status bits across suspend can cause the suspend to fail if an IRQ is serviced across the suspend cycle. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Fixes: 79d2c8bede2c ("pinctrl/amd: save pin registers over suspend/resume") Link: https://lore.kernel.org/r/20220613064127.220416-3-Basavaraj.Natikar@amd.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-10pinctrl: amd: Use devm_platform_get_and_ioremap_resourceBasavaraj Natikar
Use devm_platform_get_and_ioremap_resource() to simplify code. Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Link: https://lore.kernel.org/r/20220613064127.220416-2-Basavaraj.Natikar@amd.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-10Merge tag 'intel-pinctrl-v5.20-1' of ↵Linus Walleij
gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v5.20-1 * Update MAINTAINERS to set the Intel pin control status to Supported * Switch Intel pin control drivers to use struct pingroup The following is an automated git shortlog grouped by driver: baytrail: - Switch to to embedded struct pingroup cherryview: - Switch to to embedded struct pingroup intel: - Add Intel Meteor Lake pin controller support - Drop no more used members of struct intel_pingroup - Switch to to embedded struct pingroup - Embed struct pingroup into struct intel_pingroup lynxpoint: - Switch to to embedded struct pingroup MAINTAINERS: - Update Intel pin control to Supported Merge branch 'ib-v5.20-amd-pinctrl': - Merge branch 'ib-v5.20-amd-pinctrl' merrifield: - Switch to to embedded struct pingroup
2022-07-10pinctrl: qcom: spmi-gpio: make the irqchip immutableRobert Marko
Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as immutable") added a warning to indicate if the gpiolib is altering the internals of irqchips. Following this change the following warning is now observed for the SPMI PMIC pinctrl driver: gpio gpiochip1: (200f000.spmi:pmic@0:gpio@c000): not an immutable chip, please consider fixing it! Fix this by making the irqchip in the SPMI PMIC pinctrl driver immutable. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20220624195112.894916-1-robimarko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-05pinctrl: renesas: r8a779g0: Add missing MODSELx for AVBxKuninori Morimoto
AVB1 needs MODSEL6, AVB2 needs MODSEL5 settings. This patch adds missing MODSELx settings for the affected pins. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87k08xsj81.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add missing MODSELx for TSN0Kuninori Morimoto
TSN0 needs MODSEL4 settings. This patch adds missing MODSELx settings for the affected pins. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87letdsj8e.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add missing ERROROUTC_AKuninori Morimoto
This patch adds missing ERROROUTC_A settings. Current existing ERROROUTC should be _B, this patch tidies it up. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87mtdtsj8m.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add missing PWMKuninori Morimoto
R-Car V4H has PWM/PWM_A/PWM_B, but current PFC setting is mixed. This patch adds missing PWM settings, and tidies these up. According to Document, GP3_14 Function4 is PWM2_A, but we can't select it at P1SR3[27:24]. This patch just ignore it for now. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87o7y9sj90.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add missing FlexRayKuninori Morimoto
This patch adds missing FlexRay pins. Because Document (Rev.0.51) has 2x FXR_TXENA/B pin with no suffix (_A, _B), this patch names them as _X. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87pmipsj9a.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add missing TPU0TOx_AKuninori Morimoto
This patch adds missing TPU0TOx_A. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87r135sj9j.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add missing CANFD5_BKuninori Morimoto
This patch adds missing CANFD5_B. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87sfnlsj9t.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add missing SCIF1_XKuninori Morimoto
This patch adds missing SCIF1_X. Because Document (Rev.0.51) has 2x SCIF1 with no suffix (_A, _B), this patch names it as _X. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87tu81sja1.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add missing SCIF3Kuninori Morimoto
R-Car V4H has SCIF3 and SCIF3_A, but current PFC setting is mixed. This patch cleans up SCIF3/SCIF3_A, based on Rev.0.51. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87v8shsja7.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add missing HSCIF1_XKuninori Morimoto
This patch adds missing HSCIF1. Because Document (Rev.0.51) has 2x HSCIF1 with no suffix (_A, _B), this patch names it as _X. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87wncxsjah.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add missing HSCIF3_AKuninori Morimoto
This patch adds missing HSCIF3_A. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87y1xdsjar.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add missing IRQx_A/IRQx_BKuninori Morimoto
This patch adds missing IRQx_A/IRQx_B, and tidies up existing IRQs. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87zghtsjb4.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add missing TCLKx_A/TCLKx_B/TCLKx_XKuninori Morimoto
This patch adds missing TCLKx_A/TCLKx_B/TCLKx_X. Because Document (Rev.0.51) has 2x TCLK3/TCLK4 with no suffix (_A, _B), this patch names them as _X. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/871qv5txvt.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Tidyup POC1 voltageKuninori Morimoto
According to Rev.0.51 datasheet 004_R-CarV4H_pin_function.xlsx, GP1_23 - GP1_28 are 1.8/3.3V. But they are not on Table 7.28. According to the HW team, there are no bits assigned. This patch follows HW team's comment. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/8735fltxwg.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Tidy up ioctrl_regsKuninori Morimoto
Remove POC2 which is not documented, and remove TD0SEL3 which is not needed. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/874k01txy9.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Remove unused MOD_SELx definitionsKuninori Morimoto
Current R-Car V4H PFC code has many MOD_SELx definitions with all 0. But these have no meaning. This patch removes them. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/875ykhtxym.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Remove unused IPxSRx definitionsKuninori Morimoto
Current R-Car V4H PFC code has many IPxSRx definitions with all 0. But these have no meaning. This patch removes them. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/877d4xtxyv.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Remove unused NOGP definitionsKuninori Morimoto
Current R-Car V4H PFC code has many NOGP definitions. But these are not used, and they are different from original usage. This patch removes them. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/878rpdtxz8.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Fixup MODSEL8Kuninori Morimoto
MODSEL8 controls I2C vs. GPIO modes, and the Datasheet (Rev.0.51) is indicating that I2C needs 1. But we should use 0 for all cases in reality. New Datasheet should be updated. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87a69ttxzg.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: r8a779g0: Add pins, groups and functionsPhong Hoang
This patch adds SCIF, I2C, EthernetAVB, HSCIF, MMC, QSPI, MSIOF, PWM, CAN-FD, Ethernet-TSN, PCIe pins, groups, and functions. This patch was created based on the Rev.0.51 datasheet. Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com> Signed-off-by: CongDang <cong.dang.xn@renesas.com> Signed-off-by: Kazuya Mizuguch <kazuya.mizuguchi.ks@renesas.com> Signed-off-by: Tho Vu <tho.vu.wh@renesas.com> [Morimoto: merged above patches into one, cleanup white space, sort modules alphabetically, fixup comments] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87bku9ty0b.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC supportLUU HOAI
This patch adds initial pinctrl support for the R-Car V4H (R8A779G0) SoC, including bias, drive strength and voltage control. This patch was created based on the Rev.0.51 datasheet. Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [Morimoto: merge Kihara-san's MODSEL8 fixup patch, cleanup white space, care about reserved bits on each configs, fixup comments, etc.] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87czepty0j.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: Add PORT_GP_CFG_13 macrosKuninori Morimoto
Add PORT_GP_CFG_13() and PORT_GP_13() helper macros, to be used by the r8a779g0 subdriver. Based on a larger patch in the BSP by LUU HOAI. Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87edz5ty0r.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05pinctrl: renesas: Add RZ/V2M pin and gpio controller driverPhil Edworthy
Add support for pin and gpio controller driver for RZ/V2M SoC. Based on the RZ/G2L driver. Note that the DETDO and DETMS dedicated pins are currently not documented in the HW manual as to which pin group they are in. HW team has since said that the output level of 1.8V I/O group 4 (for MD0-7, and debugger) is the same as the 1.8V I/O group 3. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220624084833.22605-3-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-30pinctrl: intel: Add Intel Meteor Lake pin controller supportAndy Shevchenko
This driver adds pinctrl/GPIO support for Intel Meteor Lake. The GPIO controller is based on the next generation GPIO hardware but still compatible with the one supported by the Intel core pinctrl/GPIO driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-06-30pinctrl: axp209: Support the AXP221/AXP223/AXP809 variantSamuel Holland
These PMICs each have 2 GPIOs with the same register layout as AXP813, but without an ADC function. They all fall back to the AXP221 compatible string, so only that one needs to be listed in the driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20220621034224.38995-4-samuel@sholland.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-30pinctrl: qcom: sc7280: Fix compile bugSrinivasa Rao Mandadapu
Fix the compilation error, caused by updating constant variable. Hence remove redundant constant variable, which is no more useful as per new design. The issue is due to some unstaged changes. Fix it up. Fixes: 36fe26843d6d ("pinctrl: qcom: sc7280: Add clock optional check for ADSP bypass targets") Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1656489290-20881-1-git-send-email-quic_srivasam@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-29pinctrl: renesas: r8a779f0: Remove unused POC2Geert Uytterhoeven
The POWER Condition Control Register 2 (POC2) is unused, and the documentation does not define any valid bits. Remove it. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/d8a9ea39b49d24e39f4da3f00b64bce34016887d.1655301529.git.geert+renesas@glider.be
2022-06-28pinctrl: samsung: do not use bindings header with constantsKrzysztof Kozlowski
The Samsung SoC pin controller driver uses only three defines from the bindings header with pin configuration register values, which proves the point that this header is not a proper bindings-type abstraction layer with IDs. Define the needed register values directly in the driver and stop using the bindings header. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220605160508.134075-8-krzysztof.kozlowski@linaro.org Link: https://lore.kernel.org/r/20220624081022.32384-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-28pinctrl: aspeed: Fix typo in commentXiang wangx
Delete the redundant word 'and'. Signed-off-by: Xiang wangx <wangxiang@cdjrlc.com> Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de> Link: https://lore.kernel.org/r/20220618130854.12321-1-wangxiang@cdjrlc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-28pinctrl: ingenic: Convert to immutable irq chipAidan MacDonald
Update the driver to use an immutable IRQ chip to fix this warning: "not an immutable chip, please consider fixing it!" Preserve per-chip labels by adding an ->irq_print_chip() callback. Acked-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> Link: https://lore.kernel.org/r/20220622185010.2022515-3-aidanmacdonald.0x0@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-28pinctrl: ingenic: Use irqd_to_hwirq()Aidan MacDonald
Instead of accessing ->hwirq directly, use irqd_to_hwirq(). Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> Link: https://lore.kernel.org/r/20220622185010.2022515-2-aidanmacdonald.0x0@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-28pinctrl: pinctrl-zynqmp: Fix kernel-doc warningSai Krishna Potthuri
Fix the below kernel-doc warning by adding the description for return value. "warning: No description found for return value of 'zynqmp_pmux_get_function_groups'". Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/1655462819-28801-5-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-28pinctrl: pinctrl-zynqmp: Add support for output-enable and bias-high-impedanceSai Krishna Potthuri
Add support to handle 'output-enable' and 'bias-high-impedance' configurations. As part of the output-enable configuration, ZynqMP pinctrl driver takes care of removing the pins from tri-state. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/1655462819-28801-4-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-28pinctrl: ocelot: allow building as a moduleClément Léger
Set PINCTRL_OCELOT config option as a tristate and add MODULE_DEVICE_TABLE()/MODULE_LICENSE() to export appropriate information. Moreover, switch from builtin_platform_driver() to module_platform_driver(). Signed-off-by: Clément Léger <clement.leger@bootlin.com> Link: https://lore.kernel.org/r/20220617103548.490092-1-clement.leger@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-27pinctrl: qcom: sc7280: Fix compile bugLinus Walleij
The idea was right but the code was breaking in next. I assume some unstaged commit was involed. Fix it up. Cc: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Cc: Stephen Boyd <swboyd@chromium.org> Fixes: 36fe26843d6d ("pinctrl: qcom: sc7280: Add clock optional check for ADSP bypass targets") Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-27Merge tag 'renesas-pinctrl-for-v5.20-tag1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.20 - Fix reporting of input disabled pins on RZ/G2L.
2022-06-27pinctrl: mediatek: mt8192: Fix compile warningsLinus Walleij
After applying patches I get these warnings: drivers/pinctrl/mediatek/pinctrl-mt8192.c:1302:56: warning: "/*" within comment [-Wcomment] drivers/pinctrl/mediatek/pinctrl-mt8192.c:1362:56: warning: "/*" within comment [-Wcomment] Something is wrong with the missing end-slashes. Add them. Cc: Guodong Liu <guodong.liu@mediatek.com> Cc: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-26pinctrl: mediatek: fix the pinconf definition of some GPIO pinsGuodong Liu
Remove pin definitions that do not support the R0 & R1 pinconfig property. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220624133700.15487-6-guodong.liu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-26pinctrl: mediatek: dropping original advanced drive configuration functionGuodong Liu
Function bias_combo getter/setters already handle all cases advanced drive configuration, include drive for I2C related pins. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220624133700.15487-5-guodong.liu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-06-26pinctrl: mediatek: add rsel setting on mt8192Guodong Liu
1. I2C pins's resistance value can be controlled by rsel register. This patch provides rsel (resistance selection) setting on mt8192. 2. Also add the missing pull type array for mt8192 to document the pull type of each pin and prevent invalid pull type settings. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220624133700.15487-4-guodong.liu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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