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2020-05-28mmc: core: Return 1 from mmc_regulator_set_vqmmc() if switch skippedMarek Vasut
Adjust mmc_regulator_set_vqmmc() to return 1 if the voltage switch was skipped because the regulator voltage was already correct. This allows drivers to detect such condition and possibly skip various voltage switching extras. Signed-off-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20200416163649.336967-2-marex@denx.de Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: host: Prepare host drivers for mmc_regulator_set_vqmmc() returning > 0Marek Vasut
Patch all drivers which use mmc_regulator_set_vqmmc() and prepare them for the fact that mmc_regulator_set_vqmmc() can return a value > 0, which would happen if the signal voltage switch did NOT happen, because the voltage was already set correctly. Signed-off-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20200416163649.336967-1-marex@denx.de [Ulf: Re-worked/simplified the code a bit] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: sdhci-of-arasan: Remove uninitialized ret variablesNathan Chancellor
Clang warns: drivers/mmc/host/sdhci-of-arasan.c:784:9: warning: variable 'ret' is uninitialized when used here [-Wuninitialized] return ret; ^~~ drivers/mmc/host/sdhci-of-arasan.c:738:9: note: initialize the variable 'ret' to silence this warning int ret; ^ = 0 drivers/mmc/host/sdhci-of-arasan.c:860:9: warning: variable 'ret' is uninitialized when used here [-Wuninitialized] return ret; ^~~ drivers/mmc/host/sdhci-of-arasan.c:810:9: note: initialize the variable 'ret' to silence this warning int ret; ^ = 0 2 warnings generated. This looks like a copy paste error. Neither function has handling that needs ret so just remove it and return 0 directly. Link: https://github.com/ClangBuiltLinux/linux/issues/996 Reported-by: kernelci.org bot <bot@kernelci.org> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Link: https://lore.kernel.org/r/20200416182402.16858-1-natechancellor@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: renesas_sdhi: simplify summary outputWolfram Sang
No need to call platform_get_resource twice when we still have the pointer from before. Also, use '%pa' for a resource_size_t pointer. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200408142252.21958-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-28mmc: renesas_sdhi: improve TAP selection if all TAPs are goodWolfram Sang
When tuning HS400, if all TAPS are good, we can utilize the SMPCMP register to select the optimal TAP. For that, we populate a second bitmap with SMPCMP results and query it in case the regular bitmap is full (= all good). Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200408094638.10375-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: renesas_sdhi: clarify handling of selecting TAPsWolfram Sang
The comment and the define about how TAPs are selected were confusing to me because the good TAP was only valid if it was bigger than a *_MAX_* value. Rename the define and adapt the comment to what really happens. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200408094638.10375-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: renesas_sdhi: refactor calculation of best TAPWolfram Sang
To select the best TAP, we need to find the longest stream of set bits in a bit field. There is now a helper function for bitmaps which iterates over all region of set bits. Using it makes the code much more concise and easier to understand. Double so, because we need to handle two bitmaps in the near future. Remove a superfluous comment while here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200408094638.10375-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: sdhci: use FIELD_GET/PREP for capabilities bit masksMasahiro Yamada
Use FIELD_GET and FIELD_PREP to get access to the register fields. Delete the shift macros and use GENMASK() for the touched macros. Note that, this has the side-effect of changing the constants to 64-bit on 64-bit platforms. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200408072105.422-2-yamada.masahiro@socionext.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: sdhci: move SDHCI_CAPABILITIES_1 to a more suitable placeMasahiro Yamada
In the SDHCI specification, the Capabilities Register (Offset 0x40h) is the 64-bit width register, but in Linux, it is represented as two registers, SDHCI_CAPABILITIES and SDHCI_CAPABILITIES_1 so that drivers can use 32-bit register accessors. The upper 32-bit field is associated with SDHCI_CAPABILITIES_1. Move the definition of SDHCI_CAPABILITIES_1 to the correct place. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200408072105.422-1-yamada.masahiro@socionext.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: sdhci-of-arasan: Fix kernel-doc warningsManish Narani
Modify code to fix the warnings reported by kernel-doc for better documentation. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Link: https://lore.kernel.org/r/1586195015-128992-7-git-send-email-manish.narani@xilinx.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: sdhci-of-arasan: Modify clock operations handlingManish Narani
The SDHCI clock operations are platform specific. So it better to define them separately for particular platform. This will prevent multiple if..else conditions and will make it easy for user to add their own clock operations handlers. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Link: https://lore.kernel.org/r/1586195015-128992-6-git-send-email-manish.narani@xilinx.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: sdhci-of-arasan: Rearrange the platform data structs for modularityManish Narani
Existing driver code has the platform specific structures scattered throughout the driver code. Rearrange the platform specific data structures for more modularity and readability. This will help in adding new static functions with more ease. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Link: https://lore.kernel.org/r/1586195015-128992-5-git-send-email-manish.narani@xilinx.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: sdhci-of-arasan: Rename sdhci_arasan_data to avoid confusionManish Narani
There is 'struct sdhci_arasan_data' but also 'struct sdhci_arasan_of_data sdhci_arasan_data'. Rename the latter to avoid confusion with the name of the struct. Reported-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Manish Narani <manish.narani@xilinx.com> Link: https://lore.kernel.org/r/1586195015-128992-4-git-send-email-manish.narani@xilinx.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28sdhci: arasan: Add support for Versal Tap DelaysManish Narani
Add support to set tap delays for Xilinx Versal SD controller. The tap delay registers have moved to SD controller space in Versal. Make the changes accordingly. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/1586195015-128992-3-git-send-email-manish.narani@xilinx.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: wbsd: Replace hardcoded command numbers with existing definesUlf Hansson
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20200409125422.21842-1-ulf.hansson@linaro.org
2020-05-28mmc: s3cmci: Drop redundant code in s3cmci_setup_data()Ulf Hansson
The in-parameter struct mmc_data *data is never NULL, because the caller always provides a valid pointer. Hence drop the corresponding redundant code. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200407143903.22477-1-ulf.hansson@linaro.org
2020-05-28mmc: au1xmmc: Drop redundant code in au1xmmc_send_command()Ulf Hansson
The in-parameter "wait" is always set to 0 by the caller, hence just drop it and its corresponding code. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Manuel Lauss <manuel.lauss@gmail.com> Link: https://lore.kernel.org/r/20200406114337.8802-1-ulf.hansson@linaro.org
2020-05-28mmc: sdhci-sprd: Drop redundant cap flagsUlf Hansson
The MMC_CAP_ERASE and MMC_CAP_CMD23 flags are already being set in the common sdhci_setup_host(). This makes it redundant to set them for sdhci-sprd, so let's drop them. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200406113724.8504-1-ulf.hansson@linaro.org
2020-05-28mmc: android-goldfish: Enable MMC_CAP2_NO_SDIOUlf Hansson
Instead of explicitly checking for SDIO specific requests and then returning an error code, let's set MMC_CAP2_NO_SDIO to tell the mmc core to prevent them altogether. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20200401145531.23247-1-ulf.hansson@linaro.org
2020-05-28PM / devfreq: Use lockdep asserts instead of manual checks for locked mutexKrzysztof Kozlowski
Instead of warning when mutex_is_locked(), just use the lockdep framework. The code is smaller and checks could be disabled for production environments (it is useful only during development). Put asserts at beginning of function, even before validating arguments. The behavior of update_devfreq() is now changed because lockdep assert will only print a warning, not return with EINVAL. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2020-05-28PM / devfreq: imx-bus: Fix inconsistent IS_ERR and PTR_ERRGustavo A. R. Silva
Fix inconsistent IS_ERR and PTR_ERR in imx_bus_init_icc(). The proper pointer to be passed as argument to PTR_ERR() is priv->icc_pdev. This bug was detected with the help of Coccinelle. Fixes: 16c1d2f1b0bd ("PM / devfreq: imx: Register interconnect device") Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> [cw00.choi: Edit the patch title from 'imx' to 'imx-bus'] Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2020-05-28PM / devfreq: Replace strncpy with strscpyDmitry Osipenko
GCC produces this warning when kernel compiled using `make W=1`: warning: ‘strncpy’ specified bound 16 equals destination size [-Wstringop-truncation] 772 | strncpy(devfreq->governor_name, governor_name, DEVFREQ_NAME_LEN); The strncpy doesn't take care of NULL-termination of the destination buffer, while the strscpy does. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2020-05-28PM / devfreq: imx: Register interconnect deviceLeonard Crestez
There is no single device which can represent the imx interconnect. Instead of adding a virtual one just make the main &noc act as the global interconnect provider. The imx interconnect provider driver will scale the NOC and DDRC based on bandwidth request. More scalable nodes can be added in the future, for example for audio/display/vpu/gpu NICs. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2020-05-28PM / devfreq: Add generic imx bus scaling driverLeonard Crestez
Add initial support for dynamic frequency switching on pieces of the imx interconnect fabric. All this driver does is set a clk rate based on an opp table, it does not map register areas. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2020-05-28PM / devfreq: tegra30: Delete an error message in tegra_devfreq_probe()Markus Elfring
The function “platform_get_irq” can log an error already. Thus omit a redundant message for the exception handling in the calling function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2020-05-28PM / devfreq: tegra30: Make CPUFreq notifier to take into account boostingDmitry Osipenko
We're taking into account both HW memory-accesses + CPU activity based on current CPU's frequency. For memory-accesses there is a kind of hysteresis in a form of "boosting" which is managed by the tegra30-devfreq driver. If current HW memory activity is higher than activity judged based of the CPU's frequency, then there is no need to schedule cpufreq_update_work because the result of the work will be a NO-OP. And thus, tegra_actmon_cpufreq_contribution() should return 0, meaning that at the moment CPU frequency doesn't contribute anything to the final decision about required memory clock rate. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2020-05-28zram: Use local lock to protect per-CPU dataMike Galbraith
The zcomp driver uses per-CPU compression. The per-CPU data pointer is acquired with get_cpu_ptr() which implicitly disables preemption. It allocates memory inside the preempt disabled region which conflicts with the PREEMPT_RT semantics. Replace the implicit preemption control with an explicit local lock. This allows RT kernels to substitute it with a real per CPU lock, which serializes the access but keeps the code section preemptible. On non RT kernels this maps to preempt_disable() as before, i.e. no functional change. [bigeasy: Use local_lock(), description, drop reordering] Signed-off-by: Mike Galbraith <umgwanakikbuti@gmail.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Acked-by: Peter Zijlstra <peterz@infradead.org> Link: https://lore.kernel.org/r/20200527201119.1692513-8-bigeasy@linutronix.de
2020-05-28zram: Allocate struct zcomp_strm as per-CPU memorySebastian Andrzej Siewior
zcomp::stream is a per-CPU pointer, pointing to struct zcomp_strm which contains two pointers. Having struct zcomp_strm allocated directly as per-CPU memory would avoid one additional memory allocation and a pointer dereference. This also simplifies the addition of a local_lock to struct zcomp_strm. Allocate zcomp::stream directly as per-CPU memory. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Acked-by: Peter Zijlstra <peterz@infradead.org> Link: https://lore.kernel.org/r/20200527201119.1692513-7-bigeasy@linutronix.de
2020-05-28connector/cn_proc: Protect send_msg() with a local lockMike Galbraith
send_msg() disables preemption to avoid out-of-order messages. As the code inside the preempt disabled section acquires regular spinlocks, which are converted to 'sleeping' spinlocks on a PREEMPT_RT kernel and eventually calls into a memory allocator, this conflicts with the RT semantics. Convert it to a local_lock which allows RT kernels to substitute them with a real per CPU lock. On non RT kernels this maps to preempt_disable() as before. No functional change. [bigeasy: Patch description] Signed-off-by: Mike Galbraith <umgwanakikbuti@gmail.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Acked-by: Peter Zijlstra <peterz@infradead.org> Link: https://lore.kernel.org/r/20200527201119.1692513-6-bigeasy@linutronix.de
2020-05-28Bluetooth: btbcm: Added 003.006.007, changed 001.003.015Azamat H. Hackimov
Added new Broadcom device BCM4350C5, changed BCM4354A2 to BCM4356A2. Based on Broadcom Windows drivers 001.003.015 should be BCM4356A2. I have user report that firmware name is misplaced (https://github.com/winterheart/broadcom-bt-firmware/issues/3). Signed-off-by: Azamat H. Hackimov <azamat.hackimov@gmail.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2020-05-28mtd: spi-nor: Add support for Cypress cy15x104qSascha Hauer
The Cypress cy15b104q and cy15v104q are 4Mbit serial SPI F-RAM devices. Add support for them to the spi-nor driver. The actual Device ID of this chip is 7f 7f 7f 7f 7f 7f c2 2c 04. That is six times the continuation code 7f followed by c2 for Ramtron. Unfortunately the chip sends the Device ID in reversed order, so the continuation code is not at the beginning, but instead at the end. Even more unfortunate is that when reading further the chip sends more 7f codes which means we are not even able to count the continuation codes. We can only hope that this reversed Device ID will never match any other devices ID. Collisions are improbable as of now, the solution from above is good enough. In case of future collisions one can introduce an INFO9 macro, with the downsize that struct flash_info would grow and we have lots of flashes. A more elegant solution would be to introduce dedicated flash ID tables for each bank in JESP106BA. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [tudor.ambarus@microchip.com: amend commit description with possible future solutions in case collisions occur.] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-05-28mtd: spi-nor: Fix SPI NOR acronymTudor Ambarus
The correct terminology is serial NOR flash or SPI NOR. s/SPI-NOR/SPI NOR and s/spi-nor/SPI NOR across the subsystem. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
2020-05-28mtd: spi-nor: spansion: Differentiate between s25fl256s and s25fs256sTudor Ambarus
s25fs256s was identified as s25fl256s. Differentiate between them by the Family ID using the INFO6 macro. Fixes: b199489d37b2 ("mtd: spi-nor: add the framework for SPI NOR") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
2020-05-28mtd: spi-nor: Add support for s25fs128s1Yicong Yang
Add support for Cypress s25fs128s1 flash. Previously the flash is decoded as s25fl129p1 by mistake. Add it in the flash info list to correctly decode. The flash also needs a fixup for s25fs-s family. Further capability of the flash will be parsed from bfpt. The flash has been tested under SPI/DUAL/QUAD mode on hisi-sfc-v3xx controller, all the write/read/erase works well. Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-05-28crypto: hisilicon - fix driver compatibility issue with different versions ↵Weili Qian
of devices In order to be compatible with devices of different versions, V1 in the accelerator driver is now isolated, and other versions are the previous V2 processing flow. Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-05-28crypto: cavium/nitrox - Fix a typo in a commentChristophe JAILLET
s/NITORX/NITROX/ Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-05-28power: charger: max14577: Add proper dt-compatible stringsMarek Szyprowski
Add device tree compatible strings and create proper modalias structures to let this driver load automatically if compiled as module, because max14577 MFD driver creates MFD cells with such compatible strings. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-05-28Merge tag 'tags/ib-mfd-iio-power-v5.8' into psy-nextSebastian Reichel
This merges the MP2629 battery charge management immutable branch between MFD, IIO and power-supply due for the v5.8 merge window into power-supply for-next branch. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-05-28mtd: spi-nor: spansion: fix writes on S25FS512SSergei Shtylyov
Spansion S25FS-S family has an issue in the Basic Flash Parameter Table (BFPT): Dword-11 bits 7:4 specify a page size of 512 bytes. Actually this is configurable in the vendor unique register (CR3V) and even the factory default setting is to "wrap at 256 bytes", so blindly relying on BFPT breaks the page writes on these chips. Add the post-BFPT fixup which restores the default page size of 256 bytes -- to properly read CR3V this early is quite intrusive and should better be done as a new feature; Alexander Sverdlin had the patch doing that: https://patchwork.ozlabs.org/project/linux-mtd/patch/20200227123657.26030-1-alexander.sverdlin@nokia.com/ Fixes: dfd2b74530e ("mtd: spi-nor: add Spansion S25FS512S ID") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Tested-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-05-28power: reset: syscon-reboot: Add parental syscon supportSerge Semin
Since normally syscon-reboot block is supposed to be a part of a system controller, lets look for the syscon regmap in a parental DT node if regmap property isn't specified. DT binding from now considers the regmap property as deprecated. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-05-28Merge tag 'amd-drm-next-5.8-2020-05-27' of ↵Dave Airlie
git://people.freedesktop.org/~agd5f/linux into drm-next amd-drm-next-5.8-2020-05-27: amdgpu: - SRIOV fixes - RAS fixes - VCN 2.5 DPG (Dynamic PowerGating) fixes - FP16 updates for display - CTF cleanups - Display fixes - Fix pcie bw sysfs handling - Enable resizeable BAR support for gmc 10.x - GFXOFF fixes for Raven - PM sysfs handling fixes amdkfd: - Fix a race condition - Warning fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200527231219.3930-1-alexander.deucher@amd.com
2020-05-28Merge tag 'v5.7-rc7' into perf/core, to pick up fixesIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-05-28Merge tag 'amd-drm-fixes-5.7-2020-05-27' of ↵Dave Airlie
git://people.freedesktop.org/~agd5f/linux into drm-fixes amd-drm-fixes-5.7-2020-05-27: amdgpu: - Display atomic test fix - Fix soft hang in display vupdate code Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200527222700.4378-1-alexander.deucher@amd.com
2020-05-28Merge tag 'drm-misc-next-fixes-2020-05-27' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-misc into drm-next Short summary of fixes pull (less than what git shortlog provides): There's a fix for panel brighness on Lenovo X13 Yoga devices and a fix for -Wformat warnings on architectures where atomic-64 counters are not of type unsigned long long. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20200527080123.GA8186@linux-uq9g
2020-05-27drivers: soc: ti: knav_qmss_queue: Make knav_gp_range_ops staticSamuel Zou
Fix the following sparse warning: drivers/soc/ti/knav_qmss_queue.c:412:23: warning: symbol 'knav_gp_range_ops' was not declared. The knav_acc_firmwares has only call site within knav_qmss_queue.c It should be static Fixes: 41f93af900a2 ("soc: ti: add Keystone Navigator QMSS driver") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Samuel Zou <zou_wei@huawei.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-05-27soc: ti: add k3 platforms chipid module driverGrygorii Strashko
The Texas Instruments K3 Multicore SoC platforms have chipid module which is represented by CTRLMMR_xxx_JTAGID register and contains information about SoC id and revision. Bits: 31-28 VARIANT Device variant 27-12 PARTNO Part number 11-1 MFG Indicates TI as manufacturer (0x17) 1 Always 1 This patch adds corresponding driver to identify the TI K3 SoC family and revision, and registers this information with the SoC bus. It is available under /sys/devices/soc0/ for user space, and can be checked, where needed, in Kernel using soc_device_match(). Identification is done by: - checking MFG to be TI ID - retrieving Device variant (revision) - retrieving Part number and convert it to the family - retrieving machine from DT "/model" Example J721E: # cat /sys/devices/soc0/{machine,family,revision} Texas Instruments K3 J721E SoC J721E SR1.0 Example AM65x: # cat /sys/devices/soc0/{machine,family,revision} Texas Instruments AM654 Base Board AM65X SR1.0 Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-05-27dt/platform: Fix comment in of_dev_lookup()Qi Zheng
The code is using of_dev_lookup() rather than of_devname_lookup(). Signed-off-by: Qi Zheng <arch0.zheng@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
2020-05-27of: Fix a refcounting bug in __of_attach_node_sysfs()Dan Carpenter
The problem in this code is that if kobject_add() fails, then it should call of_node_put(np) to drop the reference count. I've actually moved the of_node_get(np) later in the function to avoid needing to do clean up. Fixes: 5b2c2f5a0ea3 ("of: overlay: add missing of_node_get() in __of_attach_node_sysfs") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Rob Herring <robh@kernel.org>
2020-05-27ice: Check UMEM FQ size when allocating bufsKrzysztof Kazimierczak
If a UMEM is present on a queue when an interface/queue pair is being enabled, the driver will try to prepare the Rx buffers in advance to improve performance. However, if fill queue is shorter than HW Rx ring, the driver will report failure after getting the last address from the fill queue. This still lets the driver process the packets correctly during the NAPI poll, but leads to a constant NAPI rescheduling. Not allocating the buffers in advance would result in a potential performance decrease. Commit d57d76428ae9 ("xsk: Add API to check for available entries in FQ") provides an API that lets drivers check the number of addresses that the fill queue holds. Notify the user if fill queue is not long enough to prepare all buffers before packet processing starts, and allocate the buffers during the NAPI poll. If the fill queue size is sufficient, prepare Rx buffers in advance. Signed-off-by: Krzysztof Kazimierczak <krzysztof.kazimierczak@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-27net/mlx5: DR, Split RX and TX lock for parallel insertionAlex Vesker
Change the locking flow to support RX and TX locks, splitting the single lock to two will allow inserting rules in parallel for RX and TX parts of the FDB. Locking the dr_domain will be done by locking the RX domain and the TX domain locks, this is mostly used for control operations on the dr_domain. When inserting rules for RX or TX the single nic_doamin RX or TX lock will be used. Splitting the lock is safe since RX and TX domains are logically separated from each other, shared objects such the send-ring and memory pool are protected by locks. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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