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Don't populate the array mclk_name on the stack but instead make it
static. Makes the object code smaller by 23 bytes:
Before:
text data bss dec hex filename
38050 11604 64 49718 c236 linux/drivers/mfd/arizona-core.o
After:
text data bss dec hex filename
38027 11604 64 49695 c21f linux/drivers/mfd/arizona-core.o
(gcc version 8.2.0 x86_64)
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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1;5201;0c
Reduce size of duplicated comments by switching to use SPDX identifier.
No functional change.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Sort headers alphabetically for better maintenance.
No functional change.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Power button IRQ actually has a second level of interrupts to
distinguish between UI and POWER buttons. Moreover, current
implementation looks awkward in approach to handle second level IRQs by
first level related IRQ chip.
To address above issues, split power button IRQ to be chained as well.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Instead of open coding each data structure with regmap IRQresources,
use dedicated macro.
No functional change intended.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Instead of open coding each data structure with IRQ resources,
use dedicated macro.
No functional change intended.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Instead of open coding each data structure with IRQ resources,
use dedicated macro.
In one case use DEFINE_RES_IRQ_NAMED() and DEFINE_RES_MEM_NAMED().
No functional change intended.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Add support for the audio-codec node by converting from
devm_of_platform_populate() to devm_mfd_add_devices().
Tested-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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When trying to read any MC13892 ADC channel on a imx51-babbage board:
The MC13892 PMIC shutdowns completely.
After debugging this issue and comparing the MC13892 and MC13783
initializations done in the vendor kernel, it was noticed that the
CHRGRAWDIV bit of the ADC0 register was not being set.
This bit is set by default after power on, but the driver was
clearing it.
After setting this bit it is possible to read the ADC values correctly.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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While polling for BOOT_DONE the chip could NAK a read because it is
still booting, which would terminate the regmap_read_poll_timeout()
with an error.
Instead implement a polling loop that ignores read errors so we
always poll until the chip signals boot or the loop times out.
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Don't call runtime_put_sync when clk32k_ref is ARIZONA_32KZ_MCLK2
as there is no corresponding runtime_get_sync call.
MCLK1 is not in the AoD power domain so if it is used as 32kHz clock
source we need to hold a runtime PM reference to keep the device from
going into low power mode.
Fixes: cdd8da8cc66b ("mfd: arizona: Add gating of external MCLKn clocks")
Signed-off-by: Sapthagiri Baratam <sapthagiri.baratam@cirrus.com>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Currently on every resume we check for mkbp events and notify the
clients. This helps in identifying the wakeup sources. But on devices
that do not support mkbp protocol, we might end up querying key state of
the keyboard in a loop which blocks the resume. Instead check for events
only if mkbp is supported.
Signed-off-by: RaviChandra Sadineni <ravisadineni@chromium.org>
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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No functional changes
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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The main MFD driver for Samsung PMICs (S2MPSXX, S5M876X) used with
Exynos SoCs can be compiled and used as a module. The dependent clock,
regulator and RTC drivers already can be built as a module.
Building entire set of drivers as modules might require using initial
ramdisk and can make booting process longer (due to probe deferrals).
However adding such option is useful for testing and for multi-platform
configurations.
This also add required module authors to sec-irq.c file based on recent
main contributors.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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The indentation should be a tab followed by two spaces.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Replace GPL v2.0+ license statements with SPDX license identifiers.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Replace GPL v2.0+ license statements with SPDX license identifiers.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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'ib-mfd-rtc-4.20' and 'ib-mfd-spi-tty-4.20-1' into ibs-for-mfd-merged
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git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds
Pull LED updates from Jacek Anaszewski:
"We introduce LED pattern trigger - the idea that was proposed three
years ago now received enough attention and determination to drive it
to the successful end.
There is also one new LED class driver and couple of improvements to
the existing ones.
New LED class driver:
- add support for Panasonic AN30259A with related DT bindings
New LED trigger:
- introduce LED pattern trigger
leds-sc27xx-bltc:
- implement pattern_set/clear ops to enable support for pattern
trigger's hw_pattern sysfs file
Improvements to existing LED class drivers:
- leds-pwm: don't print error message on -EPROBE_DEFER
- leds-gpio: try to lookup gpiod from device
- leds-as3645a: convert to using %pOFn instead of device_node.name"
* tag 'leds-for-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds:
leds: sc27xx: Add pattern_set/clear interfaces for LED controller
leds: core: Introduce LED pattern trigger
leds: add Panasonic AN30259A support
dt-bindings: leds: document Panasonic AN30259A bindings
leds: gpio: Try to lookup gpiod from device
leds: pwm: silently error out on EPROBE_DEFER
leds: Convert to using %pOFn instead of device_node.name
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v4.20 series:
Core changes:
- A patch series from Hans Verkuil to make it possible to
enable/disable IRQs on a GPIO line at runtime and drive GPIO lines
as output without having to put/get them from scratch.
The irqchip callbacks have been improved so that they can use only
the fastpatch callbacks to enable/disable irqs like any normal
irqchip, especially the gpiod_lock_as_irq() has been improved to be
callable in fastpath context.
A bunch of rework had to be done to achieve this but it is a big
win since I never liked to restrict this to slowpath. The only call
requireing slowpath was try_module_get() and this is kept at the
.request_resources() slowpath callback. In the GPIO CEC driver this
is a big win sine a single line is used for both outgoing and
incoming traffic, and this needs to use IRQs for incoming traffic
while actively driving the line for outgoing traffic.
- Janusz Krzysztofik improved the GPIO array API to pass a "cookie"
(struct gpio_array) and a bitmap for setting or getting multiple
GPIO lines at once.
This improvement orginated in a specific need to speed up an OMAP1
driver and has led to a much better API and real performance gains
when the state of the array can be used to bypass a lot of checks
and code when we want things to go really fast.
The previous code would minimize the number of calls down to the
driver callbacks assuming the CPU speed was orders of magnitude
faster than the I/O latency, but this assumption was wrong on
several platforms: what we needed to do was to profile and improve
the speed on the hot path of the array functions and this change is
now completed.
- Clean out the painful and hard to grasp BNF experiments from the
device tree bindings. Future approaches are looking into using JSON
schema for this purpose. (Rob Herring is floating a patch series.)
New drivers:
- The RCAR driver now supports r8a774a1 (RZ/G2M).
- Synopsys GPIO via CREGs driver.
Major improvements:
- Modernization of the EP93xx driver to use irqdomain and other
contemporary concepts.
- The ingenic driver has been merged into the Ingenic pin control
driver and removed from the GPIO subsystem.
- Debounce support in the ftgpio010 driver"
* tag 'gpio-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (116 commits)
gpio: Clarify kerneldoc on gpiochip_set_chained_irqchip()
gpio: Remove unused 'irqchip' argument to gpiochip_set_cascaded_irqchip()
gpio: Drop parent irq assignment during cascade setup
mmc: pwrseq_simple: Fix incorrect handling of GPIO bitmap
gpio: fix SNPS_CREG kconfig dependency warning
gpiolib: Initialize gdev field before is used
gpio: fix kernel-doc after devres.c file rename
gpio: fix doc string for devm_gpiochip_add_data() to not talk about irq_chip
gpio: syscon: Fix possible NULL ptr usage
gpiolib: Show correct direction from the beginning
pinctrl: msm: Use init_valid_mask exported function
gpiolib: Add init_valid_mask exported function
GPIO: add single-register GPIO via CREG driver
dt-bindings: Document the Synopsys GPIO via CREG bindings
gpio: mockup: use device properties instead of platform_data
gpio: Slightly more helpful debugfs
gpio: omap: Remove set but not used variable 'dev'
gpio: omap: drop omap_gpio_list
Accept partial 'gpio-line-names' property.
gpio: omap: get rid of the conditional PM runtime calls
...
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v4.20 series:
There were no significant changes to the core this time! Bur the new
Qualcomm, Mediatek and Broadcom drivers are quite interesting as they
will be used in a few million embedded devices the coming years as it
seems.
New drivers:
- Broadcom Northstar pin control driver.
- Mediatek MT8183 subdriver.
- Mediatek MT7623 subdriver.
- Mediatek MT6765 subdriver.
- Meson g12a subdriver.
- Nuvoton NPCM7xx pin control and GPIO driver.
- Qualcomm QCS404 pin control and GPIO subdriver.
- Qualcomm SDM660 pin control and GPIO subdriver.
- Renesas R8A7744 PFC subdriver.
- Renesas R8A774C0 PFC subdriver.
- Renesas RZ/N1 pinctrl driver
Major improvements:
- Pulled the GPIO support for Ingenic over from the GPIO subsystem
and consolidated it all in the Ingenic pin control driver.
- Major cleanups and consolidation work in all Intel drivers.
- Major cleanups and consolidation work in all Mediatek drivers.
- Lots of incremental improvements to the Renesas PFC pin controller
family.
- All drivers doing GPIO now include <linux/gpio/driver.h> and
nothing else"
* tag 'pinctrl-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (153 commits)
pinctrl: sunxi: Fix a memory leak in 'sunxi_pinctrl_build_state()'
gpio: uniphier: include <linux/bits.h> instead of <linux/bitops.h>
pinctrl: uniphier: include <linux/bits.h> instead of <linux/bitops.h>
dt-bindings: pinctrl: bcm4708-pinmux: improve example binding
pinctrl: geminilake: Sort register offsets by value
pinctrl: geminilake: Get rid of unneeded ->probe() stub
pinctrl: geminilake: Update pin list for B0 stepping
pinctrl: renesas: Fix platform_no_drv_owner.cocci warnings
pinctrl: mediatek: Make eint_m u16
pinctrl: bcm: ns: Use uintptr_t for casting data
pinctrl: madera: Fix uninitialized variable bug in madera_mux_set_mux
pinctrl: gemini: Fix up TVC clock group
pinctrl: gemini: Drop noisy debug prints
pinctrl: gemini: Mask and set properly
pinctrl: mediatek: select GPIOLIB
pinctrl: rza1: don't manually release devm managed resources
MAINTAINERS: update entry for Mediatek pin controller
pinctrl: bcm: add Northstar driver
dt-bindings: pinctrl: document Broadcom Northstar pin mux controller
pinctrl: qcom: fix 'const' pointer handling
...
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Pull MMC updates from Ulf Hansson:
"MMC core:
- Introduce a host helper function to share re-tuning progress
MMC host:
- sdhci: Add support for v4 host mode
- sdhci-of-arasan: Add Support for AM654 MMC and PHY
- sdhci-sprd: Add support for Spreadtrum's host controller
- sdhci-tegra: Add support for HS400 enhanced strobe
- sdhci-tegra: Enable UHS/HS200 modes for Tegra186/210
- sdhci-tegra: Add support for HS400 delay line calibration
- sdhci-tegra: Add support for pad calibration
- sdhci-of-dwcmshc: Address 128MB DMA boundary limitation
- sdhci-of-esdhc: Add support for tuning erratum A008171
- sdhci-iproc: Add ACPI support
- mediatek: Add support for MT8183
- mediatek: Improve the support for tuning
- mediatek: Add bus clock control for MT2712
- jz4740: Add support for the JZ4725B
- mmci: Add support for the stm32 sdmmc variant
- mmci: Add support for an optional reset control
- mmci: Add some new variant specific properties/callbacks
- mmci: Re-structure DMA code to prepare for new variants
- renesas_sdhi: Add support for r8a77470, r8a7744 and r8a774a1
- renesas_sdhi_internal_dmac: Whitelist r8a77970 and r8a774a1
- tmio/uniphier-sd: Add new UniPhier SD/eMMC controller driver
- tmio/renesas_sdhi: Deal properly with SCC detection during re-tune
- tmio/renesas_sdhi: Refactor/consolidate clock management
- omap_hsmmc: Drop cover detection and some unused platform data
- dw_mmc-exynos: Enable tuning for more speed modes
- sunxi: Clarify the new timing mode and enable it for the A64 controller
- various: Convert to slot GPIO descriptors"
* tag 'mmc-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (129 commits)
mmc: mediatek: drop too much code of tuning method
mmc: mediatek: add MT8183 MMC driver support
mmc: mediatek: tune CMD/DATA together
mmc: mediatek: fix cannot receive new request when msdc_cmd_is_ready fail
mmc: mediatek: fill the actual clock for mmc debugfs
mmc: dt-bindings: add support for MT8183 SoC
mmc: uniphier-sd: avoid using broken DMA RX channel
mmc: uniphier-sd: fix DMA disabling
mmc: tmio: simplify the DMA mode test
mmc: tmio: remove TMIO_MMC_HAVE_HIGH_REG flag
mmc: tmio: move MFD variant reset to a platform hook
mmc: renesas_sdhi: Add r8a77470 SDHI1 support
dt-bindings: mmc: renesas_sdhi: Add r8a77470 support
mmc: mmci: add stm32 sdmmc variant
dt-bindings: mmci: add stm32 sdmmc variant
mmc: mmci: add stm32 sdmmc registers
mmc: mmci: add clock divider for stm32 sdmmc
mmc: mmci: add optional reset property
dt-bindings: mmci: add optional reset property
mmc: mmci: add variant property to not read datacnt
...
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Ping with Jumbo packet does not reply and get a watchdog timeout
[ 46.059616] ------------[ cut here ]------------
[ 46.064268] NETDEV WATCHDOG: eth0 (socfpga-dwmac): transmit queue 0 timed out
[ 46.071471] WARNING: CPU: 1 PID: 0 at net/sched/sch_generic.c:461 dev_watchdog+0x2cc/0x2d8
[ 46.079708] Modules linked in:
[ 46.082761] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.18.0-00115-gc262be665854-dirty #264
[ 46.091082] Hardware name: SoCFPGA Stratix 10 SoCDK (DT)
[ 46.096377] pstate: 20000005 (nzCv daif -PAN -UAO)
[ 46.101152] pc : dev_watchdog+0x2cc/0x2d8
[ 46.105149] lr : dev_watchdog+0x2cc/0x2d8
[ 46.109144] sp : ffff00000800bd80
[ 46.112447] x29: ffff00000800bd80 x28: ffff80007a9b4940
[ 46.117744] x27: 00000000ffffffff x26: ffff80007aa183b0
[ 46.123040] x25: 0000000000000001 x24: 0000000000000140
[ 46.128336] x23: ffff80007aa1839c x22: ffff80007aa17fb0
[ 46.133632] x21: ffff80007aa18000 x20: ffff0000091a7000
[ 46.138927] x19: 0000000000000000 x18: ffffffffffffffff
[ 46.144223] x17: 0000000000000000 x16: 0000000000000000
[ 46.149519] x15: ffff0000091a96c8 x14: 07740775076f0720
[ 46.154814] x13: 07640765076d0769 x12: 0774072007300720
[ 46.160110] x11: 0765077507650775 x10: 0771072007740769
[ 46.165406] x9 : 076d0773076e0761 x8 : 077207740720073a
[ 46.170702] x7 : 072907630761076d x6 : ffff80007ff9a0c0
[ 46.175997] x5 : ffff80007ff9a0c0 x4 : 0000000000000002
[ 46.181293] x3 : 0000000000000000 x2 : ffff0000091ac180
[ 46.186589] x1 : e6a742ebe628e800 x0 : 0000000000000000
[ 46.191885] Call trace:
[ 46.194326] dev_watchdog+0x2cc/0x2d8
[ 46.197980] call_timer_fn+0x20/0x78
[ 46.201544] expire_timers+0xa4/0xb0
[ 46.205108] run_timer_softirq+0xe4/0x198
[ 46.209107] __do_softirq+0x114/0x210
[ 46.212760] irq_exit+0xd0/0xd8
[ 46.215895] __handle_domain_irq+0x60/0xb0
[ 46.219977] gic_handle_irq+0x58/0xa8
[ 46.223628] el1_irq+0xb0/0x128
[ 46.226761] arch_cpu_idle+0x10/0x18
[ 46.230326] do_idle+0x1d4/0x288
[ 46.233544] cpu_startup_entry+0x24/0x28
[ 46.237457] secondary_start_kernel+0x17c/0x1c0
[ 46.241971] ---[ end trace 57048cd1372cd828 ]---
Inspection of queue showed Jumbo packets were not sent out.
The ring Jumbo packet function needs to set the OWN bit so
the packet is sent.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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After flushing all mcast entries from the table, the ones contained in
mc list of ndev are not restored when promisc mode is toggled off,
because they are considered as synched with ALE, thus, in order to
restore them after promisc mode - reset syncing info. This fix
touches only switch mode devices, including single port boards
like Beagle Bone.
Fixes: commit 5da1948969bc
("net: ethernet: ti: cpsw: fix lost of mcast packets while rx_mode update")
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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By default NIXLF is set in UCAST mode. This patch adds a new
mailbox message which when sent by a RVU PF changes this default
mode. When promiscuous mode is needed, the reserved promisc entry
for each of RVU PF is setup to match against ingress channel number
only, so that all pkts on that channel are accepted and forwarded
to the mode change requesting PF_FUNC's NIXLF.
PROMISC and ALLMULTI modes are supported only for PFs, for VFs only
UCAST mode is supported.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Added a new mailbox message for a PF/VF to set/update
it's NIXLF's MAC address. Also updates unicast NPC
MCAM entry with this address as matching DMAC.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds support for a RVU PF/VF to change
NIX Rx flowkey algorithm index in NPC RX RSS_ACTION.
eg: a ethtool command changing RSS algorithm for a netdev
interface would trigger this change in NPC.
If PF/VF doesn't specify any MCAM entry index then default
UCAST entry of the NIXLF attached to PF/VF will be updated
with RSS_ACTION and flowkey index.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Configure NIX RX flowkey algorithm configuration to support
RSS (receive side scaling). Currently support for only L3/L4
2-tuple and 4-tuple hash of IPv4/v6/TCP/UDP/SCTP is added.
HW supports upto 32 different flowkey algorithms which SW
can define, this patch defines 9. NPC RX ACTION has to point
to one of these flowkey indices for RSS to work.
The configuration is dependent on NPC parse result's layer
info. So if NPC KPU profile changes suchthat LID/LTYPE values
of above said protocols change then this configuration will
most likely be effected.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Upon NIXLF_ALLOC install a unicast forwarding rule in NPC MCAM
like below
- Match pkt DMAC with NIXLF attached PF/VF's MAC address.
- Ingress channel
- Action is UCAST
- Forward to PF_FUNC of this NIXLF
And broadcast pkt forwarding rule as
- Match L2B bit in MCAM search key
- Ingress channel
- Action is UCAST, for now, later it will be changed to MCAST.
Only PFs can install this rule
Upon NIXLF_FREE disable all MCAM entries in use by that NIXLF.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Add LMAC channel info like Rx/Tx channel base and count to
NIXLF_ALLOC mailbox message response. This info is used by
NIXLF attached RVU PF/VF to configure SQ's default channel,
TL3_TL2_LINKX_CFG and to install MCAM rules in NPC based
on matching ingress channel number.
Signed-off-by: Stanislaw Kardach <skardach@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds some minimal configuration for NPC MCAM and
LDATA extraction which is sufficient enough to install
ucast/bcast/promiscuous forwarding rules. Below is the
config done
- LDATA extraction config to extract DMAC from pkt
to offset 64bit in MCAM search key.
- Set MCAM lookup keysize to 224bits
- Set MCAM TX miss action to UCAST_DEFAULT
- Set MCAM RX miss action to DROP
Also inorder to have guaranteed space in MCAM to install
ucast forwarding rule for each of RVU PF/VF, reserved
one MCAM entry for each of NIXLF for ucast rule. And two
entries for each of RVU PF. One for bcast pkt replication
and other for promiscuous mode which allows all pkts
received on a HW CGX/LBK channel.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Config NPC layer info from KPU profile into protocol
checker to identify outer L2/IPv4/TCP/UDP headers in a
packet. And enable IPv4 checksum validation.
L3/L4 and L4 CSUM validation will be enabled by PF/VF
drivers by configuring NIX_AF_LF(0..127)_RX_CFG via mbox
i.e 'nix_lf_alloc_req->rx_cfg'
Also enable setting of NPC_RESULT_S[L2B] when an outer
L2 broadcast address is detected. This will help in
installing NPC MCAM rules for broadcast packets.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Added support for PF/VF drivers to configure NIX to
capture and/or strip VLAN tag from ingress packets.
Signed-off-by: Vamsi Attunuru <vamsi.attunuru@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Upon NIXLF ALLOC/FREE, add or remove corresponding PF_FUNC from
the broadcast packet replication list of the CGX LMAC mapped
RVU PF.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Allocate memory for mcast/bcast/mirror replication entry
contexts, replication buffers (used by HW) and config HW
with corresponding memory bases. Added support for installing
MCEs via NIX AQ mbox.
For now support is restricted to broadcast pkt replication,
hence MCE table size and number of replication buffers
allocated are less. Each CGX LMAC mapped RVU PF is assigned
a MCE table of size 'num VFs of that PF + PF'.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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For each CGX LMAC that is mapped to a RVU PF, allocate
a pkind and config the same in CGX. For a received packet
at CGX LMAC interface this pkind is used by NPC block
to start parsing of packet.
Signed-off-by: Geetha sowjanya <gakula@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch configures all 16 KPUs and iKPU (pkinds) with
the KPU parser profile defined in npc_profile.h. Each KPU
engine has a 128 entry CAM, only CAM entries which are listed
in the profile are enabled and rest are left disabled.
Also
- Memory is allocated for pkind's bitmap and PFFUNC, interface
channel mapping.
- Added all CSR offsets of NPC HW block.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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NPC block is responsible for parsing and forwarding
packets to different NIXLFs. NPC has 16 KPU engines
(Kangaroo parse engine) and one iKPU which represents
pkinds. Each physical port either CGX/LBK is assigned
a pkind and upon receiving a packet HW takes that port's
pkind and starts parsing as per the KPU engines config.
This patch adds header files which contain configuration
profile/array for each of the iKPU and 16 KPU engines.
Signed-off-by: Hao Zheng <hao.zheng@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds a new mailbox message to reset
a NIXLF's receive and transmit HW stats.
Signed-off-by: Vamsi Attunuru <vamsi.attunuru@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds support for a PF/VF driver to configure
NIX transmit scheduler queues via mbox. Since PF/VF doesn't
know the absolute HW index of the NIXLF attached to it, AF
traps the register config and overwrites with the correct
NIXLF index.
HW supports shaping, colouring and policing of packets with
these multilevel traffic scheduler queues. Instead of
introducing different mbox message formats for different
configurations and making both AF & PF/VF driver implementation
cumbersome, access to the scheduler queue's CSRs is provided
via mbox. AF checks whether the sender PF/VF has the
corresponding queue allocated or not and dumps the config
to HW. With a single mbox msg 20 registers can be configured.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Added support for a PF/VF to allocate or free NIX transmit
scheduler queues via mbox. For setting up pkt transmission
priorities between queues, the scheduler queues have to be
contiguous w.r.t their HW indices. So both contiguous and
non-contiguous allocations are supported.
Upon receiving NIX_TXSCH_FREE mbox msg all scheduler queues
allocated to sending PFFUNC (PF/VF) will be freed. Selective
free is not supported.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Extract error information from rx and tx buffer descriptors,
and update error counters.
Signed-off-by: Mathias Thore <mathias.thore@infinera.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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We should get 'driver_data' from 'struct device' directly. Going via
platform_device is an unneeded step back and forth.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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linux/prefetch.h is never explicitly included in ena_com, although
functions from it, such as prefetchw(), are used throughout ena_com.
This is an inclusion bug, and we fix it here by explicitly including
linux/prefetch.h. The bug was exposed when the driver was compiled
for the xtensa architecture.
Fixes: 689b2bdaaa14 ("net: ena: add functions for handling Low Latency Queues in ena_com")
Fixes: 8c590f977638 ("ena: Fix Kconfig dependency on X86")
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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FDB_MAX_CHAIN is three. We wanted to allocate enough memory to hold four
structs but there are missing parentheses so we only allocate enough
memory for three structs and the first byte of the fourth one.
Fixes: 328edb499f99 ("net/mlx5: Split FDB fast path prio to multiple namespaces")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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When indicating the MAC supports Symmetric Pause, clear the Asymmetric
Pause bit, which could of been already set is the PHY supports it.
Reported-by: Labbe Corentin <clabbe@baylibre.com>
Fixes: c306ad36184f ("net: ethernet: Add helper for MACs which support pause")
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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These functions are supposed to return one on failure and zero on
success. Returning a zero here could cause uninitialized variable
bugs in several of the callers. For example:
drivers/scsi/cxgbi/cxgb4i/cxgb4i.c:1660 get_iscsi_dcb_priority()
error: uninitialized symbol 'caps'.
Fixes: 48365e485275 ("qlcnic: dcb: Add support for CEE Netlink interface.")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch enables and process hw errors of TM scheduler and
QCN(Quantized Congestion Control).
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch enables and process hw errors from the
PPP(Programmable Packet Process) block.
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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