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2015-08-24fjes: ES information acquisition routineTaku Izumi
This patch adds ES information acquisition routine. ES information can be retrieved issuing information request command. ES information includes which receiver is same zone. Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-24fjes: platform_driver's .probe and .remove routineTaku Izumi
This patch implements platform_driver's .probe and .remove routine, and also adds board specific private data structure. This driver registers net_device at platform_driver's .probe routine and unregisters net_device at its .remove routine. Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-24fjes: Hardware cleanup routineTaku Izumi
This patch adds hardware cleanup routine to be invoked at driver's .remove routine. Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-24fjes: Hardware initialization routineTaku Izumi
This patch adds hardware initialization routine to be invoked at driver's .probe routine. Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-24fjes: Introduce FUJITSU Extended Socket Network Device driverTaku Izumi
This patch adds the basic code of FUJITSU Extended Socket Network Device driver. When "PNP0C02" is found in ACPI DSDT, it evaluates "_STR" to check if "PNP0C02" is for Extended Socket device driver and retrieves ACPI resource information. Then creates platform_device. Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-24PCI: Disable async suspend/resume for JMicron multi-function SATA/AHCIZhang Rui
On multi-function JMicron SATA/PATA/AHCI devices, the PATA controller at function 1 doesn't work if it is powered on before the SATA controller at function 0. The result is that PATA doesn't work after resume, and we print messages like this: pata_jmicron 0000:02:00.1: Refused to change power state, currently in D3 irq 17: nobody cared (try booting with the "irqpoll" option) Async resume was introduced in v3.15 by 76569faa62c4 ("PM / sleep: Asynchronous threads for resume_noirq"). Prior to that, we powered on the functions in order, so this problem shouldn't happen. e6b7e41cdd8c ("ata: Disabling the async PM for JMicron chip 363/361") solved the problem for JMicron 361 and 363 devices. With async suspend disabled, we always power on function 0 before function 1. Barto then reported the same problem with a JMicron 368 (see comment #57 in the bugzilla). Rather than extending the blacklist piecemeal, disable async suspend for all JMicron multi-function SATA/PATA/AHCI devices. This quirk could stay in the ahci and pata_jmicron drivers, but it's likely the problem will occur even if pata_jmicron isn't loaded until after the suspend/resume. Making it a PCI quirk ensures that we'll preserve the power-on order even if the drivers aren't loaded. [bhelgaas: changelog, limit to multi-function, limit to IDE/ATA] Link: https://bugzilla.kernel.org/show_bug.cgi?id=81551 Reported-and-tested-by: Barto <mister.freeman@laposte.net> Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v3.15+
2015-08-24irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sourcesShenwei Wang
IMX7D contains a new version of GPC IP block (GPCv2). It has two major functions: power management and wakeup source management. When the system is in WFI (wait for interrupt) mode, the GPC block will be the first block on the platform to be activated and signaled. In normal wait mode during cpu idle, the system can be woken up by any enabled interrupts. In standby or suspend mode, the system can only be wokem up by the pre-defined wakeup sources. Based-on-patch-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shenwei Wang <shenwei.wang@freescale.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <shawn.guo@linaro.org> Cc: <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1440443055-7291-1-git-send-email-shenwei.wang@freescale.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-08-243c59x: Add BQL support for 3c59x ethernet driver.Loganaden Velvindron
This BQL patch is based on work done by Tino Reichardt. Tested on 0000:05:00.0: 3Com PCI 3c905C Tornado at ffffc90000e6e000 by running Flent several times. Signed-off-by: Loganaden Velvindron <logan@elandsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-24Merge branches 'pci/host-dra7xx', 'pci/host-imx6' and 'pci/host-spear' into nextBjorn Helgaas
* pci/host-dra7xx: PCI: dra7xx: Remove unneeded use of IS_ERR_VALUE() * pci/host-imx6: PCI: imx6: Simplify a trivial if-return sequence * pci/host-spear: PCI: spear: Use BUG_ON() instead of condition followed by BUG()
2015-08-24Input: elan_i2c - enable ELAN0100 acpi panelsMichele Curti
Enable ELAN0100 touchpad driver, found on a Asus X205TA laptop, to gai 2,3 fingers tap and 2 fingers scroll. Signed-off-by: Michele Curti <michele.curti@gmail.com> Reviewed-by: Duson Lin <dusonlin@emc.com.tw> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2015-08-24Input: gpio-keys - report error when disabling unsupported keyPeng Fan
When trying to disable a key that is not supported by the device we should report error, not do nothing and report success: root@yocto:/sys/devices/soc0/gpio-keys# cat keys 114-116 root@yocto:/sys/devices/soc0/gpio-keys# echo 77 > keys root@yocto:/sys/devices/soc0/gpio-keys# We want 'echo 77 > keys' to report an error, but silence to give us an illusion that all is 'ok'. Signed-off-by: Peng Fan <van.freenix@gmail.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2015-08-24Input: sur40 - fix error return codeJulia Lawall
Propagate error code on failure, or upper layers will be confused by returned 0 (success) code. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2015-08-24mfd: jz4740-adc: Init mask cache in generic IRQ chipMatt Redfearn
The mask cache must be initialised in the generic IRQ chip, otherwise enabling one channel will actually enable all channels when the empty mask cache is written. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-08-24mfd: cros_ec: spi: Add OF match tableJavier Martinez Canillas
The Documentation/devicetree/bindings/mfd/cros-ec.txt DT binding doc lists "google,cros-ec-spi" as a compatible string but the corresponding driver does not have an OF match table. Add the table to the driver so the SPI core can do an OF style match. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-08-24mfd: stmpe: Add OF match tableJavier Martinez Canillas
The Documentation/devicetree/bindings/mfd/stmpe.txt DT binding doc lists "st,stmpe[610|801|811|1601|2401|2403]" as valid compatible strings but the corresponding driver does not have an OF match table. Add the table to the driver so the SPI core can do an OF style match. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-08-24mfd: Add MFD_CROS_EC dependenciesJavier Martinez Canillas
The MFD_CROS_EC symbol select CHROME_PLATFORMS and CROS_EC_PROTO but that caused a Kconfig unmet direct dependencies warning since these symbols could only be selected for X86 || ARM. The fix it, the CHROME_PLATFORMS dependencies were relexed on commit d12bbcd3ea44 ("platform/chrome: Don't make CHROME_PLATFORMS depends on X86 || ARM") but that was found to be wrong and the correct fix is to add the needed dependencies to the MFD_CROS_EC config symbol. There are only x86 and ARM based Chromebooks so to avoid showing up the config option on unsupported platforms, make the symbol depend on these architectures. Also add a || COMPILE_TEST so it can have build coverage on other platforms. Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-08-24mfd: cros_ec: Remove CROS_EC_PROTO dependency for SPI and I2C driversJavier Martinez Canillas
The ChromeOS EC SPI and I2C transport drivers depends on CROS_EC_PROTO but MFD_CROS_EC select CROS_EC_PROTO instead. Mixing select and depends on is bad practice as it may lead to circular Kconfig dependencies. Since these drivers already depend on MFD_CROS_EC and that config option already selects CROS_EC_PROTO, there is no need to make them explicitly depend on CROS_EC_PROTO since that dependency is already met. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-08-24crypto: qat - silence a static checker warningTadeusz Struk
Add range check for ring number. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-08-24crypto: vmx - Fixing opcode issueLeonidas Da Silva Barbosa
In build time vadduqm opcode is not being mapped correctly. Adding a new map in ppc-xlate to do this. Signed-off-by: Leonidas S Barbosa <leosilva@linux.vnet.ibm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-08-24crypto: caam - Use the preferred style for memory allocationsFabio Estevam
"The preferred form for passing a size of a struct is the following: p = kmalloc(sizeof(*p), ...); .... The preferred form for allocating a zeroed array is the following: p = kcalloc(n, sizeof(...), ...); " ,so do as suggested. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-08-24crypto: caam - Propagate the real error code in caam_probeFabio Estevam
Instead of propagating a 'fake' error code, just propagate the real one in the case of caam_drv_identify_clk() failure. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-08-24crypto: caam - Fix the error handling in caam_probeFabio Estevam
In the error path we should disable the resources that were previously acquired, so fix the error handling accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-08-24crypto: caam - fix writing to JQCR_MS when using service interfaceHoria Geant?
Most significant part of JQCR (Job Queue Control Register) contains bits that control endianness: ILE - Immediate Little Endian, DWS - Double Word Swap. The bits are automatically set by the Job Queue Controller HW. Unfortunately these bits are cleared in SW when submitting descriptors via the register-based service interface. >From LS1021A: JQCR_MS = 08080100 - before writing: ILE | DWS | SRC (JR0) JQCR_MS = 30000100 - after writing: WHL | FOUR | SRC (JR0) This would cause problems on little endian caam for descriptors containing immediata data or double-word pointers. Currently there is no problem since the only descriptors ran through this interface are the ones that (un)instantiate RNG. Signed-off-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-08-24PCI: Set MPS to match upstream bridgeKeith Busch
Firmware typically configures the PCIe fabric with a consistent Max Payload Size setting based on the devices present at boot. A hot-added device typically has the power-on default MPS setting (128 bytes), which may not match the fabric. The previous Linux default, in the absence of any "pci=pcie_bus_*" options, was PCIE_BUS_TUNE_OFF, in which we never touch MPS, even for hot-added devices. Add a new default setting, PCIE_BUS_DEFAULT, in which we make sure every device's MPS setting matches the upstream bridge. This makes it more likely that a hot-added device will work in a system with optimized MPS configuration. Note that if we hot-add a device that only supports 128-byte MPS, it still likely won't work because we don't reconfigure the rest of the fabric. Booting with "pci=pcie_bus_peer2peer" is a workaround for this because it sets MPS to 128 for everything. [bhelgaas: changelog, new default, rework for pci_configure_device() path] Tested-by: Keith Busch <keith.busch@intel.com> Tested-by: Jordan Hargrave <jharg93@gmail.com> Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org>
2015-08-24i2c: xgene-slimpro: dma_mapping_error() doesn't return an error codeDan Carpenter
The dma_mapping_error() function returns true if there is an error, it doesn't return an error code. We should return -ENOMEM. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2015-08-24i2c: Replace I2C_CROS_EC_TUNNEL dependencyJavier Martinez Canillas
The ChromeOS EC tunnel I2C bus driver depend on CROS_EC_PROTO but MFD_CROS_EC select CROS_EC_PROTO instead. Mixing select and depends on is bad practice as it may lead to circular Kconfig dependencies. Since the platform device that is matched with the I2C bus driver is registered by the ChromeOS EC mfd driver, I2C_CROS_EC_TUNNEL really depends on MFD_CROS_EC. And because this config option selects CROS_EC_PROTO, that dependency is met as well. So make the driver to depend on MFD_CROS_EC instead of CROS_EC_PROTO. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-24eeprom: at24: use i2c_smbus_read_i2c_block_data_or_emulatedIrina Tirdea
For i2c busses that support only SMBUS extensions, the eeprom at24 driver reads data from the device using the SMBus block, word or byte read protocols depending on availability. Replace the block read emulation from the driver with the i2c_smbus_read_i2c_block_data_or_emulated call from i2c core. Signed-off-by: Irina Tirdea <irina.tirdea@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-24i2c: core: Add support for best effort block read emulationIrina Tirdea
There are devices that need to handle block transactions regardless of the capabilities exported by the adapter. For performance reasons, they need to use i2c read blocks if available, otherwise emulate the block transaction with word or byte transactions. Add support for a helper function that would read a data block using the best transfer available: I2C_FUNC_SMBUS_READ_I2C_BLOCK, I2C_FUNC_SMBUS_READ_WORD_DATA or I2C_FUNC_SMBUS_READ_BYTE_DATA. Signed-off-by: Irina Tirdea <irina.tirdea@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-24i2c: lpc2k: add driverJoachim Eastwood
Add support for the I2C controller found on several NXP devices including LPC2xxx, LPC178x/7x and LPC18xx/43xx. The controller is implemented as a state machine and the driver act upon the state changes when the bus is accessed. The I2C controller supports master/slave operation, bus arbitration, programmable clock rate, and speeds up to 1 Mbit/s. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-24i2c: mux: Add register-based mux i2c-mux-regYork Sun
Based on i2c-mux-gpio driver, similarly the register-based mux switch from one bus to another by setting a single register. The register can be on PCIe bus, local bus, or any memory-mapped address. The endianness of such register can be specified in device tree if used, or in platform data. Signed-off-by: York Sun <yorksun@freescale.com> Acked-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-24i2c: slave: print warning if slave flag not setWolfram Sang
Address collisions will be rare, but we should let the user know that slaves have their own address space nonetheless. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-24i2c: support 10 bit and slave addresses in sysfs 'new_device'Wolfram Sang
We now have seperate address spaces for 10 bit and we-are-slave clients. Update the sysfs device instantiation method to support these types by accepting the address offsets that are assigned to the extra address spaces. Update the documentation, too. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-24i2c: take address space into account when checking for used addressesWolfram Sang
It is not enough to compare the plain address value, we also need to check the flags enabling a different address space. E.g. it is valid to have address 0x50 as a 7-bit address and 0x050 as 10-bit address on the same bus. Same for addresses when we are the slave. Tested-by: Andrey Danin <danindrey@mail.ru> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-24i2c: apply DT flags when probingWolfram Sang
Check for slave and 10-bit flags when probing and mark the client when found. Improve the address validity check, too Tested-by: Andrey Danin <danindrey@mail.ru> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-24i2c: make address check indpendent from client structWolfram Sang
We want to use this function with struct boardinfo soon, so let's just pass the parameters really needed. We also extend the type of addr, so more types can be input. Remove a superfluous dangling comment while here. Tested-by: Andrey Danin <danindrey@mail.ru> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-24i2c: rename address check functionsWolfram Sang
The current naming is based on the arguments of the functions and not on what they do. Even I as the maintainer find this confusing, so let's rename them to something more descriptive. Tested-by: Andrey Danin <danindrey@mail.ru> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-24i2c: apply address offset for slaves, tooWolfram Sang
We want a separate address range for being an I2C slave. Add an offset of 0x1000, so it can be combined with ten bit addresses as well. Add a separate function to create the address value, we will need it later in other places. Tested-by: Andrey Danin <danindrey@mail.ru> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-24HID: quirks: add QUIRK_NOGET for an other TPV touchscreenBenjamin Tissoires
Looks like 0x8882 needs the same quirk than 0x8883. Given that both devices claim they are "TPV OpticalTouchScreen" rename the 0x8883 to add its PID in the #define. Reported-by: Blaine Lee <blaine.j.lee@medtronic.com> Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2015-08-24of/fdt: make memblock maximum physical address arch configurableArd Biesheuvel
When parsing the memory nodes to populate the memblock memory table, we check against high and low limits and clip any memory that exceeds either one of them. However, for arm64, the high limit of (phys_addr_t)~0 is not very meaningful, since phys_addr_t is 64 bits (i.e., no limit) but there may be other constraints that limit the memory ranges that we can support. So rename MAX_PHYS_ADDR to MAX_MEMBLOCK_ADDR (for clarity) and only define it if the arch does not supply a definition of its own. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2015-08-24pinctrl: sh-pfc: Implement pinconf power-source param for voltage switchingBen Hutchings
The pfc in the R8A7790 (and probably others in the R-Car gen 2 family) supports switching SDHI signals between 3.3V and 1.8V nominal voltage, and the SD driver should do that when switching to and from UHS modes. Add a flag for pins that have configurable I/O voltage and SoC operations to get and set the nominal voltage. Implement the pinconf power-source parameter using these operations. Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-24dmaengine: sort the dw KconfigVinod Koul
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-24dmaengine: sort the KconfigVinod Koul
dmaengine Kconfig grew over the years, unfortunately without any order to it. So order by core, driver and client sections, and sort these sections alphabetically Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-24dmaengine: sort the makefileVinod Koul
dmaengine makefile grew over the years, unfortunately without any order to it. So order by core, dmatest and driver sections and sort these sections alphabetically Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-24drm/i915: Allow parsing of variable size child device entries from VBTDavid Weinehall
VBT version 196 increased the size of common_child_dev_config. The parser code assumed that the size of this structure would not change. The modified code now copies the amount needed based on the VBT version, and emits a debug message if the VBT version is unknown (too new); since the struct config block won't shrink in newer versions it should be harmless to copy the maximum known size in such cases, so that's what we do, but emitting the warning is probably sensible anyway. In the longer run it might make sense to modify the parser code to use a version/feature mapping, rather than hardcoding things like this, but for now the variants are fairly manageable. This fixes a regression introduced in commit 75067ddecf21271631bc018d2fb23ddd09b66aae Author: Antti Koskipaa <antti.koskipaa@linux.intel.com> Date: Fri Jul 10 14:10:55 2015 +0300 drm/i915: Per-DDI I_boost override since that commit changed the child device config size without updating the checks and memcpy. v2: Stricter size checks v3 by Jani: - Keep the checks strict, and warnigns verbose, but keep going anyway. - Take care to copy the max amount of child device config we can. - Fix the messages. Signed-off-by: David Weinehall <david.weinehall@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-08-24drm/i915: fix link rates reported for SKLThulasimani,Sivakumar
This patch fixes the bug that SKL SKUs before B0 might return HBR2 as supported even though it is not supposed to be enabled on such platforms. v2: optimize if else condition (Jani) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> [Jani: minor whitespace fix.] Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-08-24drm/i915: fix VBT parsing for SDVO child device mappingJani Nikula
commit 75067ddecf21271631bc018d2fb23ddd09b66aae Author: Antti Koskipaa <antti.koskipaa@linux.intel.com> Date: Fri Jul 10 14:10:55 2015 +0300 drm/i915: Per-DDI I_boost override increased size of union child_device_config without taking into account the size check in parse_sdvo_device_mapping(). Switch the function over to using the legacy struct only. Fixes: 75067ddecf21 ("drm/i915: Per-DDI I_boost override") Cc: Antti Koskipaa <antti.koskipaa@linux.intel.com> Cc: David Weinehall <david.weinehall@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-08-24Merge tag 'v4.2-rc8' into drm-nextDave Airlie
Linux 4.2-rc8 Backmerge required for Intel so they can fix their -next tree up properly.
2015-08-23net: phy: add interrupt support for aquantia phyShaohui Xie
By implementing config_intr & ack_interrupt, now the phy can support link connect/disconnect interrupt. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-23net: bcmgenet: fix uncleaned dma flagsJaedon Shin
Clean the dma flags of multiq ring buffer int the interface stop process. This patch fixes that the genet is not running while the interface is re-enabled. $ ifup eth0 - running after booting $ ifdown eth0 $ ifup eth0 - not running and occur tx_timeout The bcmgenet_dma_disable() in bcmgenet_open() do clean ring16 dma flag only. If the genet has multiq, the dma register is not cleaned. and bcmgenet_init_dma() is not done correctly. in case GENET_V2(tx_queues=4), tdma_ctrl has 0x1e after running bcmgenet_dma_disable(). Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-23net: bcmgenet: Avoid sleeping in bcmgenet_timeoutFlorian Fainelli
bcmgenet_timeout() executes in atomic context, yet we will invoke napi_disable() which does sleep. Looking back at the changes, disabling TX napi and re-enabling it is completely useless, since we reclaim all TX buffers and re-enable interrupts, and wake up the TX queues. Fixes: 13ea657806cf ("net: bcmgenet: improve TX timeout") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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