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2022-05-04drm/amdgpu: query core refclk from bios for smu v13Hawking Zhang
The smu_info structrue for smu v13 is changed that core_refclk in v31 strucuture is not correct for smu v13_0_0 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add updated smu_info structuresHawking Zhang
To match with smu v13_0_0 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/discovery: add GMC 11.0 SupportLikun Gao
Enable GMC 11.0 on asics where it is present. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add gmc v11_0 ip block (v3)Tianci.Yin
Add support for GPU memory controller v11. v1: Add support for gmc v11.0 Add gmc 11 block (Tianci) v2: drop unused amdgpu_bo_late_init (Hawking) v3: squash in various fix Signed-off-by: Tianci.Yin <tianci.yin@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: save the setting of VM_CONTEXT_CNTLJack Xiao
MES firmware needs the setting of VM_CONTEXT_CNTL to perform vmid switch. Save the initial setting when hub initializing. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add mmhub v3_0 ip blockTianci.Yin
Add support for mmhub v3.0 Signed-off-by: Tianci.Yin <tianci.yin@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add mmhub v3_0_0 ip headers v6Hawking Zhang
Add mmhub v3_0_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add gfxhub v3_0 ip blockTianci.Yin
Add support for gfxhub v3.0 Signed-off-by: Tianci.Yin <tianci.yin@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add athub v3_0 ip blockTianci.Yin
Add support for athub v3.0 Signed-off-by: Tianci.Yin <tianci.yin@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add athub v3_0_0 ip headers v6Hawking Zhang
Add athub v3_0_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/discovery: Enable PSP for PSP 13.0.0Likun Gao
Enable PSP on PSP IP version 13.0.0 Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add tracking for the enablement of SCPMLikun Gao
Add parmeter to shows whether SCPM feature is enabled or not, and whether is valid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: rework psp firmware nameLikun Gao
Use the new helper for deriving the fw name from the IP version. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: support psp v13_0_0 microcode initLikun Gao
Support psp v13_0_0 microcode init. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add support for spl fw load on psp v13Likun Gao
Support for spl firmware load on psp v13. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: extend PSP GFX FW typeLikun Gao
Extend PSP GFX FW type to support IMU, LSDMA, SDMA v6, RS64 MES related fw load. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: support print psp v2_0 hdr debug informationHawking Zhang
print out psp firmware v2_0 hdr information for debugging purpose Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/psp: deallocate memory when psp_load_fw failedAlice Wong
psp_load_fw failure would cause memory leak for psp tmr and psp ring because psp_hw_init is not called as psp block is not fully initialized. Clean up psp tmr and psp ring when psp_load_fw fail by calling psp_free_shared_bufs and psp_ring_destroy. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alice Wong <shiwei.wong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/psp: move shared buffer frees into single functionAlex Deucher
So we can properly clean up if any of the TAs or TMR fails to properly initialize or terminate. This avoids any memory leaks in the error case. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/psp: fix memory leak in terminate functionsAlex Deucher
Make sure we free the memory even if the unload fails. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/psp: drop load/unload/init_shared_buf wrappersAlex Deucher
Just call the load/unload/init_shared_buf functions directly. Makes the code easier to follow. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amd/pm: Disable fan control if not supportedElena Sakhnovitch
On Sienna Cichild, not all platforms use PMFW based fan control (ex: fanless systems). On such ASICs fan control by PMFW will be disabled in PPTable. Disable hwmon knobs for fan control also as it is not possible to report or control fan speed on such platforms through driver. v3: FeaturesToRun casted as uint64_t Signed-off-by: Elena Sakhnovitch <elena.sakhnovitch@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: init smuio v13_0_6 callbacksHawking Zhang
initialize smuio callback for soc21 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/psp: move PSP memory alloc from hw_init to sw_initAlex Deucher
Memory allocations should be done in sw_init. hw_init should just be hardware programming needed to initialize the IP block. This is how most other IP blocks work. Move the GPU memory allocations from psp hw_init to psp sw_init and move the memory free to sw_fini. This also fixes a potential GPU memory leak if psp hw_init fails. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add smuio v13_0_6 supportHawking Zhang
add smuio v13_0_6 callbacks to support read rom image Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add smuio v13_0_6 ip headers v4Hawking Zhang
Add smuio v13_0_6 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: Remove trailing spaceElena Sakhnovitch
Clean up trailing space in file sienna_cichlid_ppt.c. Signed-off-by: Elena Sakhnovitch <elena.sakhnovitch@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/discovery: add HDP v6Likun Gao
Enable HDP v6 on asics where it is present. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add hdp version 6 functionsLikun Gao
Unify hdp related function into hdp structure for hdp version 6. V2: Remove hdp invalidate function as hdp v6 doesn't have read cache. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: Free user pages if kvmalloc_array failsPhilip Yang
To cleanup the BOs of bo_list which have got user pages. Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add hdp v6_0_0 ip headers v4Hawking Zhang
Add hdp v6_0_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04gpu/drm/radeon: Fix spelling typo in commentspengfuyuan
Fix spelling typo in comments. Signed-off-by: pengfuyuan <pengfuyuan@kylinos.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: simplify the return expression of navi10_ih_hw_init()Minghao Chi
Simplify the return expression. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: simplify the return expression of iceland_ih_hw_initMinghao Chi
Simplify the return expression. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/discovery: add IH v6Likun Gao
Enable IH v6 on asics where it is present. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add ih v6_0 ip block v2Stanley.Yang
This adds ih v6_0 ip block support. IH is the interrupt handler. Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amd/smu: Increace dpm level count only for smu v13.0.2Likun Gao
Only V13.0.2 on SMU v13 will get 0 based max level from fw and increment by one, other ASIC will not need for this. V2: replace the asic_type check with ip versioning check. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add soc21 ih clientid definitionStanley Yang
Define soc21 ih clientid Signed-off-by: Stanley Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add osssys v6_0_0 ip headers v4Hawking Zhang
Add osssys v6_0_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/discovery: add NBIO 4.3 SupportLikun Gao
Enable NBIO 4.3 on asics where it is present. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add nbio v4_3_0 ip block v2Stanley.Yang
This adds nbio v4_3_0 ip block support Changed from v1: use WREG32_SOC15/RREG32_SOC15 instead of WREG32_PCIE/RREG32_PCIE remove the programming of PCIE_CONFIG_CNTL Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add nbio v4_3_0 ip headers v6Hawking Zhang
Add nbio v4_3_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/discovery: add soc21 common SupportLikun Gao
Enable soc21 common support on asics where it is present. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amd/display: Avoid reading audio pattern past AUDIO_CHANNELS_COUNTHarry Wentland
A faulty receiver might report an erroneous channel count. We should guard against reading beyond AUDIO_CHANNELS_COUNT as that would overflow the dpcd_pattern_period array. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/i915: use IOMEM_ERR_PTR() directlyKefeng Wang
Use IOMEM_ERR_PTR() instead of self defined IO_ERR_PTR(). Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220503144937.679424-1-tvrtko.ursulin@linux.intel.com
2022-05-04drm/etnaviv: avoid cleaning up sched_job when submit succeededLucas Stach
While the labels may mislead the casual reader, the tail of the function etnaviv_ioctl_gem_submit is always executed, as a lot of the structures set up in this function need to be cleaned up regardless of whether the submit succeeded or failed. An exception is the newly added drm_sched_job_cleanup, which must only be called when the submit failed before handing the job to the scheduler. Fixes: b827c84f5e84 ("drm/etnaviv: Use scheduler dependency handling") Reported-by: Michael Walle <michael@walle.cc> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20220504090229.2506560-1-l.stach@pengutronix.de
2022-05-04drm: fix typo in commentRaphael Gallais-Pou
Fix typo in a doxygen comment (replaced green by blue) in drm_color_mgmt.c Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20220426131912.3850354-1-raphael.gallais-pou@foss.st.com
2022-05-04drm/rockchip: Add VOP2 driverAndy Yan
The VOP2 unit is found on Rockchip SoCs beginning with rk3566/rk3568. It replaces the VOP unit found in the older Rockchip SoCs. This driver has been derived from the downstream Rockchip Kernel and heavily modified: - All nonstandard DRM properties have been removed - dropped struct vop2_plane_state and pass around less data between functions - Dropped all DRM_FORMAT_* not known on upstream - rework register access to get rid of excessively used macros - Drop all waiting for framesyncs The driver is tested with HDMI and MIPI-DSI display on a RK3568-EVB board. Overlay support is tested with the modetest utility. AFBC support on the cluster windows is tested with weston-simple-dmabuf-egl on weston using the (yet to be upstreamed) panfrost driver support. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Co-Developed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> [dt-binding-header:] Acked-by: Rob Herring <robh@kernel.org> [moved dt-binding header from dt-nodes patch to here and made checkpatch --strict happier] Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-23-s.hauer@pengutronix.de
2022-05-04drm/rockchip: Make VOP driver optionalSascha Hauer
With upcoming VOP2 support VOP won't be the only choice anymore, so make the VOP driver optional. This also adds a dependency from ROCKCHIP_ANALOGIX_DP to ROCKCHIP_VOP, because that driver currently only links and works with the VOP driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-22-s.hauer@pengutronix.de
2022-05-04dma-buf/sync_file: cleanup fence merging a bitChristian König
krealloc_array() ignores attempts to reduce the array size, so the attempt to save memory is completely pointless here. Also move testing for the no fence case into sync_file_set_fence(), this way we don't even touch the fence array when we don't have any fences. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20220426124637.329764-1-christian.koenig@amd.com
generated by cgit (git 2.34.1) at 2025-09-18 08:23:42 +0000