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2014-09-27Merge tag 'sunxi-clocks-for-3.18' of ↵Mike Turquette
git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next Allwinner Clocks Additions for 3.18 The most important part of this serie is the addition of the phase API to handle the MMC clocks in the Allwinner SoCs. Apart from that, the A23 gained a new mbus driver, and there's a fix for a incorrect divider table on the APB0 clock.
2014-09-27Merge tag 'v3.18-rockchip-cpuclk' of ↵Mike Turquette
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next CPU clock handling for Rockchip SoCs
2014-09-27clk: rockchip: switch to using the new cpuclk type for armclkHeiko Stuebner
This adds the necessary soc-specific divider values and switches the armclk to use the newly introduced cpuclk type. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org>
2014-09-27clk: rockchip: add new clock-type for the cpuclkHeiko Stuebner
When changing the armclk on Rockchip SoCs it is supposed to be reparented to an alternate parent before changing the underlying pll and back after the change. Additionally there exist clocks that are very tightly bound to the armclk whose divider values are set according to the armclk rate. Add a special clock-type to handle all that. The rate table and divider values will be supplied from the soc-specific clock controllers. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Doug Anderson <dianders@chromium.org> On a rk3288-board: Tested-by: Doug Anderson <dianders@chromium.org>
2014-09-27clk: rockchip: make tightly bound armclk child-clocks read-onlyHeiko Stuebner
Rockchip SoCs contain clocks tightly bound to the armclk, where the best rate / divider is supplied by the vendor after careful measuring. Often this ideal rate may be greater than the current rate. Therefore prevent the ccf from trying to set these dividers itself by setting them to read-only. In the case of the rk3066, this also includes the aclk_cpu, which makes it necessary to also split its direct child-clocks (pclk_cpu, hclk_cpu, ...) into individual definitions for rk3066 and rk3188. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org>
2014-09-27clk: rockchip: reparent aclk_cpu_pre to the gpllHeiko Stuebner
aclk_cpu_pre on the rk3188 can either be sourced from the armclk or the gpll. To reduce complexity on apll changes caused by cpufreq, reparent it always to the gpll source. If really necessary it could be reparented back on a per board level using the assigned-clocks mechanism. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-09-27clk: rockchip: fix rk3288 pll status register locationJianqun
In RK3288, APLL lock status bit is in GRF_SOC_STATUS1, but in RK3188, is GRFSOC_STATUS0. Signed-off-by: Jianqun <jay.xu@rock-chips.com> Also name the constant accordingly as GRF_SOC_STATUS1 to prevent confusion. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org>
2014-09-27clk: rockchip: fix rk3066 pll status register locationHeiko Stuebner
The register providing the pll lock status is at a different address on the rk3066. The error became apparent while working on cpufreq support for the rockchip SoCs. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-09-27clk: rockchip: change pll rate without a clk-notifierDoug Anderson
The Rockchip PLL code switches into slow mode (AKA bypass more AKA 24MHz mode) before actually changing the PLL. This keeps anyone from using the PLL while it's changing. However, in all known Rockchip SoCs nobody should ever see the 24MHz when changing the PLL supplying the armclk because we should reparent children to an alternate (faster than 24MHz) PLL. One problem is that the code to switch to an alternate parent was running in PRE_RATE_CHANGE. ...and the code to switch to slow mode was _also_ running in PRE_RATE_CHANGE. That meant there was no real guarantee that we would switch to an alternate parent before switching to 24MHz mode. Let's move the switch to "slow mode" straight into rockchip_rk3066_pll_set_rate(). That means we're guaranteed that the 24MHz is really a last-resort. Note that without this change on real systems we were the code to switch to an alternate parent at 24MHz. In some older versions of that code we'd appy a (temporary) / 5 to the 24MHz causing us to run at 4.8MHz. That wasn't enough to service USB interrupts in some cases and could lead to a system hang. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-09-27block: Add T10 Protection Information functionsMartin K. Petersen
The T10 Protection Information format is also used by some devices that do not go through the SCSI layer (virtual block devices, NVMe). Relocate the relevant functions to a block layer library that can be used without involving SCSI. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jens Axboe <axboe@fb.com>
2014-09-27block: Integrity checksum flagMartin K. Petersen
Make the choice of checksum a per-I/O property by introducing a flag that can be inspected by the SCSI layer. There are several reasons for this: 1. It allows us to switch choice of checksum without unloading and reloading the HBA driver. 2. During error recovery we need to be able to tell the HBA that checksums read from disk should not be verified and converted to IP checksums. 3. For error injection purposes we need to be able to write a bad guard tag to storage. Since the storage device only supports T10 CRC we need to be able to disable IP checksum conversion on the HBA. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Reviewed-by: Sagi Grimberg <sagig@mellanox.com> Signed-off-by: Jens Axboe <axboe@fb.com>
2014-09-27block: Relocate bio integrity flagsMartin K. Petersen
Move flags affecting the integrity code out of the bio bi_flags and into the block integrity payload. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Reviewed-by: Sagi Grimberg <sagig@mellanox.com> Signed-off-by: Jens Axboe <axboe@fb.com>
2014-09-27block: Add a disk flag to block integrity profileMartin K. Petersen
So far we have relied on the app tag size to determine whether a disk has been formatted with T10 protection information or not. However, not all target devices provide application tag storage. Add a flag to the block integrity profile that indicates whether the disk has been formatted with protection information. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Reviewed-by: Sagi Grimberg <sagig@dev.mellanox.co.il> Signed-off-by: Jens Axboe <axboe@fb.com>
2014-09-27block: Clean up the code used to generate and verify integrity metadataMartin K. Petersen
Instead of the "operate" parameter we pass in a seed value and a pointer to a function that can be used to process the integrity metadata. The generation function is changed to have a return value to fit into this scheme. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Reviewed-by: Sagi Grimberg <sagig@mellanox.com> Signed-off-by: Jens Axboe <axboe@fb.com>
2014-09-27block: Deprecate the use of the term sector in the context of block integrityMartin K. Petersen
The protection interval is not necessarily tied to the logical block size of a block device. Stop using the terms "sector" and "sectors". Going forward we will use the term "seed" to describe the initial reference tag value for a given I/O. "Interval" will be used to describe the portion of the data buffer that a given piece of protection information is associated with. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Sagi Grimberg <sagig@mellanox.com> Signed-off-by: Jens Axboe <axboe@fb.com>
2014-09-27block: Remove integrity tagging functionsMartin K. Petersen
None of the filesystems appear interested in using the integrity tagging feature. Potentially because very few storage devices actually permit using the application tag space. Remove the tagging functions. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Sagi Grimberg <sagig@mellanox.com> Signed-off-by: Jens Axboe <axboe@fb.com>
2014-09-27block: Replace bi_integrity with bi_specialMartin K. Petersen
For commands like REQ_COPY we need a way to pass extra information along with each bio. Like integrity metadata this information must be available at the bottom of the stack so bi_private does not suffice. Rename the existing bi_integrity field to bi_special and make it a union so we can have different bio extensions for each class of command. We previously used bi_integrity != NULL as a way to identify whether a bio had integrity metadata or not. Introduce a REQ_INTEGRITY to be the indicator now that bi_special can contain different things. In addition, bio_integrity(bio) will now return a pointer to the integrity payload (when applicable). Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Sagi Grimberg <sagig@mellanox.com> Signed-off-by: Jens Axboe <axboe@fb.com>
2014-09-27regmap: fix NULL pointer dereference in _regmap_write/readPankaj Dubey
If LOG_DEVICE is defined and map->dev is NULL it will lead to NULL pointer dereference. This patch fixes this issue by adding check for dev->NULL in all such places in regmap.c Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2014-09-27clk: sunxi: Add sun8i MBUS clock supportChen-Yu Tsai
The MBUS clock on sun8i is slightly different from the old mod0 clocks. The divider is 3 bits wider, while also needing a divider table for the higher 4 values, which all set the same divider. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-09-27clk: sunxi: mod0: Introduce MMC proper phase handlingMaxime Ripard
The MMC clock we thought we had until now are actually not one but three different clocks. The main one is unchanged, and will have three outputs: - The clock fed into the MMC - a sample and output clocks, to deal with when should we output/sample data to/from the MMC bus The phase control we had are actually controlling the two latter clocks, but the main MMC one is unchanged. We can adjust the phase with a 3 bits value, from 0 to 7, 0 meaning a 180 phase shift, and the other values being the number of periods from the MMC parent clock to outphase the clock of. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-09-27clk: sunxi: Move mbus to mod0 fileMaxime Ripard
Move the MBUS clock to the module clocks file. It's pretty trivial, but still requires to enable the clocks to make sure it won't get disabled. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-09-27clk: sunxi: Move mod0 clock to a file of its ownMaxime Ripard
Since we know have the ability to declare factors clock outside of clk-sunxi, create a new mod0 driver to deal with the mod0 clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-09-27clk: sunxi: Introduce mbus compatibleMaxime Ripard
Even though the mbus clock is a regular module clock, given its nature, it needs to be enabled all the time. Introduce a new compatible, to differentiate it from the other module clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-09-27clk: sunxi: factors: Invert the probing logicMaxime Ripard
Until now, the factors clock probing was done directly by sunxi_init_clocks, with the factors registration being called directly with the clocks data passed as an argument. This approch has shown its limits when we added more clocks, since we couldn't really split code with such a logic in smaller files, and led to a huge file having all the clocks. Introduce an intermediate probing function, so that factor clocks will be able to directly be called by CLK_OF_DECLARE, which will in turn ease the split into several files. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-09-27clk: Add a function to retrieve phaseMaxime Ripard
The current phase API doesn't look into the actual hardware to get the phase value, but will rather get it from a variable only set by the set_phase function. This will cause issue when the client driver will never call the set_phase function, where we can end up having a reported phase that will not match what the hardware has been programmed to by the bootloader or what phase is programmed out of reset. Add a new get_phase function for the drivers to implement so that we can get this value. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-09-27clk: introduce clk_set_phase function & callbackMike Turquette
A common operation for a clock signal generator is to shift the phase of that signal. This patch introduces a new function to the clk.h API to dynamically adjust the phase of a clock signal. Additionally this patch introduces support for the new function in the common clock framework via the .set_phase call back in struct clk_ops. Signed-off-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-09-26Merge tag 'clk-mvebu-3.18' of git://git.infradead.org/linux-mvebu into clk-nextMike Turquette
clock changes for mvebu for v3.18 - correct timer drift caused by SSCG deviation - fix typo in comment
2014-09-26clk: add gpio gated clockJyri Sarha
The added gpio-gate-clock is a basic clock that can be enabled and disabled trough a gpio output. The DT binding document for the clock is also added. For EPROBE_DEFER handling the registering of the clock has to be delayed until of_clk_get() call time. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-09-26Merge tag 'qcom-clocks-for-3.18' of ↵Mike Turquette
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into clk-next qcom clock changes for 3.18 Some fixes for the IPQ driver and some code consolidation and refactoring.
2014-09-26Merge tag 'tegra-clk-3.18' of ↵Mike Turquette
git://nv-tegra.nvidia.com/user/pdeschrijver/linux into clk-next Tegra clk updates for 3.18
2014-09-26rtlwifi: Fix problems with building an allyesconfigLarry Finger
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26rtlwifi: rtl8821ae: Move driver from staging to regular treeLarry Finger
This driver was entered into staging a few cycles ago because there was not time to integrate the Realtek version into the support routines in the kernel. Now that there is an effort to converg the code base from Linux and the Realtek repo, it is time to move this driver. In addition, all the updates included in the 06/28/2014 version of the Realtek drivers are included here. With this change, it will be necessary to delete the staging driver. That will be handled in a separate patch. As it impacts the staging tree, such a patch is sent to a different destination. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26rtlwifi: rtl8188ee: Update driver to match Realtek release of 06282014Larry Finger
Not only does this patch update the driver to match the latest Realtek release, it is an important step in getting the internal code source at Realtek to match the code in the kernel. The primary reason for this is to make it easier for Realtek to maintain the kernel source without requiring an intermediate like me. In this process of merging the two source repositories, there are a lot of changes in both, and this commit is rather large. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26rtlwifi: Finish modifying core routines for new driversLarry Finger
Addition of the new drivers and the update to a new version for the others lead to changes in all the core routines. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26rtlwifi: Update power-save routines for 062814 driverLarry Finger
Realtek released a new version of the drivers on 06/28/2014. This patch implements the new power-save code. These changes also force corresponding changes in the drivers. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26rtlwifi: Modify cam.{c,h} and efuse.{c,h} for new driversLarry Finger
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26rtlwifi: Modify base.{c,h} for new driversLarry Finger
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26rtlwifi: Modify core.c for new driversLarry Finger
Each of the routines in the rtlwifi common driver needs to be modified for the coming changes. This patch prepares core.c, but also touches other files. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26rtlwifi: rtl_pci: Start modification for new driversLarry Finger
Future patches will move the drivers for RTL8192EE and RTL8821AE from staging to the regular wireless tree. Here, the necessary features are added to the PCI driver. Other files are touched due to changes in the various data structs. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26rtlwifi: Remove extra workqueue for enter/leave power stateLarry Finger
When the rtlwifi family of drivers was converted to use a workqueue when entering or leaving power save mode (commits a269913c52, a5ffbe0a19, 41affd5286, b9116b9a2b, and 6539306b2c), the code began scheduling work from the callback routine of a different workqueue with a resulting increase in overhead. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26rtlwifi: btcoexist: Fix Smatch warningLarry Finger
The capability for 802.11ac will soon be added to these drivers. Once that is done, a bitmask will be too large for the data storage. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26ath9k: Fix offchannel queuingSujith Manoharan
Clearing IEEE80211_TX_CTL_PS_RESPONSE in a frame that is not in the current context doesn't seem right. Instead make sure that we don't add such frames to the UAPSD queue by using a local variable. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26ath9k: Use normal queues for offchannel framesSujith Manoharan
There is no reason why frames marked with IEEE80211_TX_CTL_TX_OFFCHAN have to be sent using the UAPSD queue. Since mac80211 makes sure that RoC is done before pushing an offchannel frame to the driver, we can use the normal TX queues for transmission. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26ath9k: Fix queue managementSujith Manoharan
Since we use IEEE80211_HW_QUEUE_CONTROL now, the CAB/Offchannel queues are registered as the last two queues. There is no need to check and reassign the queues in the TX start()/done() routines. CAB frames will not reach the tx() callback since we set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING and pull the buffered frames during beacon transmission. We also don't have a special HW queue for handling off-channel frames. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26rt2800: correct BBP1_TX_POWER_CTRL maskStanislaw Gruszka
Two bits control TX power on BBP_R1 register. Correct the mask, otherwise we clear additional bit on BBP_R1 register, what can have unknown, possible negative effect. Cc: stable@vger.kernel.org Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26wil6210: ethtool opsVladimir Kondratiev
Provide ethtool support; with support for interrupt coalescing through get_coalesce/set_coalesce. Placeholders for begin/complete will be used by runtime PM to make sure target is powered up while performing ethtool operations Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26bcma: gpio: use ChipCommon GPIO IRQ on BCM47XX arch onlyRafał Miłecki
GPIOs can be also used on bcm53xx, however this arch requires different implementation of IRQ support. It uses different IRQ number (117) and different masks & acking. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26rtl818x_pci: add RSSI information for rtl8187SEandrea.merello
This patch makes the driver to report signal strength information to mac80211 for rtl8187se boards. It differs from my previous RFT patch: http://marc.info/?l=linux-wireless&m=140155388332534&w=2 because: - I have now a working rtl8187se card, so I could serve my RFT by myself. :) - CCK measurement code has changed a bit, but it does basically the same things. - OFDM measurement method is changed because the older method reported incorrect measures, at least for signals stronger than -40dBm). CCK measurement seems quite good. OFDM seems less accurate, but this is the same as the "reference" staging driver dose. I wanted not to change things just to make measures of _one_ (my) card a bit more close to what _I_ (in my setup) expected.. IMHO results are still good enough to justify reporting signal in dBm rather than in "unspecified" units, so this is what this patch actually does. Results of my tests with a working rtl8187se card connected with coaxes and various RF attenuators to my AP are: Input (approx) | CCK meas | OFDM meas -------------------------------------- -30dBm | -32dBm | -31dBm -40dBm | -40dBm | -41dBm -50dBm | -50dBm | -55dBm -60dBm | -59dBm | -63dBm -70dBm | -69dBm | -73dBm -80dBm | -79dBm | -83dBm Also some real-field tests has been done (no coax, packets in the air) for the CCK measure method, and they resulted in reasonable values. Thanks-to: Bernhard Schiffner <bernhard@schiffner-limbach.de> [ for real-field tests] Signed-off-by: andrea.merello <andrea.merello@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26ath9k: Fix p2p address managementSujith Manoharan
When multiple channel contexts are enabled, a p2p interface that is assigned to a context will have an address that is different from the device mac address, which is used by wpa_s as the p2p device ID. Certain frames like provision requests use the device address and these get dropped since ath9k_calculate_summary_state() iterates over only the active interfaces in a context and the device address is not used. Fix this by adding the device mac address to the bssid mask. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26bcma: print chip ID in a more user-friendly formRafał Miłecki
Some chip IDs are easier to read/understand when printed in a decimal form. For example on my bcm53xx arch router this patch replaces: Found chip with id 0xCF12, rev 0x00 and package 0x02 with a: Found chip with id 53010, rev 0x00 and package 0x02 Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>