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2022-10-04vfio/mdev: make mdev.h standalone includableChristoph Hellwig
Include <linux/device.h> and <linux/uuid.h> so that users of this headers don't need to do that and remove those includes that aren't needed any more. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Tony Krowiak <akrowiak@linux.ibm.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Reviewed-by: Kirti Wankhede <kwankhede@nvidia.com> Link: https://lore.kernel.org/r/20220923092652.100656-4-hch@lst.de Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-10-04drm/i915/gvt: simplify vgpu configuration managementChristoph Hellwig
Instead of copying the information from the vgpu_types arrays into each intel_vgpu_type structure, just reference this constant information with a pointer to the already existing data structure, and pass it into the low-level VGPU creation helpers intead of copying the data into yet anothe params data structure. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com> Link: https://lore.kernel.org/r/20220923092652.100656-3-hch@lst.de [aw: Fold fix from 20220928121110.GA30738@lst.de] Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-10-04drm/i915/gvt: fix a memory leak in intel_gvt_init_vgpu_typesChristoph Hellwig
gvt->types needs to be freed on error. Fixes: bc90d097ae14 ("drm/i915/gvt: define weight according to vGPU type") Reported-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com> Link: https://lore.kernel.org/r/20220923092652.100656-2-hch@lst.de [aw: Correct fixes commit ID as reported by Stephen Rothwell] Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-10-04Merge branches 'clk-baikal', 'clk-broadcom', 'clk-vc5' and 'clk-versaclock' ↵Stephen Boyd
into clk-next - Convert Baikal-T1 CCU driver to platform driver - Split reset support out of primary Baikal-T1 CCU driver - Add some missing clks required for RPiVid Video Decoder on RaspberryPi - Mark PLLC critical on bcm2835 - Support for Renesas VersaClock7 clock generator family * clk-baikal: clk: baikal-t1: Convert to platform device driver clk: baikal-t1: Add DDR/PCIe directly controlled resets support dt-bindings: clk: baikal-t1: Add DDR/PCIe reset IDs clk: baikal-t1: Move reset-controls code into a dedicated module clk: baikal-t1: Add SATA internal ref clock buffer clk: baikal-t1: Add shared xGMAC ref/ptp clocks internal parent clk: baikal-t1: Fix invalid xGMAC PTP clock divider clk: vc5: Fix 5P49V6901 outputs disabling when enabling FOD * clk-broadcom: clk: bcm: rpi: Add support for VEC clock clk: bcm: rpi: Handle pixel clock in firmware clk: bcm: rpi: Add support HEVC clock clk: bcm2835: fix bcm2835_clock_rate_from_divisor declaration clk: bcm2835: Round UART input clock up clk: bcm2835: Make peripheral PLLC critical * clk-vc5: clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975 dt-bindings: clock: vc5: Add 5P49V6975 clk: vc5: Use regmap_{set,clear}_bits() where appropriate clk: vc5: Check IO access results * clk-versaclock: clk: Renesas versaclock7 ccf device driver dt-bindings: Renesas versaclock7 device tree bindings
2022-10-04Merge branches 'clk-fixed-rate', 'clk-spreadtrum', 'clk-pxa' and 'clk-ti' ↵Stephen Boyd
into clk-next - More devm helpers for fixed rate registration - Add Spreadtrum UMS512 SoC clk support - Various PXA168 clk driver fixes * clk-fixed-rate: clk: fixed-rate: add devm_clk_hw_register_fixed_rate clk: asm9260: use parent index to link the reference clock * clk-spreadtrum: clk: sprd: Add clocks support for UMS512 * clk-pxa: clk: pxa: add a check for the return value of kzalloc() clk: mmp: pxa168: control shared SDH bits with separate clock dt-bindings: marvell,pxa168: add clock ids for SDH AXI clocks clk: mmp: pxa168: add clocks for SDH2 and SDH3 dt-bindings: marvell,pxa168: add clock id for SDH3 clk: mmp: pxa168: fix GPIO clock enable bits clk: mmp: pxa168: add muxes for more peripherals clk: mmp: pxa168: fix incorrect parent clocks clk: mmp: pxa168: fix const-correctness clk: mmp: pxa168: add new clocks for peripherals dt-bindings: marvell,pxa168: add clock ids for additional dividers clk: mmp: pxa168: fix incorrect dividers clk: mmp: pxa168: add additional register defines * clk-ti: clk: davinci: cfgchip: Use dev_err_probe() helper clk: davinci: pll: fix spelling typo in comment MAINTAINERS: add header file to TI DAVINCI SERIES CLOCK DRIVER
2022-10-04Merge branches 'clk-rockchip', 'clk-renesas', 'clk-microchip', ↵Stephen Boyd
'clk-allwinner' and 'clk-imx' into clk-next * clk-rockchip: dt-bindings: clock: rockchip: change SPDX-License-Identifier dt-bindings: clock: convert rockchip,rk3128-cru.txt to YAML clk: rockchip: Add clock controller support for RV1126 SoC dt-bindings: clock: rockchip: Document RV1126 CRU clk: rockchip: Add dt-binding header for RV1126 clk: rockchip: Add MUXTBL variant * clk-renesas: clk: renesas: r8a779g0: Add EtherAVB clocks clk: renesas: r8a779g0: Add PFC/GPIO clocks clk: renesas: r8a779g0: Add I2C clocks clk: renesas: r8a779g0: Add watchdog clock dt-bindings: clock: renesas,rzg2l: Document RZ/Five SoC clk: renesas: r8a779f0: Add MSIOF clocks clk: renesas: r9a09g011: Add IIC clock and reset entries clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks clk: renesas: r8a779f0: Add CMT clocks clk: renesas: r8a779f0: Add SDH0 clock * clk-microchip: clk: at91: sama5d2: Add Generic Clocks for UART/USART clk: microchip: add PolarFire SoC fabric clock support dt-bindings: clk: add PolarFire SoC fabric clock ids dt-bindings: clk: document PolarFire SoC fabric clocks dt-bindings: clk: rename mpfs-clkcfg binding clk: microchip: mpfs: update module authorship & licencing clk: microchip: mpfs: convert periph_clk to clk_gate clk: microchip: mpfs: convert cfg_clk to clk_divider clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo() clk: microchip: mpfs: simplify control reg access clk: microchip: mpfs: move id & offset out of clock structs clk: microchip: mpfs: add MSS pll's set & round rate MAINTAINERS: add polarfire soc reset controller reset: add polarfire soc reset support clk: microchip: mpfs: add reset controller dt-bindings: clk: microchip: mpfs: add reset controller support clk: microchip: mpfs: make the rtc's ahb clock critical clk: microchip: mpfs: fix clk_cfg array bounds violation * clk-allwinner: clk: sunxi-ng: ccu-sun9i-a80-usb: Use dev_err_probe() helper clk: sunxi-ng: ccu-sun9i-a80-de: Use dev_err_probe() helper clk: sunxi-ng: sun8i-de2: Use dev_err_probe() helper clk: sunxi-ng: d1: Limit PLL rates to stable ranges * clk-imx: clk: imx: scu: fix memleak on platform_device_add() fails clk: imx93: add SAI IPG clk clk: imx93: add MU1/2 clock clk: imx93: switch to use new clk gate API clk: imx: add i.MX93 clk gate clk: imx: clk-composite-93: check white_list clk: imx: clk-composite-93: check slice busy dt-bindings: clock: imx93-clock: add more MU/SAI clocks dt-bindings: clock: imx8mm: don't use multiple blank lines clk: imx8mp: tune the order of enet_qos_root_clk
2022-10-04Merge branches 'clk-samsung', 'clk-mtk', 'clk-rm', 'clk-ast' and 'clk-qcom' ↵Stephen Boyd
into clk-next - Add resets for MediaTek MT8195 PCIe and USB - Remove DaVinci DM644x and DM646x clk driver support * clk-samsung: clk: samsung: MAINTAINERS: add Krzysztof Kozlowski clk: samsung: exynos850: Implement CMU_MFCMSCL domain clk: samsung: exynos850: Implement CMU_IS domain clk: samsung: exynos850: Implement CMU_AUD domain clk: samsung: exynos850: Style fixes clk: samsung: exynosautov9: add fsys1 clock support clk: samsung: exynosautov9: add fsys0 clock support clk: samsung: exynosautov9: correct register offsets of peric0/c1 clk: samsung: exynosautov9: add missing gate clks for peric0/c1 dt-bindings: clock: exynos850: Add Exynos850 CMU_MFCMSCL dt-bindings: clock: exynos850: Add Exynos850 CMU_IS dt-bindings: clock: exynos850: Add Exynos850 CMU_AUD dt-bindings: clock: exynosautov9: add schema for cmu_fsys0/1 dt-bindings: clock: exynosautov9: add fsys1 clock definitions dt-bindings: clock: exynosautov9: add fys0 clock definitions clk: samsung: exynos7885: Add TREX clocks clk: samsung: exynos7885: Implement CMU_FSYS domain dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1 clk: samsung: exynos-clkout: Use of_device_get_match_data() * clk-mtk: (42 commits) clk: mediatek: add driver for MT8365 SoC clk: mediatek: Export required common code symbols clk: mediatek: Provide mtk_devm_alloc_clk_data dt-bindings: clock: mediatek: add bindings for MT8365 SoC clk: mediatek: mt8192: deduplicate parent clock lists clk: mediatek: Migrate remaining clk_unregister_*() to clk_hw_unregister_*() clk: mediatek: fix unregister function in mtk_clk_register_dividers cleanup clk: mediatek: clk-mt8192: Add clock mux notifier for mfg_pll_sel clk: mediatek: clk-mt8192-mfg: Propagate rate changes to parent clk: mediatek: clk-mt8195-topckgen: Drop univplls from mfg mux parents clk: mediatek: clk-mt8195-topckgen: Add GPU clock mux notifier clk: mediatek: clk-mt8195-topckgen: Register mfg_ck_fast_ref as generic mux clk: mediatek: clk-mt8195-mfg: Reparent mfg_bg3d and propagate rate changes clk: mediatek: mt8183: Add clk mux notifier for MFG mux clk: mediatek: mux: add clk notifier functions clk: mediatek: mt8183: mfgcfg: Propagate rate changes to parent clk: mediatek: Use mtk_clk_register_gates_with_dev in simple probe clk: mediatek: gate: Export mtk_clk_register_gates_with_dev clk: mediatek: add VDOSYS1 clock dt-bindings: clk: mediatek: Add MT8195 DPI clocks ... * clk-rm: clk: davinci: remove PLL and PSC clocks for DaVinci DM644x and DM646x * clk-ast: clk: ast2600: BCLK comes from EPLL * clk-qcom: (97 commits) clk: qcom: gcc-sm6375: Ensure unsigned long type clk: qcom: gcc-sm6375: Remove unused variables clk: qcom: kpss-xcc: convert to parent data API clk: introduce (devm_)hw_register_mux_parent_data_table API clk: qcom: gcc-msm8939: use ARRAY_SIZE instead of specifying num_parents clk: qcom: gcc-msm8939: use parent_hws where possible dt-bindings: clock: move qcom,gcc-msm8939 to qcom,gcc-msm8916.yaml clk: qcom: gcc-sm6350: Update the .pwrsts for usb gdscs clk: qcom: gcc-sc8280xp: use retention for USB power domains clk: qcom: gdsc: add missing error handling dt-bindings: clocks: qcom,gcc-sc8280xp: Fix typos clk: qcom: Add global clock controller driver for SM6375 dt-bindings: clock: add SM6375 QCOM global clock bindings clk: qcom: alpha: Add support for programming the PLL_FSM_LEGACY_MODE bit clk: qcom: gcc-sc7280: Update the .pwrsts for usb gdscs clk: qcom: gcc-sc7180: Update the .pwrsts for usb gdsc clk: qcom: gdsc: Fix the handling of PWRSTS_RET support clk: qcom: Add SC8280XP GPU clock controller dt-bindings: clock: Add Qualcomm SC8280XP GPU binding clk: qcom: smd: Add SM6375 clocks ...
2022-10-04Merge branches 'clk-ofnode', 'clk-bindings', 'clk-cleanup', 'clk-zynq' and ↵Stephen Boyd
'clk-xilinx' into clk-next - Miscellaneous of_node_put() fixes - Nuke dt-bindings/clk path (again) by moving headers to dt-bindings/clock - Convert gpio-clk-gate binding to YAML - Various fixes to AMD/Xilinx Zynqmp clk driver - Graduate AMD/Xilinx "clocking wizard" driver from staging * clk-ofnode: clk: ti: Balance of_node_get() calls for of_find_node_by_name() clk: tegra20: Fix refcount leak in tegra20_clock_init clk: tegra: Fix refcount leak in tegra114_clock_init clk: tegra: Fix refcount leak in tegra210_clock_init clk: sprd: Hold reference returned by of_get_parent() clk: berlin: Add of_node_put() for of_get_parent() clk: at91: dt-compat: Hold reference returned by of_get_parent() clk: qoriq: Hold reference returned by of_get_parent() clk: oxnas: Hold reference returned by of_get_parent() clk: st: Hold reference returned by of_get_parent() clk: tegra: Add missing of_node_put() clk: meson: Hold reference returned by of_get_parent() clk: nomadik: Add missing of_node_put() * clk-bindings: dt-bindings: clock: drop minItems equal to maxItems dt-bindings: clock: gpio-gate-clock: Convert to json-schema dt-bindings: clock: Move versaclock.h to dt-bindings/clock dt-bindings: clock: Move lochnagar.h to dt-bindings/clock * clk-cleanup: clk: allow building lan966x as a module clk: clk-xgene: simplify if-if to if-else clk: nxp: fix typo in comment clk: mvebu: armada-37xx-tbg: Remove the unneeded result variable clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe clkdev: Simplify devm_clk_hw_register_clkdev() function clkdev: Remove never used devm_clk_release_clkdev() clk: Remove never used devm_of_clk_del_provider() clk: pistachio: Fix initconst confusion clk: clk-npcm7xx: Remove unused struct npcm7xx_clk_gate_data and npcm7xx_clk_div_fixed_data clk: do not initialize ret clk: remove extra empty line clk: Fix comment typo clk: move from strlcpy with unused retval to strscpy * clk-zynq: clk: zynqmp: pll: rectify rate rounding in zynqmp_pll_round_rate clk: zynqmp: Check the return type zynqmp_pm_query_data clk: zynqmp: Add a check for NULL pointer clk: zynqmp: Replaced strncpy() with strscpy() clk: zynqmp: Fix stack-out-of-bounds in strncpy` clk: zynqmp: make bestdiv unsigned * clk-xilinx: clk: clocking-wizard: Depend on HAS_IOMEM clk: clocking-wizard: Use dev_err_probe() helper clk: clocking-wizard: Update the compatible clk: clocking-wizard: Fix the reconfig for 5.2 clk: clocking-wizard: Rename nr-outputs to xlnx,nr-outputs clk: clocking-wizard: Move clocking-wizard out dt-bindings: add documentation of xilinx clocking wizard
2022-10-04drm/edid: Avoid multiple log lines for HFVSDB parsingAnkit Nautiyal
Replace multiple log lines with a single log line at the end of parsing HF-VSDB. Also use drm_dbg_kms instead of DRM_DBG_KMS, and add log for DSC1.2 support. v2: Fixed the formatting issues in the logging (Jani). Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220916100551.2531750-5-ankit.k.nautiyal@intel.com
2022-10-04drm/edid: Refactor HFVSDB parsing for DSC1.2Ankit Nautiyal
DSC capabilities are given in bytes 11-13 of VSDB (i.e. bytes 8-10 of SCDS). Since minimum length of Data block is 7, all bytes greater than 7 must be read only after checking the length of the data block. This patch adds check for data block length before reading relavant DSC bytes. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220916100551.2531750-4-ankit.k.nautiyal@intel.com
2022-10-04drm/edid: Split DSC parsing into separate functionAnkit Nautiyal
Move the DSC parsing logic into separate function. v2: Rebase. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220916100551.2531750-3-ankit.k.nautiyal@intel.com
2022-10-04drm/edid: Fix minimum bpc supported with DSC1.2 for HDMI sinkAnkit Nautiyal
HF-VSDB/SCDB has bits to advertise support for 16, 12 and 10 bpc. If none of the bits are set, the minimum bpc supported with DSC is 8. This patch corrects the min bpc supported to be 8, instead of 0. Fixes: 76ee7b905678 ("drm/edid: Parse DSC1.2 cap fields from HFVSDB block") Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> v2: s/DSC1.2/DSC 1.2 Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220916100551.2531750-2-ankit.k.nautiyal@intel.com
2022-10-04clk: qcom: gcc-sm6375: Ensure unsigned long typeStephen Boyd
This PLL frequency needs a UL postfix to avoid compiler warnings on 32-bit architectures. Fixes: 184fdd873d83 ("clk: qcom: Add global clock controller driver for SM6375") Cc: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-04clk: qcom: gcc-sm6375: Remove unused variablesKonrad Dybcio
gcc_parent_data_15 and gcc_parent_map_15 are not used in this driver. Remove them. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20221003211438.25691-1-konrad.dybcio@somainline.org Fixes: 184fdd873d83 ("clk: qcom: Add global clock controller driver for SM6375") Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-04drm/i915: Document and future-proof preemption control policyMatt Roper
Intel hardware allows some preemption settings to be controlled either by the kernel-mode driver exclusively, or placed under control of the user-mode drivers; on Linux we always select the userspace control option. The various registers involved in this are not documented very clearly; let's add some clarifying comments to help explain how this all works and provide some history on why our Linux drivers take the approach they do (which I believe differs from the path taken by certain other operating systems' drivers). While we're at it, let's also remove the graphics version 12 upper bound on this programming. As described, we don't have any plans to move away from UMD control of preemption settings on future platforms, and there's currently no reason to believe that the hardware will fundamentally change how these registers and settings work after version 12. Bspec: 45921, 45858, 45863 Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Wayne Boyer <wayne.boyer@intel.com> Acked-by: Tapani Pälli <tapani.palli@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907212410.22623-1-matthew.d.roper@intel.com
2022-10-04Merge tag 'ras_core_for_v6.1_rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 RAS updates from Borislav Petkov: - Fix the APEI MCE callback handler to consult the hardware about the granularity of the memory error instead of hard-coding it - Offline memory pages on Intel machines after 2 errors reported per page * tag 'ras_core_for_v6.1_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mce: Retrieve poison range from hardware RAS/CEC: Reduce offline page threshold for Intel systems
2022-10-04Merge tag 'edac_updates_for_v6.1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras Pull EDAC updates from Borislav Petkov: - Add support for Skylake-S CPUs to ie31200_edac - Improve error decoding speed of the Intel drivers by avoiding the ACPI facilities but doing decoding in the driver itself - Other misc improvements to the Intel drivers - The usual cleanups and fixlets all over EDAC land * tag 'edac_updates_for_v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras: EDAC/i7300: Correct the i7300_exit() function name in comment x86/sb_edac: Add row column translation for Broadwell EDAC/i10nm: Print an extra register set of retry_rd_err_log EDAC/i10nm: Retrieve and print retry_rd_err_log registers for HBM EDAC/skx_common: Add ChipSelect ADXL component EDAC/ppc_4xx: Reorder symbols to get rid of a few forward declarations EDAC: Remove obsolete declarations in edac_module.h EDAC/i10nm: Add driver decoder for Ice Lake and Tremont CPUs EDAC/skx_common: Make output format similar EDAC/skx_common: Use driver decoder first EDAC/mc: Drop duplicated dimm->nr_pages debug printout EDAC/mc: Replace spaces with tabs in memtype flags definition EDAC/wq: Remove unneeded flush_workqueue() EDAC/ie31200: Add Skylake-S support
2022-10-04xen-pcifront: Handle missed Connected stateJason Andryuk
An HVM guest with linux stubdomain and 2 PCI devices failed to start as libxl timed out waiting for the PCI devices to be added. It happens intermittently but with some regularity. libxl wrote the two xenstore entries for the devices, but then timed out waiting for backend state 4 (Connected) - the state stayed at 7 (Reconfiguring). (PCI passthrough to an HVM with stubdomain is PV passthrough to the stubdomain and then HVM passthrough with the QEMU inside the stubdomain.) The stubdomain kernel never printed "pcifront pci-0: Installing PCI frontend", so it seems to have missed state 4 which would have called pcifront_try_connect() -> pcifront_connect_and_init_dma() Have pcifront_detach_devices() special-case state Initialised and call pcifront_connect_and_init_dma(). Don't use pcifront_try_connect() because that sets the xenbus state which may throw off the backend. After connecting, skip the remainder of detach_devices since none have been initialized yet. When the backend switches to Reconfigured, pcifront_attach_devices() will pick them up again. Signed-off-by: Jason Andryuk <jandryuk@gmail.com> Reviewed-by: Juergen Gross <jgross@suse.com> Link: https://lore.kernel.org/r/20220829151536.8578-1-jandryuk@gmail.com Signed-off-by: Juergen Gross <jgross@suse.com>
2022-10-04drm/i915: Setup final panel drrs_type already during initVille Syrjälä
Now that we track the VBT drrs type per-panel we can move the has_drrs_modes() check to the panel init rather than doing it for every intel_panel_drrs_type() call. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221003113249.16213-7-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-10-04Merge tag 'thermal-v6.1-rc1-2' of ↵Rafael J. Wysocki
https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux Pull thermal control fixes for 6.1-rc1 from Daniel Lezcano: "- Used the platform data to get the sensor id instead of parsing the device in the driver and remove the dedicated OF function (Daniel Lezcano) - Fixed Kconfig dependency for the QCom tsens driver (Jonathan Cameron) - Fixed missing const annotation for the RCar ops driver and removed a duplicate parameter check (Lad Prabhakar) - Fixed a NULL pointer dereference when calling set_trip_temp() (Lad Prabhakar) - Fixed the fourth hardware id in the QCom tsens driver (Vincent Knecht)" * tag 'thermal-v6.1-rc1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux: thermal/drivers/qcom/tsens-v0_1: Fix MSM8939 fourth sensor hw_id thermal/core: Add a check before calling set_trip_temp() thermal/core: Drop valid pointer check for type thermal/drivers/rcar_thermal: Constify static thermal_zone_device_ops thermal/drivers/qcom: Drop false build dependency of all QCOM drivers on QCOM_TSENS thermal/of: Remove the thermal_zone_of_get_sensor_id() function thermal/drivers/imx_sc: Rely on the platform data to get the resource id
2022-10-04drm/i915: Tighten DRRS capability reportingVille Syrjälä
Only report DRRS capability for the connector if its fixed_modes list contains at least two modes capable of seamless DRRS switch between them. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221003113249.16213-6-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-10-04PM: domains: log failures to register always-on domainsJohan Hovold
Always-on PM domains must be on during initialisation or the domain is currently silently rejected. Print an error message in case an always-on domain is not on to make it easier to debug drivers getting this wrong (e.g. by setting an always-on genpd flag without making sure that the state matches). Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-04platform/x86: int3472: Don't leak reference on errorAndy Shevchenko
The for_each_acpi_consumer_dev() takes a reference to the iterator and if we break a loop we must drop that reference. This usually happens when error handling is involved. However it's not the case for skl_int3472_fill_clk_pdata(). Don't leak reference on error by dropping it properly. Fixes: 43cf36974d76 ("platform/x86: int3472: Support multiple clock consumers") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-04ACPI: APEI: do not add task_work to kernel thread to avoid memory leakShuai Xue
If an error is detected as a result of user-space process accessing a corrupt memory location, the CPU may take an abort. Then the platform firmware reports kernel via NMI like notifications, e.g. NOTIFY_SEA, NOTIFY_SOFTWARE_DELEGATED, etc. For NMI like notifications, commit 7f17b4a121d0 ("ACPI: APEI: Kick the memory_failure() queue for synchronous errors") keep track of whether memory_failure() work was queued, and make task_work pending to flush out the queue so that the work is processed before return to user-space. The code use init_mm to check whether the error occurs in user space: if (current->mm != &init_mm) The condition is always true, becase _nobody_ ever has "init_mm" as a real VM any more. In addition to abort, errors can also be signaled as asynchronous exceptions, such as interrupt and SError. In such case, the interrupted current process could be any kind of thread. When a kernel thread is interrupted, the work ghes_kick_task_work deferred to task_work will never be processed because entry_handler returns to call ret_to_kernel() instead of ret_to_user(). Consequently, the estatus_node alloced from ghes_estatus_pool in ghes_in_nmi_queue_one_entry() will not be freed. After around 200 allocations in our platform, the ghes_estatus_pool will run of memory and ghes_in_nmi_queue_one_entry() returns ENOMEM. As a result, the event failed to be processed. sdei: event 805 on CPU 113 failed with error: -2 Finally, a lot of unhandled events may cause platform firmware to exceed some threshold and reboot. The condition should generally just do if (current->mm) as described in active_mm.rst documentation. Then if an asynchronous error is detected when a kernel thread is running, (e.g. when detected by a background scrubber), do not add task_work to it as the original patch intends to do. Fixes: 7f17b4a121d0 ("ACPI: APEI: Kick the memory_failure() queue for synchronous errors") Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-04PM: ACPI: reboot: Reinstate S5 for rebootKai-Heng Feng
Commit d60cd06331a3 ("PM: ACPI: reboot: Use S5 for reboot") caused Dell PowerEdge r440 hangs at reboot. The issue is fixed by commit 2ca1c94ce0b6 ("tg3: Disable tg3 device on system reboot to avoid triggering AER"), so use the new sysoff API to reinstate S5 for reboot on ACPI-based systems. Using S5 for reboot is default behavior under Windows: "A full shutdown (S5) occurs when a system restart is requested" [1]. Link: https://docs.microsoft.com/en-us/windows/win32/power/system-power-state # [1] Suggested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-04ACPI: PM: Take wake IRQ into consideration when entering suspend-to-idleRaul E Rangel
This change adds support for ACPI devices that use ExclusiveAndWake or SharedAndWake in their _CRS GpioInt definition (instead of using _PRW), and also provide power resources. Previously the ACPI subsystem had no idea if the device had a wake capable interrupt armed. This resulted in the ACPI device PM system placing the device into D3Cold, and thus cutting power to the device. With this change we will now query the _S0W method to figure out the appropriate wake capable D-state. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-04i2c: acpi: Use ACPI wake capability bit to set wake_irqRaul E Rangel
Device tree already has a mechanism to pass the wake_irq. It does this by looking for the wakeup-source property and setting the I2C_CLIENT_WAKE flag. This CL adds the ACPI equivalent. It uses the ACPI interrupt wake flag to determine if the interrupt can be used to wake the system. Previously the i2c drivers had to make assumptions and blindly enable the wake IRQ. This can cause spurious wake events. e.g., If there is a device with an Active Low interrupt and the device gets powered off while suspending, the interrupt line will go low since it's no longer powered and wakes the system. For this reason we should respect the board designers wishes and honor the wake bit defined on the interrupt. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Wolfram Sang <wsa@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-04ACPI: resources: Add wake_capable parameter to acpi_dev_irq_flagsRaul E Rangel
ACPI IRQ/Interrupt resources contain a bit that describes if the interrupt should wake the system. This change exposes that bit via a new IORESOURCE_IRQ_WAKECAPABLE flag. Drivers should check this flag before arming an IRQ to wake the system. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-04gpiolib: acpi: Add wake_capable variants of acpi_dev_gpio_irq_getRaul E Rangel
The ACPI spec defines the SharedAndWake and ExclusiveAndWake share type keywords. This is an indication that the GPIO IRQ can also be used as a wake source. This change exposes the wake_capable bit so drivers can correctly enable wake functionality instead of making an assumption. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-04drm/i915/ttm: implement access_memoryMatthew Auld
It looks like we need this for local-memory, if we want to use ptrace. Something more is still needed if we want to handle non-mappable memory, which looks quite annoying. v2: - ttm_bo_kmap doesn't seem to work well here, and seems to expect contiguous resource. v3(Andi): - s/PAGE_SIZE/bytes/ when passing in the size of the mapping. References: https://gitlab.freedesktop.org/drm/intel/-/issues/6989 Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Andrzej Hajda <andrzej.hajda@intel.com> Cc: Nirmoy Das <nirmoy.das@intel.com> Cc: Andi Shyti <andi.shyti@linux.intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221003172819.99245-1-matthew.auld@intel.com
2022-10-04drm/i915/gt: Remove unused function prototypeGwan-gyeong Mun
Remove unused function prototype; intel_gt_create_kobj() Cc: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221003170242.1246830-1-gwan-gyeong.mun@intel.com
2022-10-04Merge tag 'irqchip-6.1' of ↵Thomas Gleixner
git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core Pull irqchip updates from Marc Zyngier: - A new driver for the FSL MU widget that provides platform MSI - An update for the Realtek RTL irqchip to use a DT binding that actually describes the hardware - A handful of DT updates, as well as minor code and spelling fixes Link: https://lore.kernel.org/r/20221002125554.3902840-1-maz@kernel.org
2022-10-04thermal/drivers/qcom/tsens-v0_1: Fix MSM8939 fourth sensor hw_idVincent Knecht
Reading temperature from this sensor fails with 'Invalid argument'. Looking at old vendor dts [1], its hw_id should be 3 instead of 4. Change this hw_id accordingly. [1] https://github.com/msm8916-mainline/android_kernel_qcom_msm8916/blob/master/arch/arm/boot/dts/qcom/msm8939-common.dtsi#L511 Fixes: 332bc8ebab2c ("thermal: qcom: tsens-v0_1: Add support for MSM8939") Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20220811105014.7194-1-vincent.knecht@mailoo.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-10-04thermal/core: Add a check before calling set_trip_temp()Lad Prabhakar
The thermal driver [0] for Renesas RZ/G2L SoC does not implement set_trip_temp() callback but has trips commit 9326167058e8 ("thermal/core: Move set_trip_temp ops to the sysfs code") changed the behaviour which causes the below panic when trying to set the trip temperature: root@smarc-rzg2l:~# echo 51000 > /sys/class/thermal/thermal_zone0/trip_point_0_temp [ 92.461521] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000 [ 92.470958] Mem abort info: [ 92.474311] ESR = 0x0000000086000004 [ 92.478546] EC = 0x21: IABT (current EL), IL = 32 bits [ 92.484290] SET = 0, FnV = 0 [ 92.487693] EA = 0, S1PTW = 0 [ 92.491153] FSC = 0x04: level 0 translation fault [ 92.496461] user pgtable: 4k pages, 48-bit VAs, pgdp=000000004e885000 [ 92.503736] [0000000000000000] pgd=0000000000000000, p4d=0000000000000000 [ 92.510869] Internal error: Oops: 86000004 [#3] PREEMPT SMP [ 92.516556] CPU: 0 PID: 290 Comm: sh Tainted: G D 6.0.0-rc4-next-20220906-arm64-renesas-00124-g84633c87c5f6-dirty #509 [ 92.528814] Hardware name: Renesas SMARC EVK based on r9a07g044l2 (DT) [ 92.535441] pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 92.542516] pc : 0x0 [ 92.544764] lr : trip_point_temp_store+0x84/0x140 [ 92.549582] sp : ffff80000a92bc10 [ 92.552961] x29: ffff80000a92bc10 x28: ffff00000d8a45c0 x27: 0000000000000000 [ 92.560249] x26: 0000000000000000 x25: ffff8000082b53e8 x24: ffff00000eaffc20 [ 92.567532] x23: ffff80000a92bd68 x22: ffff00000d3e0f80 x21: 0000000000000006 [ 92.574814] x20: ffff800009149000 x19: ffff00000b8ab000 x18: 0000000000000000 [ 92.582097] x17: 0000000000000000 x16: 0000000000000000 x15: 0000aaab028cdee0 [ 92.589378] x14: 0000000000000000 x13: 0000000000000000 x12: ffff80000a92bbd0 [ 92.596659] x11: ffff00000d3e0f80 x10: ffff800009149eb8 x9 : 000000000000000a [ 92.603940] x8 : 00000000ffffffc9 x7 : 0000000000000005 x6 : 000000000000002a [ 92.611220] x5 : 000000000000c738 x4 : 00000000ffffffd3 x3 : 0000000000000000 [ 92.618500] x2 : 000000000000c738 x1 : 0000000000000000 x0 : ffff00000b8ab000 [ 92.625781] Call trace: [ 92.628282] 0x0 [ 92.630176] dev_attr_store+0x14/0x28 [ 92.633935] sysfs_kf_write+0x4c/0x70 [ 92.637681] kernfs_fop_write_iter+0x160/0x1e0 [ 92.642213] vfs_write+0x474/0x540 [ 92.645703] ksys_write+0x68/0xf8 [ 92.649100] __arm64_sys_write+0x18/0x20 [ 92.653111] invoke_syscall+0x40/0xf8 [ 92.656866] el0_svc_common.constprop.3+0x88/0x110 [ 92.661758] do_el0_svc+0x20/0x78 [ 92.665158] el0_svc+0x3c/0x90 [ 92.668291] el0t_64_sync_handler+0x90/0xb8 [ 92.672563] el0t_64_sync+0x148/0x14c [ 92.676322] Code: bad PC value [ 92.679453] ---[ end trace 0000000000000000 ]--- /bin/start_getty: line 40: 290 Segmentation fault ${setsid:-} ${getty} -L $1 $2 $3 Poky (Yocto Project Reference Distro) 3.2.1 smarc-rzg2l ttySC0 smarc-rzg2l login: This patch fixes the above issue by adding a check to see if set_trip_temp() callback is implemented before calling it. [0] drivers/thermal/rzg2l_thermal.c Fixes: 9326167058e8 ("thermal/core: Move set_trip_temp ops to the sysfs code") Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220908174610.7837-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-10-04thermal/core: Drop valid pointer check for typeLad Prabhakar
Drop the valid pointer check for type in thermal_zone_device_register_with_trips() as we already have it confirmed for != NULL from the previous if block. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220909181322.10933-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-10-04thermal/drivers/rcar_thermal: Constify static thermal_zone_device_opsLad Prabhakar
The only usage of rcar_thermal_zone_of_ops is to pass its address to devm_thermal_of_zone_register(), which takes a pointer to const struct thermal_zone_device_ops. Make it const to allow the compiler to put it in read-only memory. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20220909182838.11154-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-10-04thermal/drivers/qcom: Drop false build dependency of all QCOM drivers on ↵Jonathan Cameron
QCOM_TSENS The SPMI QCOM drivers have no dependency in Kconfig, but the Makefile will not be included without QCOM_TSENS. This unnecessarily reduces build coverage. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Bhupesh Sharma <bhupesh.sharma@linaro.org> Acked-by: Amit Kucheria <amitk@kernel.org> Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20220821160032.2206349-1-jic23@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-10-04thermal/of: Remove the thermal_zone_of_get_sensor_id() functionDaniel Lezcano
The function thermal_zone_of_get_sensor_id() is no longer used anywhere, remove it. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20220818082316.2717095-2-daniel.lezcano@linaro.org
2022-10-04thermal/drivers/imx_sc: Rely on the platform data to get the resource idDaniel Lezcano
Currently the imx_sc driver is reimplementing part of the thermal zone parsing from the thermal OF tree code to get the sensor id associated with a thermal zone sensor. The driver platform specific code should know what sensor is present and not rely on the thermal zone description to do a discovery. Well that is arguable but all the other drivers have a per platform data telling what sensor id to use. The imx_sc thermal driver is the only one using a different approach. Not invalid but forcing to keep a specific function 'thermal_zone_of_get_sensor_id()' to get the sensor id for a specific thermal zone as the self-explanatory function tells and having device tree code inside the driver. The thermal OF code had a rework and remains now self-encapsulated with a register/unregister functions and their 'devm' variants, except for the function mentioned above. After investigating, it appears the imx_sc sensor is defined in arch/arm64/boot/dts/freescale/imx8qxp.dtsi: which defines the cpu-thermal zone with the id: IMX_SC_R_SYSTEM This dtsi is included by: - imx8qxp-ai_ml.dts - imx8qxp-colibri.dtsi - imx8qxp-mek.dts The two first ones do not define more thermal zones The third one adds the pmic-thermal0 zone with id: IMX_SC_R_PMIC_0 The thermal OF code returns -ENODEV if the thermal zone registration with a specific id fails because the description is not available in the DT for such a sensor id. In this case we continue with the other ids without bailing out with an error. So we can build for the 'fsl,imx-sc-thermal' a compatible data, an array of sensor ids containing IMX_SC_R_SYSTEM and IMX_SC_R_PMIC_0. The latter won't be found but that will not result in an error but a normal case where we continue the initialization with other ids. Just to clarify, it is what the thermal framework does and what the other drivers are expecting: when a registration fails with -ENODEV this is not an error but a case where the description is not found in the device tree, that be can the entire thermal zones description or a specific thermal zone with an unknown id. There is one small functional change but without impact. When there is no 'thermal-zones' description the probe function was returning '-ENODEV', now it returns zero. When a thermal zone fails to register with an error different from '-ENODEV', the error is detected and returned. Change the code accordingly and remove the OF code from the driver. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20220818082316.2717095-1-daniel.lezcano@linaro.org
2022-10-04drm/edid: fix repeated words in commentsJilin Yuan
Delete the redundant word 'on'. Signed-off-by: Jilin Yuan <yuanjilin@cdjrlc.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907113644.32831-1-yuanjilin@cdjrlc.com
2022-10-04drm/bridge: it6505: Add pre_enable/post_disable callbackPin-yen Lin
Add atomic_pre_enable and atomic_post_disable callback to make sure the bridge is not powered off until atomic_post_disable is called. This prevents a power leakage when it6505 is powered off, but the upstream DRM bridge is still sending display signals. Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver") Signed-off-by: Pin-yen Lin <treapking@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20221004044943.2407781-3-treapking@chromium.org
2022-10-04drm/bridge: it6505: Adapt runtime power management frameworkPin-yen Lin
Use pm_runtime_(get|put)_sync to control the bridge power, and add SET_SYSTEM_SLEEP_PM_OPS with pm_runtime_force_(suspend|resume) to it6505 driver. Without SET_SYSTEM_SLEEP_PM_OPS, the bridge will be powered on unnecessarily when no external display is connected. Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver") Signed-off-by: Pin-yen Lin <treapking@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20221004044943.2407781-2-treapking@chromium.org
2022-10-04pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100"Jianlong Huang
Add the SoC name to make it more clear. Also the next generation StarFive SoCs will use "pinctrl-starfive" as the core of StarFive pinctrl driver. No functional change. Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Hal Feng <hal.feng@linux.starfivetech.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930061404.5418-1-hal.feng@linux.starfivetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-04pinctrl: Create subdirectory for StarFive driversJianlong Huang
Move the StarFive JH7100 pinctrl driver to a new subdirectory in preparation for adding more StarFive pinctrl drivers. No functional change. Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Hal Feng <hal.feng@linux.starfivetech.com> Link: https://lore.kernel.org/r/20220930060819.5320-1-hal.feng@linux.starfivetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-04Merge branches 'edac-drivers' and 'edac-misc' into edac-updates-for-v6.1Borislav Petkov
Combine all queued EDAC changes for submission into v6.1: * edac-drivers: EDAC/ie31200: Add Skylake-S support * edac-misc: EDAC/i7300: Correct the i7300_exit() function name in comment x86/sb_edac: Add row column translation for Broadwell EDAC/i10nm: Print an extra register set of retry_rd_err_log EDAC/i10nm: Retrieve and print retry_rd_err_log registers for HBM EDAC/skx_common: Add ChipSelect ADXL component EDAC/ppc_4xx: Reorder symbols to get rid of a few forward declarations EDAC: Remove obsolete declarations in edac_module.h EDAC/i10nm: Add driver decoder for Ice Lake and Tremont CPUs EDAC/skx_common: Make output format similar EDAC/skx_common: Use driver decoder first EDAC/mc: Drop duplicated dimm->nr_pages debug printout EDAC/mc: Replace spaces with tabs in memtype flags definition EDAC/wq: Remove unneeded flush_workqueue() Signed-off-by: Borislav Petkov <bp@suse.de>
2022-10-04pinctrl: st: stop abusing of_get_named_gpio()Dmitry Torokhov
Pin descriptions for this chip only look like standard GPIO device tree descriptions, while in fact they contain additional data (in excess of number of cells specified in description of gpio controllers). They also refer to only pins/gpios belonging to the driver and not to arbitrary gpio in the system. Because we want to stop exporting OF-specific handlers from gpiolib-of, let's parse the pin reference ourself instead of trying to call of_get_named_gpio(). Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/YzSsgoVoJn4+mSpv@google.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-04pinctrl: wpcm450: Correct the fwnode_irq_get() return value checkAndy Shevchenko
fwnode_irq_get() can return zero to indicate IRQ mapping errors. Handle this case by skipping the interrupt resource. Fixes: a1d1e0e3d80a ("pinctrl: nuvoton: Add driver for WPCM450") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220927175509.15695-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-04pinctrl: bcm: Remove unused struct bcm6328_pingroupYuan Can
After commit 0e3db16300fb("pinctrl: bcm: Convert drivers to use struct pingroup and PINCTRL_PINGROUP()"), no one use struct bcm6328_pingroup, so remove it. Signed-off-by: Yuan Can <yuancan@huawei.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220927133926.103943-1-yuancan@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-04pinctrl: qcom: restrict drivers per ARM/ARM64Krzysztof Kozlowski
There is no point to allow selecting pin-controller drivers for Qualcomm ARMv7 SoCs when building ARM64 kernel, and vice versa. This makes kernel configuration more difficult as many do not remember the Qualcomm SoCs. There won't be a single image for ARMv7 and ARMv8/9 SoCs, so no features/options are lost. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220925112103.148836-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-04pinctrl: bcm: ns: Remove redundant dev_err callShang XiaoJing
devm_ioremap_resource() prints error message in itself. Remove the dev_err call to avoid redundant error message. Signed-off-by: Shang XiaoJing <shangxiaojing@huawei.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Ray Jui <ray.jui@broadcom.com> Link: https://lore.kernel.org/r/20220923101038.18036-1-shangxiaojing@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit (git 2.34.1) at 2025-09-15 01:13:31 +0000