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2024-07-08drm/amdgpu: add cp queue registers for gfx12 ipdumpSunil Khatri
Add gfx12 support of CP queue registers for all queues to be used by devcoredump. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-08drm/amdgpu: enable redirection of irq's for IH v7.0Sunil Khatri
Enable redirection of irq for pagefaults for specific clients to avoid overflow without dropping interrupts. So here we redirect the interrupts to another IH ring i.e ring1 where only these interrupts are processed. Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-08drm:amdgpu: enable IH ring1 for IH v7.0Sunil Khatri
We need IH ring1 for handling the pagefault interrupts which over flow in default ring for specific usecases. Enable ring1 allows software to redirect high interrupts to ring1 from default IH ring. Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-08drm/amdgpu: Set no_hw_access when VF request full GPU failsYifan Zha
[Why] If VF request full GPU access and the request failed, the VF driver can get stuck accessing registers for an extended period during the unload of KMS. [How] Set no_hw_access flag when VF request for full GPU access fails This prevents further hardware access attempts, avoiding the prolonged stuck state. Signed-off-by: Yifan Zha <Yifan.Zha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-08drm/amdgpu: add print support for gfx12 ipdumpSunil Khatri
Add support of gfx12 ipdump print so devcoredump could trigger it to dump the captured registers in devcoredump. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-08drm/amdgpu: add gfx12 register support in ipdumpSunil Khatri
Add general registers of gfx12 in ipdump for devcoredump support. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-08drm/amdgpu: update gfxhub client id for gfx12Frank Min
update gfxhub client id for gfx12 Signed-off-by: Frank Min <Frank.Min@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-08drm/amd/pm: avoid to load smu firmware for APUsTim Huang
Certain call paths still load the SMU firmware for APUs, which needs to be skipped. Signed-off-by: Tim Huang <Tim.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-08drm/amdgpu: sysfs node disable query error count during gpu resetYiPeng Chai
Sysfs node disable query error count during gpu reset. Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-08clk: lpc32xx: Constify struct regmap_configJavier Carrasco
`lpc32xx_scb_regmap_config` is not modified and can be declared as const to move its data to a read-only section. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20240703-clk-const-regmap-v1-7-7d15a0671d6f@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-08clk: xilinx: Constify struct regmap_configJavier Carrasco
`vcu_settings_regmap_config` is not modified and can be declared as const to move its data to a read-only section. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20240703-clk-const-regmap-v1-10-7d15a0671d6f@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-08ipmi: Drop explicit initialization of struct i2c_device_id::driver_data to 0Uwe Kleine-König
These drivers don't use the driver_data member of struct i2c_device_id, so don't explicitly initialize this member. This prepares putting driver_data in an anonymous union which requires either no initialization or named designators. But it's also a nice cleanup on its own. While at it, also remove commas after the sentinel entries. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Message-Id: <20240708150914.18190-2-u.kleine-koenig@baylibre.com> Signed-off-by: Corey Minyard <corey@minyard.net>
2024-07-08Merge tag 'tegra-for-6.11-soc' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers soc/tegra: Changes for v6.11-rc1 This is a simple change that condenses two function calls into one in two places to save some boilerplate. * tag 'tegra-for-6.11-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Simplify resource lookup Link: https://lore.kernel.org/r/20240628210818.3627404-1-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-07-08PCI/pwrctl: only call of_platform_populate() if CONFIG_OF is enabledBert Karwatzki
If of_platform_populate() is called when CONFIG_OF is not defined this leads to spurious error messages of the following type: pci 0000:00:01.1: failed to populate child OF nodes (-19) pci 0000:00:02.1: failed to populate child OF nodes (-19) Fixes: 8fb18619d910 ("PCI/pwrctl: Create platform devices for child OF nodes of the port node") Signed-off-by: Bert Karwatzki <spasswolf@web.de> Closes: https://lore.kernel.org/all/20240702173255.39932-1-superm1@kernel.org/ Reviewed-by: Lukas Wunner <lukas@wunner.de> Acked-by: Krzysztof Wilczyński <kw@linux.com> Reported-by: Praveenkumar Patil <PraveenKumar.Patil@amd.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20240707183829.41519-1-spasswolf@web.de Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-07-08clk: en7523: Remove PCIe reset open drain configuration for EN7581Lorenzo Bianconi
PCIe reset open drain configuration will be managed by pinctrl driver. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/r/43276af5f08a554b4ab2e52e8d437fff5c06a732.1719485847.git.lorenzo@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-08clk: en7523: Remove pcie prepare/unpreare callbacks for EN7581 SoCLorenzo Bianconi
Get rid of prepare and unpreare callbacks for PCIe clock since they can be modeled as a reset line cosumed by the PCIe driver (pcie-mediatek-gen3) Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Zhengping Zhang <zhengping.zhang@airoha.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/r/16df149975514d3030499c48fc1c64f090093595.1719485847.git.lorenzo@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-08clk: en7523: Add reset-controller support for EN7581 SoCLorenzo Bianconi
Introduce reset API support to EN7581 clock driver. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Zhengping Zhang <zhengping.zhang@airoha.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/r/4f735d17e549ea53769bf5a3f50406debb879a44.1719485847.git.lorenzo@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-08clk: mediatek: mt8173-infracfg: Handle unallocated infracfg when moduleAlper Nebi Yasak
The MT8173 infracfg clock driver does initialization in two steps, via a CLK_OF_DECLARE_DRIVER declaration. However its early init function doesn't get to run when it's built as a module, presumably since it's not loaded by the time it would have been called by of_clk_init(). This causes its second-step probe() to return -ENOMEM when trying to register clocks, as the necessary clock_data struct isn't initialized by the first step. MT2701 and MT6797 clock drivers also use this mechanism, but they try to allocate the necessary clock_data structure if missing in the second step. Mimic that for the MT8173 infracfg clock as well to make it work as a module. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Link: https://lore.kernel.org/r/20240612201211.91683-1-alpernebiyasak@gmail.com Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-08clk: qcom: Park shared RCGs upon registrationStephen Boyd
There's two problems with shared RCGs. The first problem is that they incorrectly report the parent after commit 703db1f5da1e ("clk: qcom: rcg2: Cache CFG register updates for parked RCGs"). That's because the cached CFG register value needs to be populated when the clk is registered. clk_rcg2_shared_enable() writes the cached CFG register value 'parked_cfg'. This value is initially zero due to static initializers. If a driver calls clk_enable() before setting a rate or parent, it will set the parent to '0' which is (almost?) always XO, and may not reflect the parent at registration. In the worst case, this switches the RCG from sourcing a fast PLL to the slow crystal speed. The second problem is that the force enable bit isn't cleared. The force enable bit is only used during parking and unparking of shared RCGs. Otherwise it shouldn't be set because it keeps the RCG enabled even when all the branches on the output of the RCG are disabled (the hardware has a feedback mechanism so that any child branches keep the RCG enabled when the branch enable bit is set). This problem wastes power if the clk is unused, and is harmful in the case that the clk framework disables the parent of the force enabled RCG. In the latter case, the GDSC the shared RCG is associated with will get wedged if the RCG's source clk is disabled and the GDSC tries to enable the RCG to do "housekeeping" while powering on. Both of these problems combined with incorrect runtime PM usage in the display driver lead to a black screen on Qualcomm sc7180 Trogdor chromebooks. What happens is that the bootloader leaves the 'disp_cc_mdss_rot_clk' enabled and the 'disp_cc_mdss_rot_clk_src' force enabled and parented to 'disp_cc_pll0'. The mdss driver probes and runtime suspends, disabling the mdss_gdsc which uses the 'disp_cc_mdss_rot_clk_src' for "housekeeping". The 'disp_cc_mdss_rot_clk' is disabled during late init because the clk is unused, but the parent 'disp_cc_mdss_rot_clk_src' is still force enabled because the force enable bit was never cleared. Then 'disp_cc_pll0' is disabled because it is also unused. That's because the clk framework believes the parent of the RCG is XO when it isn't. A child device of the mdss device (e.g. DSI) runtime resumes mdss which powers on the mdss_gdsc. This wedges the GDSC because 'disp_cc_mdss_rot_clk_src' is parented to 'disp_cc_pll0' and that PLL is off. With the GDSC wedged, mdss_runtime_resume() tries to enable 'disp_cc_mdss_mdp_clk' but it can't because the GDSC has wedged all the clks associated with the GDSC causing clks to stay stuck off. This leads to the following warning seen at boot and a black screen because the display driver fails to probe. disp_cc_mdss_mdp_clk status stuck at 'off' WARNING: CPU: 1 PID: 81 at drivers/clk/qcom/clk-branch.c:87 clk_branch_toggle+0x114/0x168 Modules linked in: CPU: 1 PID: 81 Comm: kworker/u16:4 Not tainted 6.7.0-g0dd3ee311255 #1 f5757d475795053fd2ad52247a070cd50dd046f2 Hardware name: Google Lazor (rev1 - 2) with LTE (DT) Workqueue: events_unbound deferred_probe_work_func pstate: 60400009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) pc : clk_branch_toggle+0x114/0x168 lr : clk_branch_toggle+0x110/0x168 sp : ffffffc08084b670 pmr_save: 00000060 x29: ffffffc08084b680 x28: ffffff808006de00 x27: 0000000000000001 x26: ffffff8080dbd4f4 x25: 0000000000000000 x24: 0000000000000000 x23: 0000000000000000 x22: ffffffd838461198 x21: ffffffd838007997 x20: ffffffd837541d5c x19: 0000000000000001 x18: 0000000000000004 x17: 0000000000000000 x16: 0000000000000010 x15: ffffffd837070fac x14: 0000000000000003 x13: 0000000000000004 x12: 0000000000000001 x11: c0000000ffffdfff x10: ffffffd838347aa0 x9 : 08dadf92e516c000 x8 : 08dadf92e516c000 x7 : 0000000000000000 x6 : 0000000000000027 x5 : ffffffd8385a61f2 x4 : 0000000000000000 x3 : ffffffc08084b398 x2 : ffffffc08084b3a0 x1 : 00000000ffffdfff x0 : 00000000fffffff0 Call trace: clk_branch_toggle+0x114/0x168 clk_branch2_enable+0x24/0x30 clk_core_enable+0x5c/0x1c8 clk_enable+0x38/0x58 clk_bulk_enable+0x40/0xb0 mdss_runtime_resume+0x68/0x258 pm_generic_runtime_resume+0x30/0x44 __genpd_runtime_resume+0x30/0x80 genpd_runtime_resume+0x124/0x214 __rpm_callback+0x7c/0x15c rpm_callback+0x30/0x88 rpm_resume+0x390/0x4d8 rpm_resume+0x43c/0x4d8 __pm_runtime_resume+0x54/0x98 __device_attach+0xe0/0x170 device_initial_probe+0x1c/0x28 bus_probe_device+0x48/0xa4 device_add+0x52c/0x6fc mipi_dsi_device_register_full+0x104/0x1a8 devm_mipi_dsi_device_register_full+0x28/0x78 ti_sn_bridge_probe+0x1dc/0x2bc auxiliary_bus_probe+0x4c/0x94 really_probe+0xf8/0x270 __driver_probe_device+0xa8/0x130 driver_probe_device+0x44/0x104 __device_attach_driver+0xa4/0xcc bus_for_each_drv+0x94/0xe8 __device_attach+0xf8/0x170 device_initial_probe+0x1c/0x28 bus_probe_device+0x48/0xa4 deferred_probe_work_func+0x9c/0xd8 Fix these problems by parking shared RCGs at boot. This will properly initialize the parked_cfg struct member so that the parent is reported properly and ensure that the clk won't get stuck on or off because the RCG is parented to the safe source (XO). Fixes: 703db1f5da1e ("clk: qcom: rcg2: Cache CFG register updates for parked RCGs") Reported-by: Stephen Boyd <sboyd@kernel.org> Closes: https://lore.kernel.org/r/1290a5a0f7f584fcce722eeb2a1fd898.sboyd@kernel.org Closes: https://issuetracker.google.com/319956935 Reported-by: Laura Nao <laura.nao@collabora.com> Closes: https://lore.kernel.org/r/20231218091806.7155-1-laura.nao@collabora.com Cc: Bjorn Andersson <andersson@kernel.org> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Douglas Anderson <dianders@chromium.org> Cc: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20240502224703.103150-1-swboyd@chromium.org Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-08nvmet-auth: fix nvmet_auth hash error handlingGaosheng Cui
If we fail to call nvme_auth_augmented_challenge, or fail to kmalloc for shash, we should free the memory allocation for challenge, so add err path out_free_challenge to fix the memory leak. Fixes: 7a277c37d352 ("nvmet-auth: Diffie-Hellman key exchange support") Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Reviewed-by: Hannes Reinecke <hare@suse.de> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-07-08nvme: implement ->get_unique_idChristoph Hellwig
Implement the get_unique_id method to allow pNFS SCSI layout access to NVMe namespaces. This is the server side implementation of RFC 9561 "Using the Parallel NFS (pNFS) SCSI Layout to Access Non-Volatile Memory Express (NVMe) Storage Devices". Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Chuck Lever <chuck.lever@oracle.com> Reviewed-by: Sagi Grimberg <sagi@grimberg.me> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-07-08Input: fsl-imx25-tcq - constify struct regmap_configJavier Carrasco
`mx25_tcq_regconfig` is not modified and can be declared as const to move its data to a read-only section. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20240705-input-const-regmap_config-v1-2-f712a4494883@gmail.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2024-07-08Input: qt1050 - constify struct regmap_configJavier Carrasco
`qt1050_regmap_config` is not modified and can be declared as const to move its data to a read-only section. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20240705-input-const-regmap_config-v1-1-f712a4494883@gmail.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2024-07-08clk: qcom: ipq9574: Use icc-clk for enabling NoC related clocksVaradarajan Narayanan
Use the icc-clk framework to enable few clocks to be able to create paths and use the peripherals connected on those NoCs. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240430064214.2030013-6-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-08clk: qcom: common: Add interconnect clocks supportVaradarajan Narayanan
Unlike MSM platforms that manage NoC related clocks and scaling from RPM, IPQ SoCs dont involve RPM in managing NoC related clocks and there is no NoC scaling. However, there is a requirement to enable some NoC interface clocks for accessing the peripheral controllers present on these NoCs. Though exposing these as normal clocks would work, having a minimalistic interconnect driver to handle these clocks would make it consistent with other Qualcomm platforms resulting in common code paths. This is similar to msm8996-cbf's usage of icc-clk framework. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20240430064214.2030013-5-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-08interconnect: icc-clk: Add devm_icc_clk_registerVaradarajan Narayanan
Wrap icc_clk_register to create devm_icc_clk_register to be able to release the resources properly. Acked-by: Georgi Djakov <djakov@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20240430064214.2030013-4-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-08interconnect: icc-clk: Specify master/slave idsVaradarajan Narayanan
Presently, icc-clk driver autogenerates the master and slave ids. However, devices with multiple nodes on the interconnect could have other constraints and may not match with the auto generated node ids. Hence, modify the driver to use the master/slave ids provided by the caller instead of auto generating. Also, update clk-cbf-8996 accordingly. Acked-by: Georgi Djakov <djakov@kernel.org> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20240430064214.2030013-2-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-08clk: qcom: gcc-x1e80100: Set parent rate for USB3 sec and tert PHY pipe clksAbel Vesa
Allow the USB3 second and third GCC PHY pipe clocks to propagate the rate to the pipe clocks provided by the QMP combo PHYs. The first instance is already doing that. Fixes: 161b7c401f4b ("clk: qcom: Add Global Clock controller (GCC) driver for X1E80100") Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240530-x1e80100-clk-gcc-usb3-sec-tert-set-parent-rate-v1-1-7b2b04cad545@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-08wifi: mac80211_hwsim: fix warningJohannes Berg
WARN_ON("string") will unconditionally trigger a warning, but not really do what it may look like. Use WARN(1, ...) instead and add the mode number as well. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Link: https://patch.msgid.link/20240705133921.a50aa5b15ece.I9a25b7448b0498c0c2e503986978dae165c8bdf8@changeid Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2024-07-08wifi: virt_wifi: avoid reporting connection success with wrong SSIDEn-Wei Wu
When user issues a connection with a different SSID than the one virt_wifi has advertised, the __cfg80211_connect_result() will trigger the warning: WARN_ON(bss_not_found). The issue is because the connection code in virt_wifi does not check the SSID from user space (it only checks the BSSID), and virt_wifi will call cfg80211_connect_result() with WLAN_STATUS_SUCCESS even if the SSID is different from the one virt_wifi has advertised. Eventually cfg80211 won't be able to find the cfg80211_bss and generate the warning. Fixed it by checking the SSID (from user space) in the connection code. Fixes: c7cdba31ed8b ("mac80211-next: rtnetlink wifi simulation device") Reported-by: syzbot+d6eb9cee2885ec06f5e3@syzkaller.appspotmail.com Signed-off-by: En-Wei Wu <en-wei.wu@canonical.com> Link: https://patch.msgid.link/20240705023756.10954-1-en-wei.wu@canonical.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2024-07-08spi: add ch341a usb2spi driverJohannes Thumshirn
Add a driver for the QiHeng Electronics ch341a USB-to-SPI adapter. This driver is loosely based on the ch341a module from the flashrom project. Signed-off-by: Johannes Thumshirn <jth@kernel.org> Link: https://patch.msgid.link/20240708-spi-ch341a-v3-1-cf7f9b2c1e31@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-07-08remoteproc: mediatek: Increase MT8188/MT8195 SCP core0 DRAM sizeJason Chen
The current DRAM size is insufficient for the HEVC feature, which requires more memory for proper functionality. This change ensures the feature has the necessary resources. Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20240703034409.698-1-Jason-ch.Chen@mediatek.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2024-07-08thermal: core: Fix list sorting in __thermal_zone_device_update()Rafael J. Wysocki
The order in which lists are sorted in __thermal_zone_device_update() is reverse with respect to what it should be due to a mistake in thermal_trip_notify_cmp(). Fix it and observe that it is not necessary to sort the lists in different orders. They can both be sorted in ascending order if way_down_list is walked in reverse order which allows the code to be slightly more straightforward (and less prone to silly mistakes). Fixes: 7454f2c42cce ("thermal: core: Sort trip point crossing notifications by temperature") Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/12481676.O9o76ZdvQC@rjwysocki.net
2024-07-08firmware: cs_dsp: Use strnlen() on name fields in V1 wmfw filesRichard Fitzgerald
Use strnlen() instead of strlen() on the algorithm and coefficient name string arrays in V1 wmfw files. In V1 wmfw files the name is a NUL-terminated string in a fixed-size array. cs_dsp should protect against overrunning the array if the NUL terminator is missing. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Fixes: f6bc909e7673 ("firmware: cs_dsp: add driver to support firmware loading on Cirrus Logic DSPs") Link: https://patch.msgid.link/20240708144855.385332-1-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-07-08hwmon: (amc6821) Add support for pwm1_mode attributeGuenter Roeck
AMC6821 supports configuring if a fan is DC or PWM controlled. Add support for the pwm1_mode attribute to make it runtime configurable. Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2024-07-08hwmon: (amc6821) Convert to with_info APIGuenter Roeck
Convert to use with_info API to simplify the code and make it easier to maintain. This also reduces code size by approximately 20%. No functional change intended. Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2024-07-08hwmon: (amc6821) Convert to use regmapGuenter Roeck
Use regmap for register accesses and caching. While at it, use sysfs_emit() instead of sprintf() to write sysfs attribute data, and remove spurious debug messages which would only be seen as result of a bug in the code. Also make sure that error codes are propagated and not replaced with -EIO. While at it, introduce rounding of written temperature values and for internal calculations to reduce deviation from written values and as much as possible. No functional change intended except for differences introduced by rounding. Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2024-07-08hwmon: (amc6821) Drop unnecessary enum chipsGuenter Roeck
The driver only supports a single chip, so an enum to determine the chip type is unnecessary. Drop it. No functional change intended. Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2024-07-08hwmon: (amc6821) Use BIT() and GENMASK()Guenter Roeck
Use BIT() and GENMASK() for bit and mask definitions to help distinguish bit and mask definitions from other defines and to make the code easier to read. No functional change intended. Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2024-07-08hwmon: (amc6821) Use tabs for column alignment in definesGuenter Roeck
Using tabs for column alignment makes the code easier to read. No functional change intended. Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2024-07-08hwmon: (amc6821) Reorder include files, drop unnecessary onesGuenter Roeck
Reorder include files to alphabetic order to simplify maintenance, and drop the unnecessary kernel.h include. No functional change intended. Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2024-07-08hwmon: (amc6821) Add support for fan1_target and pwm1_enable mode 4Guenter Roeck
After setting fan1_target and setting pwm1_enable to 4, the fan controller tries to achieve the requested fan speed. Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2024-07-08hwmon: (amc6821) Rename fan1_div to fan1_pulsesGuenter Roeck
The chip does not have a fan divisor. What it does have is a configuration to set either 2 or 4 pulses per fan rotation. Rename the attribute to reflect its use. Update documentation accordingly. Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2024-07-08hwmon: (amc6821) Make reading and writing fan speed limits consistentGuenter Roeck
The default value of the maximum fan speed limit register is 0, essentially translating to an unlimited fan speed. When reading the limit, a value of 0 is reported in this case. However, writing a value of 0 results in writing a value of 0xffff into the register, which is inconsistent. To solve the problem, permit writing a limit of 0 for the maximim fan speed, effectively translating to "no limit". Write 0 into the register if a limit value of 0 is written. Otherwise limit the range to <1..6000000> and write 1..0xffff into the register. This ensures that reading and writing from and to a limit register return the same value while at the same time not changing reported values when reading the speed or limits. While at it, restrict fan limit writes to non-negative numbers; writing a negative limit does not make sense and should be reported instead of being corrected. Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2024-07-08hwmon: (amc6821) Stop accepting invalid pwm valuesGuenter Roeck
The pwm value range is well defined from 0..255. Don't accept any values outside this range. This changes the valid range of pwm1_auto_point2_pwm from 0..254 to 0..255, meaning it can now be equivalent to not only pwm1_auto_point1_pwm (which is always 0) but also to pwm1_auto_point3_pwm (which is always 255). While that may not be practical, there seems to be no technical reason for preventing a user from doing it. Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2024-07-08Merge tag 'qcom-arm64-for-6.11' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm Arm64 DeviceTree updates for v6.11 This introduces 11 new boards, namely: * ASUS Vivobook S 15 * Lenovo Smart Tab M10 DTS * Motorola Moto E 2015 LTE (surnia) * Motorola Moto G 2015 (osprey) * Motorola Moto G4 Play (harpia) * Qualcomm AIM300 AIoT development board * Qualcomm SM8650 Hardware Development Kit (HDK) * SHIFTphone 8 * Samsung Galaxy Z Fold5 * Schneider HMIBSC board DTS * TP-Link Archer AX55 v1 Of particular interest here is the Asus Vivobook, the first supported X1 Elite consumer laptop. For IPQ6018 an SDHCI controller is added and on IPQ9574 an MDIO bus is described. The improvements to MSM8916-based devices continues, with sound and mdoem support added to Acer Iconia Talk S and GPLUS FL8005A, the latter also gaining BMS support. Samsung Galaxy devices gains PMIC and charger definitions, NFC support and MUIC. Accelerometer and magnetometer support is added to the Samsung Galaxy Grand Prime devices. On MSM8976 definitions for IOMMU, the display subsystem, wifi subsystem, and Adreno GPU are added. On MSM8996 UFS core clock frequencies are specified, FastRPC nodes are added for the audio DSP, glink-edges are described where available, the display subsystem reset is added. Venus is introduced on MSM8998 and the "No MSA Ready" quirk is added to allow ath10k to come up. GPU support is added to QCM2290 and enabled on the RB1 development board. The I2C controller used for communicating with the LT9611UXC HDMI bridge is temporarily replaced with i2c-gpio while issues with the builtin controller is diagnosed. The same is done for RB2, on the QRB4210 platform. On RB2 TCPM max current draw is corrected and the vreg_l9a regulator is marked as always on to match expectations. On the QDU1000 platform, USB is added, secure QFPROM is introduced to allow LLCC to access OTP data. USB is enabled on the two IDP boards. SA8775p gains PCIe endpoint definitions, LLCCC support, IMEM and PIL info regions. Nodes are marked as dma-coherent as needed, a dedicated carveout for shared memory bridge allocations is introduced. The SA8775P ride device is split in the two versions r2 and r3. The SC7180 Trogdor clamshell/detachable fragments are refactored for convenience, and pwmleds are disabled where unused. On SC7280 the APR nodes for interfacing with the audio services in audio DSP firmware are introduced. The Qualcomm SMMU TBUs are described, to enable improved debug support. QoS clocks are added to interconnects, as needed in order to operate the QoS settings on some buses. SuperSpeed in park is disabled for the primary DWC3 instance to address host controller issues under load. The PM8008 (camera PMIC) is introduced in Fairphone 5, regulators are named for better output, and firmware name for IPA is adjusted to the preferred file format. The HDMI bridge on Rb3gen2 is described, rtc, gpi-dma and qup nodes are enabled. The Type-C port manager found in PM7250b is enabled, for targets not using pmic-glink firmware for Type-C management. SC8180X gets a number of smaller corrections, and some cleanups - related to both functional issues and DeviceTree validation. The PSHOLD node is marked reserved, after reports that this causes issues during shutdown. Description of the USB signals are updated to match the signal path. The PM8008 camera PMIC is added to Lenovo ThinkPad X13s. The PM660 PMIC is extended with charger and rradc definitions, and the SDM670 gains a SMEM region definition. On SDM845 the Qualcomm SMMU TBU nodes are described, to enable improved debug output during faults etc. The UFS PHY is associated with its GDSC, and the DisplayPort controller is wired up to the QMP PHY. The Lenovo Yoga C630 Embedded Controller is introduced, adding battery and Type-C port management and altmode support. The C630 also gains WiFI calibration variant information, to cause selection of the right data. The missing IPA firmware path is corrected. For the SDX75 platform, AOSS, IPCC, SDHCI, TCSR, modem SMP2P, I2C and SPI nodes are introduced. SD-card support is added to the IDP board. CPUfreq support is introduced for the SM4450 platform. Missing reset is added to the SDHC controller of SM6115. The UFS PHY is associated with its GDSC, so is the PHY on SM6350. On Fairphone 4, the camera pmic (PM8008) is introduced, regulators are named for more informative debug output, and USB role switching is enabled. On the Fairphone 3, vibrator support is added and enabled. On SM8250, the USB signal paths are properly described in the OF graph, the UFS PHY gains its required power-domains description. Thanks to the introduction of PCI power sequence support, the QRB5165 RB5 WiFi chip can now be powered up, so this is added. Touchscreen interrupt flags are corrected accross a number of Sony Xperia devices, to remove the unexpected traces from downstream. On SM8450 an OPP-table is introduced for the PCIe controllers, to specify the bandwidth and performance state requirements for the different genrations and link widths. For this the PCIe controllers also gains interconnect path definitions. The LLCC register layout is corrected, and the UFS PHY is associated with its GDSC. On the SM8550 development boards speaker port mapping is added. WiFi support is finally enabled on the QRD board. The new AIM300 development platform/board is introduced. For SM8650 video and camera clock controller are introduced. SCM node gains details necessary to trigger USB ramdump (download mode) upon a system crash. WiFi support and speaker port mapping is added to the QRD and the newly introduced HDK. On the MTP the USB Type-C connector is describe to be routed to the PHY. In addition to the base HDK, a Display Card overlay is also introduced. For X1 Elite bwmon, fastrpc and GPU support, tsens, and the missing PCIe 6a instance are added. Thermal zones are described. Pmic-glink is introduced for both CRD and QCP devices, and remaining PMICs are described. Audio support is also added to the QCP. An explicit, larger, chunk of CMA memory is added to the various devices, in order to compensate for the lack of IOMMU for PCIe. Across a wide range of platforms, the thermal zone polling delays are removed as supplies are interrupt driven anyways. Also thermal related is the introduction of GPU thermal throttling, across many SoCs. The old SMSM implementation is finally transitioned to using the mailbox-based description and implementation for invoking interrupts on remote processors. As such interrupt-triggering is converted to use this mechanism on related platforms. The usb-role-switch property is removed for all USB instances hard coded to either host or peripheral across a range of boards. * tag 'qcom-arm64-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (279 commits) dt-bindings: arm: qcom: Document samsung,ms013g arm64: dts: qcom: Add device tree for ASUS Vivobook S 15 dt-bindings: arm: qcom: Add ASUS Vivobook S 15 arm64: dts: qcom: qrb4210-rb2: Correct max current draw for VBUS arm64: dts: qcom: msm8998: add venus node arm64: dts: qcom: sa8775p-ride-r3: add new board file arm64: dts: qcom: move common parts for sa8775p-ride variants into a .dtsi dt-bindings: arm: qcom: add sa8775p-ride Rev 3 arm64: dts: qcom: sm8550-qrd: add port mapping to speakers arm64: dts: qcom: sm8550-mtp: add port mapping to speakers arm64: dts: qcom: sm8550-hdk: add port mapping to speakers arm64: dts: qcom: sm8650-qrd: add port mapping to speakers arm64: dts: qcom: sm8650-mtp: add port mapping to speakers arm64: dts: qcom: sm8650-hdk: add port mapping to speakers arm64: dts: qcom: sm7225-fairphone-fp4: Name the regulators arm64: dts: qcom: pm8916: correct thermal zone name arm64: dts: qcom: x1e80100: Add gpu support arm64: dts: qcom: x1e80100: Fix USB HS PHY 0.8V supply arm64: dts: qcom: qcs6490-rb3gen2: enable hdmi bridge arm64: dts: qcom: sm6115: add resets for sdhc_1 ... Link: https://lore.kernel.org/r/20240706173140.18887-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-07-08drm/fbdev-dma: Fix framebuffer mode for big endian devicesThomas Huth
The drm_mode_legacy_fb_format() function only generates formats suitable for little endian devices. switch to drm_driver_legacy_fb_format() here instead to take the device endianness into consideration, too. Suggested-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Fixes: 6ae2ff23aa43 ("drm/client: Convert drm_client_buffer_addfb() to drm_mode_addfb2()") Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Javier Martinez Canillas <javierm@redhat.com> Cc: Hamza Mahfooz <hamza.mahfooz@amd.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: <stable@vger.kernel.org> # v6.7+ Link: https://patchwork.freedesktop.org/patch/msgid/20240702121737.522878-1-thuth@redhat.com
2024-07-08Merge tag 'qcom-drivers-fixes-for-6.10' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm driver fixes for v6.10 UCSI support is disabled on SC8280XP while being debugged, as it's causing the system to crash. A recent LLCC QDU1000 binding change is reverted, to allow expressing the LLCC memory regions. * tag 'qcom-drivers-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: Revert "dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries" soc: qcom: pmic_glink: disable UCSI on sc8280xp Link: https://lore.kernel.org/r/20240702031157.341031-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-07-08drm/bridge: adv7511: Fix Intermittent EDID failuresAdam Ford
In the process of adding support for shared IRQ pins, a scenario was accidentally created where adv7511_irq_process returned prematurely causing the EDID to fail randomly. Since the interrupt handler is broken up into two main helper functions, update both of them to treat the helper functions as IRQ handlers. These IRQ routines process their respective tasks as before, but if they determine that actual work was done, mark the respective IRQ status accordingly, and delay the check until everything has been processed. This should guarantee the helper functions don't return prematurely while still returning proper values of either IRQ_HANDLED or IRQ_NONE. Reported-by: Liu Ying <victor.liu@nxp.com> Fixes: f3d9683346d6 ("drm/bridge: adv7511: Allow IRQ to share GPIO pins") Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Liu Ying <victor.liu@nxp.com> # i.MX8MP EVK ADV7535 EDID retrieval w/o IRQ Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20240630221931.1650565-1-aford173@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> V3: Remove unnecessary declaration of ret by evaluating the return code of regmap_read directly. V2: Fix uninitialized cec_status Cut back a little on error handling to return either IRQ_NONE or IRQ_HANDLED.
2024-07-08mmc: dw_mmc-bluefield: Add support for eMMC HW resetLiming Sun
The eMMC RST_N register is implemented as secure register on the BlueField SoC and controlled by TF-A. This commit sends an SMC call to TF-A for the eMMC HW reset. Reviewed-by: David Thompson <davthompson@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Link: https://lore.kernel.org/r/2c459196c6867e325f9386ec0559efea464cfdd6.1718213918.git.limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>