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2017-08-28coresight tmc etr: Setup AXI cache encoding for read transfersSuzuki K Poulose
If the ETR supports split cache encoding (i.e, separate bits for read and write transfers) unlike the older version (where read and write transfers use the same encoding in AXICTL[2-5]). This feature is not advertised and has to be described by the static mask associated with the device id. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight tmc etr: Cleanup AXICTL register handlingSuzuki K Poulose
This patch cleans up how we setup the AXICTL register on TMC ETR. At the moment we don't set the CacheCtrl bits, which drives the arcache and awcache bits on AXI bus specifying the cacheablitiy. Set this to Write-back Read and Write-allocate. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight tmc etr: Detect address width at runtimeSuzuki K Poulose
TMC in Coresight SoC-600 advertises the AXI address width in the device configuration register. Bit 16 - AXIAW_VALID 0 - AXI Address Width not valid 1 - Valid AXI Address width in Bits[23-17] Bits [23-17] - AXIAW. If AXIAW_VALID = b01 then 0x20 - 32bit AXI address bus 0x28 - 40bit AXI address bus 0x2c - 44bit AXI address bus 0x30 - 48bit AXI address bus 0x34 - 52bit AXI address bus Use the address bits from the device configuration register, if available. Otherwise, default to 40bit. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight tmc: Detect support for scatter gatherSuzuki K Poulose
The SG unit in the TMC has been removed in Coresight SoC-600. This is however advertised by DEVID:Bit 24 = 0b1. On the previous generation, the bit is RES0, hence we can rely on the DEVID to detect the support. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight tmc etr: Add capabilitiy informationSuzuki K Poulose
With new version of TMC ETR, there are differing set of features supported by the TMC. Add the capability of a given TMC ETR for making safer decisions at runtime. The device configuration register of the TMC (DEVID) lists some of the capabilities. So, we can detect some of them at probe. However, some of the features (or changes in behavior) are not advertised and we have to depend on the PID to infer the features. So we use a static description of the "unadvertised" capabilities attached to the PID. Combining both, the static and the dynamic capabilities, we maintain a bitmask of the available features which can be later checked to take appropriate actions. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight tmc: Handle configuration types properlySuzuki K Poulose
Coresight SoC 600 defines a new configuration for TMC, Embedded Trace Streamer (ETS), indicated by 0x3 in MODE:CONFIG_TYPE. This would break the existing driver which will treat anything other than ETR/ETB as an ETF. Fix the driver to check the configuration type properly and also add a warning if we encounter an unsupported configuration (ETS). Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight replicator: Expose replicator management registersSuzuki K Poulose
Expose the idfilter* registers of the programmable replicator. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight tmc: Expose DBA and AXICTLSuzuki K Poulose
Expose DBALO,DBAHI and AXICTL registers Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight tmc: Add helpers for accessing 64bit registersSuzuki K Poulose
Coresight TMC splits 64bit registers into a pair of 32bit registers (e.g DBA, RRP, RWP). Provide helpers to read/write to these registers. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight: Use the new helper for defining registersSuzuki K Poulose
Use the new helpers for exposing coresight component registers, choosing the 64bit variants for appropriate registers. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight: Add support for reading 64bit registersSuzuki K Poulose
Add support for reading a lower and upper 32bits of a register as a single 64bit register. Also add simplified macros for direct register accesses. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight replicator: Cleanup programmable replicator namingSuzuki K Poulose
The Linux coresight drivers define the programmable ATB replicator as Qualcomm replicator, while this is designed by ARM. This can cause confusion to a user selecting the driver. Cleanup all references to make it explicitly clear. This patch : 1) Replace the compatible string for the replicator : qcom,coresight-replicator1x => arm,coresight-dynamic-replicator 2) Changes the Kconfig symbol (since this is not part of any defconfigs) CORESIGHT_QCOM_REPLICATOR => CORESIGHT_DYNAMIC_REPLICATOR 3) Improves the help message in the Kconfig. 4) Changes the name of the driver and the file : coresight-replicator-qcom => coresight-dynamic-replicator Cc: Pratik Patel <pratikp@codeaurora.org> Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: devicetree@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com> Acked-by: Rob Herring <robh+dt@kernel.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight: etm4x: Adds trace return stack option programming for ETMv4.Mike Leach
Adds handling to program the return stack option into ETMv4 hardware if specified in the perf command line. If option is not supported by the hardware then it will be ignored. This allows capture to move between core/ETM combinations that have the hardware support to those that do not. Signed-off-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight: ptm: Adds trace return stack option programming for PTM.Mike Leach
Adds handling to program the return stack option into PTM hardware if specified in the perf command line. If option is not supported by the hardware then it will be ignored. This allows capture to move between core/ETM combinations that have the hardware support to those that do not. Signed-off-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight: pmu: Adds return stack option to perf coresight pmuMike Leach
Return stack is a programmable option on some ETM and PTM hardware. Adds the option flags to enable this from the perf event command line. Signed-off-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28hwtracing: coresight: constify attribute_group structures.Arvind Yadav
attribute_groups are not supposed to change at runtime. All functions working with attribute_groups provided by <linux/sysfs.h> work with const attribute_group. So mark the non-const structs as const. File size before: text data bss dec hex filename 2573 288 296 3157 c55 coresight-etm-perf.o File size After adding 'const': text data bss dec hex filename 2613 224 296 3133 c3d coresight-etm-perf.o Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight: etm3x: Set synchronisation frequencty to TRM defaultMathieu Poirier
Register ETMSYNCFR holds the number of by that need to be generated before periodic synchronisation packets are inserted in the trace stream. By zeroing out the config structure, the current code effectively disable periodic synchronization. This patch simply initialise the recommended value for this register as specified in the technical reference manual. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight: etb10: Move etb_disable_hw() outside of lockMathieu Poirier
Function etb_disable_hw() is already taking care of unlocking and locking the coresight access register and as such doesn't need to be placed within the unlock/lock of function etb_update_buffer(). Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight: Add barrier packet for synchronisationMathieu Poirier
When a buffer overflow happens the synchronisation patckets usually present at the beginning of the buffer are lost, a situation that prevents the decoder from knowing the context of the traces being decoded. This patch adds a barrier packet to be used by sink IPs when a buffer overflow condition is detected. These barrier packets are then used by the decoding library as markers to force re-synchronisation. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight: etb10: Remove useless conversion to LEMathieu Poirier
Internal CoreSight components are rendering trace data in little-endian format. As such there is no need to convert the data once more, hence removing the extra step. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28coresight: Correct buffer lost incrementMathieu Poirier
Many conditions may cause synchronisation to be lost when updating the perf ring buffer but the end result is still the same: synchronisation is lost. As such there is no need to increment the lost count for each condition, just once will suffice. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28dm mpath: do not lock up a CPU with requeuing activityBart Van Assche
When using the block layer in single queue mode, get_request() returns ERR_PTR(-EAGAIN) if the queue is dying and the REQ_NOWAIT flag has been passed to get_request(). Avoid that the kernel reports soft lockup complaints in this case due to continuous requeuing activity. Fixes: 7083abbbf ("dm mpath: avoid that path removal can trigger an infinite loop") Cc: stable@vger.kernel.org Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com> Tested-by: Laurence Oberman <loberman@redhat.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Mike Snitzer <snitzer@redhat.com>
2017-08-28dm: fix printk() rate limiting codeBart Van Assche
Using the same rate limiting state for different kinds of messages is wrong because this can cause a high frequency message to suppress a report of a low frequency message. Hence use a unique rate limiting state per message type. Fixes: 71a16736a15e ("dm: use local printk ratelimit") Cc: stable@vger.kernel.org Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com> Signed-off-by: Mike Snitzer <snitzer@redhat.com>
2017-08-28dm mpath: retry BLK_STS_RESOURCE errorsBart Van Assche
Retry requests instead of failing them if an out-of-memory error occurs or the block driver below dm-mpath is busy. This restores the v4.12 behavior of noretry_error(), namely that -ENOMEM results in a retry. Fixes: 2a842acab109 ("block: introduce new block status code type") Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Mike Snitzer <snitzer@redhat.com>
2017-08-28dm: fix the second dec_pending() argument in __split_and_process_bio()Bart Van Assche
Detected by sparse. Fixes: 4e4cbee93d56 ("block: switch bios to blk_status_t") Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Tested-by: Laurence Oberman <loberman@redhat.com> Signed-off-by: Mike Snitzer <snitzer@redhat.com>
2017-08-28Merge 4.13-rc7 into staging-nextGreg Kroah-Hartman
We want the staging and iio fixes in here to handle the merge issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: Move the ownership check to irq_chip callbackKiran Gunda
Check the irq ownership in the irq_request_resources callback instead of checking it during the irq mapping. This can prevent installing the flow handler for the interrupt that is not owned by the EE and allow the irq translation during the gpio driver probe. Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Tested-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: Convert to using %pOF instead of full_nameRob Herring
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: Remove checking opc value not less than 0Fenglin Wu
The opc parameter in pmic_arb_write_cmd() function is defined with type u8 and it's always greater than or equal to 0. Checking that it's not less than 0 is redundant and it can cause a forbidden warning during compilation. Remove the check. Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org> Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: add support for HW version 5David Collins
Add support for version 5 of the SPMI PMIC arbiter. It utilizes different offsets for registers than those found on version 3. Also, the procedure to determine if writing and IRQ access is allowed for a given PPID changes for version 5. Signed-off-by: David Collins <collinsd@codeaurora.org> Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: fix a possible null pointer dereferenceKiran Gunda
If "core" memory resource is not specified, then the driver could end up dereferencing a null pointer. Fix this issue. Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: return __iomem pointer instead of offsetKiran Gunda
Modify the pmic_arb version ops to return an __iomem pointer to the address instead of an offset. That way we do not need to care about the base address changes in the new HW version. Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: use irq_chip callback to set spmi irq wakeup capabilityKiran Gunda
Currently the driver sets the pmic arbiter core interrupt as wakeup capable irrespective of the child irqs which causes the system to wakeup unnecessarily. To fix this, set the core interrupt as wakeup capable only if any of the child irqs request for it. Do this by marking it as wakeup capable in the irq_set_wake callback. Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: return the value instead of passing by pointerKiran Gunda
Returning the output value from a function, when it is possible, is the better and cleaner way than passing it by the pointer. Hence, modify the ppid_to_apid mapping function to return apid instead of passing it by a pointer. While at it, pass the ppid as function parameter to ppid_to_apid mapping function instead of passing the sid and addr. Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: replace the writel_relaxed with __raw_writelKiran Gunda
Replace the writel_relaxed with __raw_writel to avoid byte swapping in pmic_arb_write_data() function. That way the code is independent of the CPU endianness. Fixes: 111a10bf3e53 ("spmi: pmic-arb: rename spmi_pmic_arb_dev to spmi_pmic_arb") Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: fix memory allocation for mapping_tableKiran Gunda
Allocate the correct memory size (max_pmic_peripherals) for the mapping_table that holds the apid to ppid mapping. Also use a local variable for mapping_table for better alignment of the code. Fixes: 987a9f128b8a ("spmi: pmic-arb: Support more than 128 peripherals") Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: optimize qpnpint_irq_set_type functionKiran Gunda
Optimize the qpnpint_irq_set_type() by using a local variable to hold the handler type. Also clean up other variable usage. Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: clean up pmic_arb_find_apid functionKiran Gunda
Clean up the pmic_arb_find_apid() by using the local variables to improve the code readability. Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: rename pa_xx to pmic_arb_xx and other cleanupKiran Gunda
This patch cleans up the following. - Rename the "pa" to "pmic_arb". - Rename the spmi_pmic_arb *dev to spmi_pmic_arb *pmic_arb. - Rename the pa_{read,write}_data() functions to pmic_arb_{read,write}_data(). - Rename channel to APID. - Rename the HWIRQ_*() macros to hwirq_to_*(). Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28spmi: pmic-arb: remove the read/write access checksKiran Gunda
The access mode checks for peripheral ownership for read/write permissions should not be required. Every peripheral enabled for this master is expected to have a read/write permissions. If there is any such invalid access due to wrong configuration in boot loader or device tree files, then it should be fixed in those locations. Hence, remove the access mode checks from the driver. Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28mei: make device_type constBhumika Goyal
Make this const as it is only stored in the type field of a device structure, which is const. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28usb: chipidea: usb2: check memory allocation failureChristophe JAILLET
Check memory allocation failure and return -ENOMEM in such a case, as already done few lines below for another memory allocation. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28usb: Add device quirk for Logitech HD Pro Webcam C920-CDmitry Fleytman
Commit e0429362ab15 ("usb: Add device quirk for Logitech HD Pro Webcams C920 and C930e") introduced quirk to workaround an issue with some Logitech webcams. Apparently model C920-C has the same issue so applying the same quirk as well. See aforementioned commit message for detailed explanation of the problem. Signed-off-by: Dmitry Fleytman <dmitry@daynix.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28usb: misc: lvstest: add entry to place port in compliance modeJack Pham
Add support for the SuperSpeed Link Layer test case TD.7.34 which requires the operator to place the port into compliance mode, and to subsequently bring it out via reset. Historically according to the (now deprecated) USB 3.0 specification a SuperSpeed host downstream port would automatically transition to Compliance mode from the Polling state if LFPS polling times out. However the language in USB 3.1 as well as xHCI 1.1 states it may be required to explicitly enable this transition. For such hosts this is done by sending a SET_FEATURE(PORT_LINK_STATE) with the state set to Compliance to the root hub port. Similar to the other supported commands, to do this via sysfs: echo > /sys/bus/usb/devices/2-0\:1.0/enable_compliance According to xHCI 1.1 section 4.19.1.2.4.1, this enables the transition to compliance mode upon LFPS timeout. Note that this can only be issued when the port is in disconnected state. And in order to disable this behavior on subsequent transitions, a warm reset should be issued. So add another entry to do that: echo > /sys/bus/usb/devices/2-0\:1.0/warm_reset In general these attributes can also be useful for other USB SuperSpeed compliance tests such as electrical and eye diagram testing which require CPn patterns to be transmitted. Signed-off-by: Jack Pham <jackp@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28usb: xhci: Support enabling of compliance mode for xhci 1.1Jack Pham
To perform SuperSpeed compliance testing the port should first be placed into compliance mode. For xHCI 1.0 and prior this transition happens automatically when the port is in Training and encounters an LFPS timeout. Thus running compliance tests against a test appliance may simply just work by simply plugging in to the downstream port. However starting with xHCI 1.1 the transition from Polling.LFPS to compliance mode may be disabled by default and needs to be explicitly enabled by writing to the PLS field of the PORTSC register, which sets an internal 'CTE' (Compliance Transition Enabled) flag so that the port will perform the transition the next time it encounters LFPS timeout. Whether this is disabled or not is determined by the 'CTC' (Compliance Transition Capability) bit in the HCCPARAMS2 capability register. In order to allow a test operator to change this if needed, allow a test driver (such as drivers/usb/misc/lvstest.c) to send a SET_FEATURE(PORT_LINK_STATE) control message to the root hub to update the link state prior to connecting to the port. Subsequently, placing the port in warm reset would then disable the flag. Signed-off-by: Jack Pham <jackp@codeaurora.org> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28usb:xhci:Fix regression when ATI chipsets detectedSandeep Singh
The following commit cause a regression on ATI chipsets. 'commit e788787ef4f9 ("usb:xhci:Add quirk for Certain failing HP keyboard on reset after resume")' This causes pinfo->smbus_dev to be wrongly set to NULL on systems with the ATI chipset that this function checks for first. Added conditional check for AMD chipsets to avoid the overwriting pinfo->smbus_dev. Reported-by: Ben Hutchings <ben@decadent.org.uk> Fixes: e788787ef4f9 ("usb:xhci:Add quirk for Certain failing HP keyboard on reset after resume") cc: Nehal Shah <Nehal-bakulchandra.Shah@amd.com> cc: <stable@vger.kernel.org> Signed-off-by: Sandeep Singh <Sandeep.Singh@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28usb: quirks: add delay init quirk for Corsair Strafe RGB keyboardKai-Heng Feng
Corsair Strafe RGB keyboard has trouble to initialize: [ 1.679455] usb 3-6: new full-speed USB device number 4 using xhci_hcd [ 6.871136] usb 3-6: unable to read config index 0 descriptor/all [ 6.871138] usb 3-6: can't read configurations, error -110 [ 6.991019] usb 3-6: new full-speed USB device number 5 using xhci_hcd [ 12.246642] usb 3-6: unable to read config index 0 descriptor/all [ 12.246644] usb 3-6: can't read configurations, error -110 [ 12.366555] usb 3-6: new full-speed USB device number 6 using xhci_hcd [ 17.622145] usb 3-6: unable to read config index 0 descriptor/all [ 17.622147] usb 3-6: can't read configurations, error -110 [ 17.742093] usb 3-6: new full-speed USB device number 7 using xhci_hcd [ 22.997715] usb 3-6: unable to read config index 0 descriptor/all [ 22.997716] usb 3-6: can't read configurations, error -110 Although it may work after several times unpluging/pluging: [ 68.195240] usb 3-6: new full-speed USB device number 11 using xhci_hcd [ 68.337459] usb 3-6: New USB device found, idVendor=1b1c, idProduct=1b20 [ 68.337463] usb 3-6: New USB device strings: Mfr=1, Product=2, SerialNumber=3 [ 68.337466] usb 3-6: Product: Corsair STRAFE RGB Gaming Keyboard [ 68.337468] usb 3-6: Manufacturer: Corsair [ 68.337470] usb 3-6: SerialNumber: 0F013021AEB8046755A93ED3F5001941 Tried three quirks: USB_QUIRK_DELAY_INIT, USB_QUIRK_NO_LPM and USB_QUIRK_DEVICE_QUALIFIER, user confirmed that USB_QUIRK_DELAY_INIT alone can workaround this issue. Hence add the quirk for Corsair Strafe RGB. BugLink: https://bugs.launchpad.net/bugs/1678477 Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28usb: gadget: make snd_pcm_hardware constBhumika Goyal
Make this const as it is only used during a copy operation. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28usb: common: use of_property_read_bool()Sergei Shtylyov
Use more compact of_property_read_bool() calls for the boolean properties instead of of_find_property() calls in of_usb_host_tpl_support() and of_usb_update_otg_caps(). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-28USB: core: constify vm_operations_structArvind Yadav
vm_operations_struct are not supposed to change at runtime. All functions working with const vm_operations_struct. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
generated by cgit (git 2.34.1) at 2025-09-15 06:11:36 +0000