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2016-09-23usb: musb: Fix PM runtime for disconnect after unconfigureTony Lindgren
If we unconfigure musb as a USB peripheral with cable connected, and then remove the cable, no interrupts will happen. And musb thinks we're still connected keeping the device active. Now with the session bit based PM runtime working for musb, we can fix this issue by calling musb irq_work. That rechecks the devctl register and reconfigures PM runtime based on the devctl. Fixes: 467d5c980709 ("usb: musb: Implement session bit based runtime PM for musb-core") Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Bin Liu <b-liu@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-09-23EDAC, altera: Add IRQ Flags to disable IRQ while handlingThor Thayer
Add the IRQF_ONESHOT and IRQF_TRIGGER_HIGH flags to disable the IRQ while executing the IRQ handler. Remove the IRQF_SHARED because these are not shared IRQs in the domain. Exposed when flooding IRQs. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1474582419-7053-2-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2016-09-23EDAC, altera: Correct EDAC IRQ error messageThor Thayer
Correct the error message sent out in the case of a single bit error IRQ allocation. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1474582419-7053-1-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2016-09-23mtd: nand: Provide nand_cleanup() function to free NAND related resourcesRichard Weinberger
Provide a nand_cleanup() function to free all nand related resources without unregistering the mtd device. This should allow drivers to call mtd_device_unregister() and handle its return value and still being able to cleanup all nand related resources. Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Daniel Walter <dwalter@sigma-star.at> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: Kill the OF_MTD Kconfig optionBoris Brezillon
Commit d48f62b9a0a0 ("mtd: nand: move of_get_nand_xxx() helpers into nand_base.c") removed the drivers/of/of_mtd.c file but did not remove the associated OF_MTD Kconfig option. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: mxc: Test CONFIG_OF instead of CONFIG_OF_MTDBoris Brezillon
We are about to drop the OF_MTD Kconfig option. Test CONFIG_OF activation instead of CONFIG_OF_MTD. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Fix nand_command_lp() for 8bits opcodesBoris Brezillon
8 bits opcodes should be followed by a single address cycle. Make the 2nd address cycle dependent of !nand_opcode_8bits(command). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: sunxi: Support ECC maximizationBoris Brezillon
Setup the maximum ECC config when NAND_ECC_MAXIMIZE is set. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Support maximizing ECC when using software BCHBoris Brezillon
Add support for ECC maximization when software BCH with nand_ooblayout_lp_ops layout is used. Other cases should be handled by the NAND controller driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Add an option to maximize the ECC strengthBoris Brezillon
The generic NAND DT bindings allows one to tweak the ECC strength and step size to their need. It can be used to lower the ECC strength to match a bootloader/firmware config, but might also be used to get a better reliability. In the latter case, the user might want to use the maximum ECC strength without having to explicitly calculate the exact value (this value not only depends on the OOB size, but also on the NAND controller, and can be tricky to extract). Add a generic 'nand-ecc-maximize' DT property and the associated NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best ECC strength and step-size on their own. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org>
2016-09-23mtd: nand: mxc: Add timing setup for v2 controllersSascha Hauer
So far we relied on reset default or the bootloader to configure a suitable clk rate for the Nand controller. This works but we can optimize the timing for better performance. This sets the clk rate for v2 controllers (i.MX25/35) based on the timing mode read from the ONFI parameter page. This may also enable the symmetric mode (aks EDO mode) if necessary which reads one word per clock cycle. Tested on an i.MX25 with a Micron MT29F4G08ABBDAHC attached. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: mxc: implement onfi get/set featuresSascha Hauer
To be able to support different ONFI timing modes we have to implement the onfi_set_features and onfi_get_features. Tested on an i.MX25 SoC. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: sunxi: switch from manual to automated timing configSascha Hauer
The NAND framework is now able to select the best NAND timings for us. All we have to do is implement a ->setup_data_interface() function to apply those timings and remove the timing selection code from the sunxi driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: automate NAND timings selectionBoris Brezillon
The NAND framework provides several helpers to query timing modes supported by a NAND chip, but this implies that all NAND controller drivers have to implement the same timings selection dance. Also currently NAND devices can be resetted at arbitrary places which also resets the timing for ONFI chips to timing mode 0. Provide a common logic to select the best timings based on ONFI or ->onfi_timing_mode_default information. Hook this into nand_reset() to make sure the new timing is applied each time during a reset. NAND controller willing to support timings adjustment should just implement the ->setup_data_interface() method. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2016-09-23mtd: nand: Expose data interface for ONFI mode 0Sascha Hauer
The nand layer will need ONFI mode 0 to use it as timing mode before and right after reset. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Add function to convert ONFI mode to data_interfaceSascha Hauer
onfi_init_data_interface() initializes a data interface with values from a given ONFI mode. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: convert ONFI mode into data interfaceSascha Hauer
struct nand_data_interface is the designated type to pass to the NAND drivers to configure the timing. To simplify further patches convert the onfi_sdr_timings array from type struct nand_sdr_timings nand_data_interface. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Create a NAND reset functionSascha Hauer
When NAND devices are resetted some initialization may have to be done, like for example they have to be configured for the timing mode that shall be used. To get a common place where this initialization can be implemented create a nand_reset() function. This currently only issues a NAND_CMD_RESET to the NAND device. The places issuing this command manually are replaced with a call to nand_reset(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Allow MTD_NAND_OMAP2 to be usable on Keystone devicesRoger Quadros
Some Keystone devices (e.g. K2G) include a OMAP NAND IP. Allow the NAND driver to be usable for both Keystone and OMAP devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: brcmnand: iProc big endian and ONFI supportRay Jui
This patch adds big endian and ONFI support for various iProc based SoCs that use the core brcmstb NAND controller This patch was originally implemented by Prafulla Kota <prafulla.kota@broadcom.com> and fully tested on iProc based NS2 SVK Signed-off-by: Prafulla Kota <prafulla.kota@broadcom.com> Signed-off-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Kamal Dasu <kdasu.kdev@gmail.com> Acked-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand_bbt: scan for next free bbt block if writing bbt failsKyle Roeschley
If erasing or writing the BBT fails, we should mark the current BBT block as bad and use the BBT descriptor to scan for the next available unused block in the BBT. We should only return a failure if there isn't any space left. Signed-off-by: Kyle Roeschley <kyle.roeschley@ni.com> Suggested-by: Jeff Westfahl <jeff.westfahl@ni.com> Tested-by: Kyle Roeschley <kyle.roeschley@ni.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand_bbt: Move BBT block selection logic out of write_bbt()Boris Brezillon
This clarifies the write_bbt() function by removing the write label and simplifying the error/exit path. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Kyle Roeschley <kyle.roeschley@ni.com>
2016-09-23mtd: nand: timings: Reorder tRR_min def in mode 0Boris Brezillon
In the ONFI spec, the tRR_min entry is defined before the tRST_max one. Reoder the definition to make it easier to review. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: timings: Fix tADL_min for ONFI 4.0 chipsBoris Brezillon
ONFI 4.0 spec defines different values for the tADL_min timing. Since we don't want to have different timings depending on the ONFI version, we just set tADL_min to the maximum value (the one specified in the ONFI 4.0 spec). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: gpmi: get correct free oob spaceHan Xu
change the way to calculate pagesize to get correct free oob space for legacy_set_geometry function. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: sh_flctl: handle dma_submit() errorsBrian Norris
Some build tools noticed that 'cookie' is being set but not used. Might as well catch the errors here and handle them the same way we handle other DMA prep steps. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: s3c2410: Register cpufreq notifier only on S3C24xxKrzysztof Kozlowski
The driver registered for CPU frequency transitions to recalculate its clock when ARM clock frequency changes (ratio between frequencies of ARM's parent clock (fclk) and clock for peripherals remains fixed). This is needed only on S3C24xx platform when cpufreq driver is enabled so limit the ifdef to respective cpufreq Kconfig. Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Get rid of needless 'goto'Andrey Smirnov
Using "goto" and "switch" statement only makes it harder to follow control flow and doesn't bring any advantages. Rewrite the code to avoid using "goto". Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Error out if cmd_ctrl() is missingAndrey Smirnov
If no user specified chip->select_chip() function is provided, code in nand_base.c will automatically set this hook to nand_select_chip(), which in turn depends on chip->cmd_ctrl() hook being valid. Not providing both of those functions in NAND controller driver (for example by mistake) will result in a bit cryptic segfault. Same is true for chip->cmdfunc(). To avoid the above scenario add a check in nand_scan_dent and error out if cmd_ctrl() is not provided. Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Suggested-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23Kconfig: nand: Remove redundant dependency on MTD_NANDAndrey Smirnov
Config MTD_NAND_FSL_IFC is already located inside 'if MTD_NAND' statment, so there's no need to explicitly specify it as a dependency. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23Kconfig: nand: Make MTD_NAND_FSL_ELBC depend on FSL_SOCAndrey Smirnov
MTD_NAND_FSL_ELBC selects FSL_LBC that in turn depends on FSL_SOC, so depending on PPC instead of FSL_SOC leads to this message: warning: (MPC836x_RDK && MTD_NAND_FSL_ELBC && MTD_NAND_FSL_UPM) selects FSL_LBC which has unmet direct dependencies (FSL_SOC) when doing make ARCH=powerpc \ CROSS_COMPILE=powerpc-e500v2-linux-gnuspe- \ allmodconfig" Changing dependency to FSL_SOC fixes that. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: import nand_hw_control_init()Marc Gonzalez
The code to initialize a struct nand_hw_control is duplicated across several drivers. Factorize it using an inline function. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23ixgbe: reset before SRIOV init to avoid mailbox issuesEmil Tantilov
Enabling SRIOV while the ixgbevf driver is loaded will result in all mailbox requests from ixgbevf_open() being rejected by ixgbe because adapter->clear_to_send is set to false on reset. Call ixgbe_sriov_reinit() before pci_enable_sriov() to make sure that mailbox requests are handled from the time ixgbevf is loaded. Reported-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-23ixgbe: Support 4 queue RSS on VFs with 1 or 2 queue RSS on PFAlexander Duyck
Instead of limiting the VFs if we don't use 4 queues for RSS in the PF we can instead just limit the RSS queues used to a power of 2. By doing this we can support use cases where VFs are using more queues than the PF is currently using and can support RSS if so desired. The only limitation on this is that we cannot support 3 queues of RSS in the PF or VF. In either of these cases we should fall back to 2 queues in order to be able to use the power of 2 masking provided by the psrtype register. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-23ixgbe: Limit reporting of redirection table if SR-IOV is enabledAlexander Duyck
The hardware redirection table can support more queues then the PF currently has when SR-IOV is enabled. In order to account for this use the RSS mask to trim of the bits that are not used. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-23ixgbe: Allow setting multiple queues when SR-IOV is enabledAlexander Duyck
The maximum queue count reported was 1, however support for multiple queues with SR-IOV was added some time ago so we should report support for it to the user so that they can select multiple queues if they so desire. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-23ixgbe: Use MDIO_PRTAD_NONE consistentlyMark Rustad
The value MDIO_PRTAD_NONE should be used to indicate no PHY address. Not 0, not 0xFFFF. Use the MDIO_PRTAD_NONE value consistently. Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-23ixgbevf: add spinlocks for MTU change callsEmil Tantilov
Protect set_rlpml with mailbox lock to make sure the MTU configuration is handled properly. This change resolves an issue where set_rlpml can fail when the VF interface is brought up: ixgbevf 0000:03:1d.6: Failed to set MTU at 1500 Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-23ixgbe: Indicate support for pause frames in all casesMark Rustad
All the MACs supported by ixgbe support pause frames, so indicate that support in ethtool. Also set advertising according to requested mode. Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-23ixgbe: Resolve NULL reference by setting {read, write}_reg_mdiMark Rustad
Set the read_reg_mdi and write_reg_mdi method pointers for X550EM_A_10G_T devices to resolve jumping to NULL. Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-23ixgbe: make ixgbe_led_on/off_t_x550em staticEmil Tantilov
These functions are only used in ixgbe_x550.c. Fixes a warning when compiling with -Wmissing-prototypes Reported-by: Krishneil Singh <krishneil.k.singh@intel.com> Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-23ixgbe: simplify the logic for setting VLAN filteringEmil Tantilov
Simplify the logic for setting VLNCTRL.VFE by checking the VMDQ flag and 82598 MAC instead of having to maintain a list of MAC types. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-23watchdog: pcwd_usb: don't print error when allocating urb failsWolfram Sang
kmalloc will print enough information in case of failure. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2016-09-23watchdog: dw_wdt: Read clock rate only once and validate itGuenter Roeck
Coverity reports: divide_by_zero: In expression readl(dw_wdt->regs + 8) / clk_get_rate(dw_wdt->clk), division by expression clk_get_rate(dw_wdt->clk) which may be zero has undefined behavior. The clock used for the watchdog timer won't change its rate, so read it only once during probe. Also validate it and abort the probe function with an error if it is 0. Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2016-09-23watchdog: core: Fix devres_alloc() allocation sizeGuenter Roeck
Coverity reports: Passing argument 152UL /* sizeof (*wdd) */ to function __devres_alloc_node and then casting the return value to struct watchdog_device ** is suspicious. Allocation size needs to be sizeof(*rcwdd), not sizeof(*wdd). Fixes: 83fbae5a148c ("watchdog: Add a device managed API for ...") Cc: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2016-09-22i40evf: remove unnecessary error checking against i40e_shutdown_adminqLihong Yang
The i40e_shutdown_adminq function never returns failure. There is no need to check the non-0 return value. Clean up the unnecessary error checking and warning against it. Change-ID: Ibb616f09cfb93bd1a872ebf3241a15fb8354b31b Signed-off-by: Lihong Yang <lihong.yang@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-22i40e: Limit TX descriptor count in cases where frag size is greater than 16KAlexander Duyck
The i40e driver was incorrectly assuming that we would always be pulling no more than 1 descriptor from each fragment. It is in fact possible for us to end up with the case where 2 descriptors worth of data may be pulled when a frame is larger than one of the pieces generated when aligning the payload to either 4K or pieces smaller than 16K. To adjust for this we just need to make certain to test all the way to the end of the fragments as it is possible for us to span 2 descriptors in the block before us so we need to guarantee that even the last 6 descriptors have enough data to fill a full frame. Change-ID: Ic2ecb4d6b745f447d334e66c14002152f50e2f99 Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-22i40evf: remove unnecessary error checking against i40evf_up_completeBimmy Pujari
Function i40evf_up_complete() always returns success. Changed this to a void type and removed the code that checks the return status and prints an error message. Change-ID: I8c400f174786b9c855f679e470f35af292fb50ad Signed-off-by: Bimmy Pujari <bimmy.pujari@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-22i40evf: Fix link state event handlingSridhar Samudrala
Currently disabling the link state from PF via ip link set enp5s0f0 vf 0 state disable doesn't disable the CARRIER on the VF. This patch updates the carrier and starts/stops the tx queues based on the link state notification from PF. PF: enp5s0f0, VF: enp5s2 #modprobe i40e #echo 2 > /sys/class/net/enp5s0f0/device/sriov_numvfs #ip link set enp5s2 up #ip -d link show enp5s2 175: enp5s2: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT group default qlen 1000 link/ether ea:4d:60:bc:6f:85 brd ff:ff:ff:ff:ff:ff promiscuity 0 addrgenmode eui64 #ip link set enp5s0f0 vf 0 state disable #ip -d link show enp5s0f0 171: enp5s0f0: <BROADCAST,MULTICAST> mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 68:05:ca:2e:72:68 brd ff:ff:ff:ff:ff:ff promiscuity 0 addrgenmode eui64 numtxqueues 72 numrxqueues 72 portid 6805ca2e7268 vf 0 MAC 00:00:00:00:00:00, spoof checking on, link-state disable, trust off vf 1 MAC 00:00:00:00:00:00, spoof checking on, link-state auto, trust off #ip -d link show enp5s2 175: enp5s2: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc mq state DOWN mode DEFAULT group default qlen 1000 link/ether ea:4d:60:bc:6f:85 brd ff:ff:ff:ff:ff:ff promiscuity 0 addrgenmode eui64 numtxqueues 16 numrxqueues 16 Signed-off-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-09-22i40e: avoid potential null pointer dereference when assigning lenColin Ian King
There is a sanitcy check for desc being null in the first line of function i40evf_debug_aq. However, before that, aq_desc is cast from desc, and aq_desc is being dereferenced on the assignment of len, so this could be a potential null pointer deference. Fix this by moving the initialization of len to the code block where len is being used and hence at this point we know it is OK to dereference aq_desc. Signed-off-by: Colin Ian King <colin.king@canonical.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
generated by cgit (git 2.34.1) at 2025-09-22 14:46:02 +0000