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* pci/msi:
PCI/portdrv: Compute MSI/MSI-X IRQ vectors after final allocation
PCI/portdrv: Factor out Interrupt Message Number lookup
PCI/portdrv: Consolidate comments
PCI/portdrv: Add #defines for AER and DPC Interrupt Message Number masks
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* pci/misc:
PCI: Fix kernel-doc build warning
PCI: Move PCI_QUIRKS to the PCI bus menu
alpha/PCI: Make pdev_save_srm_config() static
PCI: Remove unused declarations
PCI: Remove redundant pci_dev, pci_bus, resource declarations
PCI: Remove redundant pcibios_set_master() declarations
PCI/PME: Handle invalid data when reading Root Status
x86/pci/intel_mid_pci: Constify intel_mid_pci_ops and make it __initconst
PCI: Constify pci_dev_type structure
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* pci/hotplug:
PCI: pciehp: Do not clear Presence Detect Changed during initialization
PCI: pciehp: Fix race condition handling surprise link down
PCI: Distribute available resources to hotplug-capable bridges
PCI: Distribute available buses to hotplug-capable bridges
PCI: Do not allocate more buses than available in parent
PCI: Open-code the two pass loop when scanning bridges
PCI: Move pci_hp_add_bridge() to drivers/pci/probe.c
PCI: Add for_each_pci_bridge() helper
PCI: shpchp: Convert timers to use timer_setup()
PCI: cpqphp: Convert timers to use timer_setup()
PCI: pciehp: Convert timers to use timer_setup()
PCI: ibmphp: Use common error handling code in unconfigure_boot_device()
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* pci/endpoint:
misc: pci_endpoint_test: Fix BUG_ON error during pci_disable_msi()
misc: pci_endpoint_test: Fix pci_endpoint_test not releasing resources on remove
misc: pci_endpoint_test: Fix failure path return values in probe
misc: pci_endpoint_test: Avoid triggering a BUG()
misc: pci_endpoint_test: Prevent some integer overflows
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* pci/aspm:
PCI/ASPM: Add L1 Substates definitions
PCI/ASPM: Reformat ASPM register definitions
PCI/ASPM: Use correct capability pointer to program LTR_L1.2_THRESHOLD
PCI/ASPM: Account for downstream device's Port Common_Mode_Restore_Time
PCI/ASPM: Deal with missing root ports in link state handling
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* pci/aer:
PCI/AER: Report non-fatal errors only to the affected endpoint
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* clk-uniphier:
clk: uniphier: fix DAPLL2 clock rate of Pro5
clk: uniphier: fix parent of miodmac clock data
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* clk-gpio:
clk: clk-gpio: Request GPIO descriptor as LOW
clk: clk-gpio: Make GPIO clock provider use descriptors only
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* clk-mediatek:
clk: mediatek: add clock support for MT7622 SoC
clk: mediatek: add clocks dt-bindings required header for MT7622 SoC
clk: mediatek: add the option for determining PLL source clock
dt-bindings: clock: mediatek: document clk bindings for MediaTek MT7622 SoC
clk: mediatek: mark mtk_infrasys_init_early __init
clk: mediatek: Add MT2712 clock support
clk: mediatek: Add dt-bindings for MT2712 clocks
dt-bindings: ARM: Mediatek: Document bindings for MT2712
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* clk-imx:
clk: imx: imx7d: Remove ARM_M0 clock
clk: imx: imx7d: Fix parent clock for OCRAM_CLK
clk: imx: clk-imx6ul: allow lcdif_pre_sel to change parent rate
clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPU
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* clk-qcom:
clk: qcom: clk-smd-rpm: add msm8996 rpmclks
clk: qcom: Implement RPM clocks for MSM8660/APQ8060
clk: qcom: Update DT bindings for the MSM8660/APQ8060 RPMCC
clk: qcom: Elaborate on "active" clocks in the RPM clock bindings
clk: qcom: Remove unused RCG ops
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* clk-at91:
clk: at91: utmi: set the mainck rate
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* clk-devm-provider:
clk: qcom: common: Migrate to devm_* APIs for resets and clk providers
clk: Add devm_of_clk_add_hw_provider()/del_provider() APIs
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* clk-const:
clk: make clk_init_data const
clk: imx: make clk_ops const
clk: mmp: make clk_ops const
clk: hisilicon: make clk_ops const
clk: mxs: make clk_ops const
clk: sirf: make clk_ops const
clk: spear: make clk_ops const
CLK: SPEAr: make aux_clk_masks structures const
CLK: SPEAr: make structure field and function argument as const
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* clk-sunxi:
clk: sunxi: explicitly request exclusive reset control
clk: sunxi: fix build warning
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* clk-hikey:
clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu'
clk: hisilicon: Delete an error message for a failed memory allocation in hisi_register_clkgate_sep()
clk: hi3660: fix incorrect uart3 clock freqency
clk: hi6220: mark clock cs_atb_syspll as critical
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
Pull tegra clk drivers updates from Thierry Reding:
This contains cleanups and minor fixes for the Tegra clock driver.
* tag 'tegra-for-4.15-clk-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
clk: tegra: Use readl_relaxed_poll_timeout_atomic() in tegra210_clock_init()
clk: tegra: dfll: Fix drvdata overwriting issue
clk: tegra: Fix cclk_lp divisor register
clk: tegra: Bump SCLK clock rate to 216 MHz
clk: tegra: Use common definition of APBDMA clock gate
clk: tegra: Correct parent of the APBDMA clock
clk: tegra: Add AHB DMA clock entry
clk: tegra: Mark APB clock as critical
clk: tegra: Make tegra_clk_pll_params __ro_after_init
clk: tegra: Fix sor1_out clock implementation
clk: tegra: Use tegra_clk_register_periph_data()
clk: tegra: Add peripheral clock registration helper
clk: tegra: Check BPMP response return code
dt-bindings: clock: tegra: Add sor1_out clock
firmware: tegra: Propagate error code to caller
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The parent of DAPLL2 should be DAPLL1. Fix the clock connection.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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The "miodmac" is not a child of "stdmac". They are independent
from each other. Fix it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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Other than 'mmc_mux', 'clk_sdio0_ciu' uses a different parent mux clock.
Let's add this mux clock as 'sdio0_mux', and correct the parent of
'clk_sdio0_ciu' to be it.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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hisi_register_clkgate_sep()
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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UART3 clock rate is doubled in previous commit.
This error is not detected until recently a mezzanine board which makes
real use of uart3 port (through LS connector of 96boards) was setup
and tested on hi3660-hikey960 board.
This patch changes clock source rate of clk_factor_uart3 to 100000000.
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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Otherwise we can't correctly CPU map TTM buffers.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
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v1: Properly allocate TLB invalidation engine to avoid conflict.
v2: Added comments to codes
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
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When link training fail in MST case, we will divide by 0
when calculating avg_time_slots_per_mtp, so we cannot
proceed.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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When disabling pipe splitting, we need to make sure we disable both
planes used.
This should be done for Linux as well.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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This struct is not updated on page flip and causes vblank_mode
to not work as expected
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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It is to fix: MST display failed to resume from S3
Need to properly setup MST encoder cbs. Otherwise drm_device
encoder doesn't register its own cbs, leading to NULL
encoder->funcs in drm_atomic_helper_resume().
Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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This is a followup to the following revert:
Rex Zhu Revert "drm/amd/display: Match actual state during S3
resume."
Three things needed to be addressed:
1. Potential memory leak on dc_state creation in atomic_check during
s3 resume
2. Warnings are now seen in dmesg during S3 resume
3. Since dc_state is now created in atomic_check, what the reverted
patch was addressing needs to be reevaluated.
This change addresses the above:
1. Since the suspend procedure calls drm_atomic_state_clear, our hook
for releasing the dc_state is called. This frees it before
atomic_check creates it during resume. The leak does not occur.
2. The dc_crtc/plane_state references kept by the atomic states need to
be released before calling atomic_check, which warns if they are
non-null. This is because atomic_check is responsible for creating
the dc_*_states. This is a special case for S3 resume, since the
atomic state duplication that occurs during suspend also copies a
reference to the dc_*_states.
3. See 2. comments are also updated to reflect this.
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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The resume helpers wait for a vblank to occurre hence IRQ need
to be enabled. This avoids a warning as follows during resume:
WARNING: CPU: 0 PID: 314 at drivers/gpu/drm/drm_atomic_helper.c:1249 drm_atomic_helper_wait_for_vblanks.part.1+0x284/0x288
[CRTC:28:crtc-0] vblank wait timed out
Signed-off-by: Stefan Agner <stefan@agner.ch>
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With commit 0a70c998d0c5 ("drm/fsl-dcu: enable pixel clock when
enabling CRTC") the pixel clock is controlled by the CRTC code.
Disabling the pixel clock in suspend leads to a warning due to
the second clk_disable_unprepare call:
WARNING: CPU: 0 PID: 359 at drivers/clk/clk.c:594 clk_core_disable+0x8c/0x90
Remove clk_disable_unprepare call for pixel clock to avoid
unbalanced clock disable on suspend.
Fixes: 0a70c998d0c5 ("drm/fsl-dcu: enable pixel clock when enabling CRTC")
Signed-off-by: Stefan Agner <stefan@agner.ch>
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Since commit 4a97a3da420b ("drm: Don't update property values for atomic
drivers") atomic drivers must not update property values as properties
are read from the state instead. To catch remaining users, the
drm_object_property_set_value() function now throws a warning when
called by atomic drivers on non-immutable properties, and we hit that
warning when creating connectors.
The easy fix is to just remove the drm_object_property_set_value() as it
is used here to set the initial value of the connector's DPMS property
to OFF. The DPMS property applies on top of the connector's state crtc
pointer (initialized to NULL) that is the main connector on/off control,
and should thus default to ON.
Fixes: 4a97a3da420b ("drm: Don't update property values for atomic drivers")
Cc: stable@vger.kernel.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
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There are some conflicts between staging and media trees,
as reported by Stephen Rothwell <sfr@canb.auug.org.au>.
So, merge from staging.
* tag 'staging-4.15-rc1': (775 commits)
staging: lustre: add SPDX identifiers to all lustre files
staging: greybus: Remove redundant license text
staging: greybus: add SPDX identifiers to all greybus driver files
staging: ccree: simplify ioread/iowrite
staging: ccree: simplify registers access
staging: ccree: simplify error handling logic
staging: ccree: remove dead code
staging: ccree: handle limiting of DMA masks
staging: ccree: copy IV to DMAable memory
staging: fbtft: remove redundant initialization of buf
staging: sm750fb: Fix parameter mistake in poke32
staging: wilc1000: Fix bssid buffer offset in Txq
staging: fbtft: fb_ssd1331: fix mirrored display
staging: android: Fix checkpatch.pl error
staging: greybus: loopback: convert loopback to use generic async operations
staging: greybus: operation: add private data with get/set accessors
staging: greybus: loopback: Fix iteration count on async path
staging: greybus: loopback: Hold per-connection mutex across operations
staging: greybus/loopback: use ktime_get() for time intervals
staging: fsl-dpaa2/eth: Extra headroom in RX buffers
...
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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platform_driver_register() can fail here and we must unregister mbox
class.
Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Acked-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
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Currently we rely on the first byte of the Rx buffer to check if there's
any data available to be read. If the first byte of the received buffer
is zero (i.e. null character), then we fail to signal that data is
available even when it's available.
Instead introduce a boolean variable to track the data availability and
update it in the channel receive callback as ready and clear it when the
data is read.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
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Currently the mailbox framework sets txdone_method to TXDONE_BY_POLL if
the controller sets txdone_by_poll. However some clients can have a
mechanism to do TXDONE_BY_ACK which they can specify by knows_txdone.
However, we endup setting both TXDONE_BY_POLL and TXDONE_BY_ACK in that
case. In such scenario, we may end up with below warnings as the tx
ticker is run both by mailbox framework and the client.
WARNING: CPU: 1 PID: 0 at kernel/time/hrtimer.c:805 hrtimer_forward+0x88/0xd8
CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.12.0-rc5 #242
Hardware name: ARM LTD ARM Juno Development Platform
task: ffff8009768ca700 task.stack: ffff8009768f8000
PC is at hrtimer_forward+0x88/0xd8
LR is at txdone_hrtimer+0xd4/0xf8
Call trace:
hrtimer_forward+0x88/0xd8
__hrtimer_run_queues+0xe4/0x158
hrtimer_interrupt+0xa4/0x220
arch_timer_handler_phys+0x30/0x40
handle_percpu_devid_irq+0x78/0x130
generic_handle_irq+0x24/0x38
__handle_domain_irq+0x5c/0xb8
gic_handle_irq+0x54/0xa8
This patch fixes the issue by resetting TXDONE_BY_POLL if client has set
knows_txdone.
Cc: Alexey Klimov <alexey.klimov@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
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Add and use #defines for L1 Substate register fields instead of hard-coding
the masks. Also update comments to use names from the spec. No functional
change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
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Previously we programmed the LTR_L1.2_THRESHOLD in the parent (upstream)
device using the capability pointer of the *child* (downstream) device,
which corrupted some random word of the parent's config space.
Use the parent's L1 SS capability pointer to program its
LTR_L1.2_THRESHOLD.
Fixes: aeda9adebab8 ("PCI/ASPM: Configure L1 substate settings")
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
CC: stable@vger.kernel.org # v4.11+
CC: Rajat Jain <rajatja@google.com>
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The LPI transitioning logic in stmmac_main uses
priv->tx_path_in_lpi_mode to enter/exit LPI.
However, priv->tx_path_in_lpi_mode is assigned
using the return value from host_irq_status().
So for dwmac4, priv->tx_path_in_lpi_mode was always false,
so stmmac_tx_clean() would always try to put us in eee mode,
and stmmac_xmit() would never take us out of eee mode.
To fix this, make host_irq_status() read and return the LPI
irq status also for dwmac4.
This also increments the existing LPI counters, so that
ethtool --statistics shows LPI transitions also for dwmac4.
For dwmac1000, irqs are enabled/disabled using the register
named "Interrupt Mask Register", and thus setting a bit disables
that specific irq.
For dwmac4 the matching register is named "MAC_Interrupt_Enable",
and thus setting a bit enables that specific irq.
Looking at dwmac1000_core.c, the irqs that are always enabled are:
LPI and PMT.
Looking at dwmac4_core.c, the irqs that are always enabled are:
PMT.
To be able to read the LPI irq status, we need to enable the LPI
irq also for dwmac4.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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atm_dev_register() can fail here and passed parameters to free irq
which is not initialised. Initialization of 'dev->irq' happened after
the 'goto out_free_irq'. So using 'irq' insted of 'dev->irq' in
free_irq().
Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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We accidentally return success if lio_vf_rep_modinit() fails instead of
propogating the error code.
Fixes: e20f469660ad ("liquidio: synchronize VF representor names with NIC firmware")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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driver
This patch implements and enables VDP support for the ibmvnic driver.
Moreover, it includes the implementation of suitable structs, signal
transmission/handling and functions which allows the retrival of firmware
information from the ibmvnic card through the ethtool command.
Signed-off-by: Desnes A. Nunes do Rosario <desnesn@linux.vnet.ibm.com>
Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The mvneta controller provides a 8-bit register to update the pending
Tx descriptor counter. Then, a maximum of 255 Tx descriptors can be
added at once. In the current code the mvneta_txq_pend_desc_add function
assumes the caller takes care of this limit. But it is not the case. In
some situations (xmit_more flag), more than 255 descriptors are added.
When this happens, the Tx descriptor counter register is updated with a
wrong value, which breaks the whole Tx queue management.
This patch fixes the issue by allowing the mvneta_txq_pend_desc_add
function to process more than 255 Tx descriptors.
Fixes: 2a90f7e1d5d0 ("net: mvneta: add xmit_more support")
Cc: stable@vger.kernel.org # 4.11+
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch migrates the HNS3 driver code from use of depricated PCI
MSI/MSI-X interrupt vector allocation/free APIs to new common APIs.
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Suggested-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Function devm_gpiod_get_optional() returns an ERR_PTR on failure. Its
return value should not be validated by a NULL check. Instead, use IS_ERR.
Signed-off-by: Pan Bian <bianpan2016@163.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
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After commit b94d22d94ad22 "ARM64: dts: meson-gx: add external PHY
interrupt on some platforms" ethernet stopped working on my Odroid-C2
which has a RTL8211F phy.
It turned out that no interrupts were triggered. Further analysis
showed the register INER can't be altered on page 0.
Because register INSR needs to be accessed via page 0xa43 I assumed
that register INER needs to be accessed via some page too.
Some brute force check resulted in page 0xa42 being the right one.
With this patch the phy is working properly in interrupt mode.
Fixes: 3447cf2e9a11 ("net/phy: Add support for Realtek RTL8211F")
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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In commit 4a3c67a6e7cd ("mlxsw: spectrum_router: Don't batch neighbour
deletion") I removed the support for batch deletion of neighbours on a
router interface (RIF) since at that time the firmware did not support
it for IPv6 neighbours.
This is now supported by the version enforced by the driver, so there is
no reason to delete neighbours one by one anymore.
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This new firmware contains:
- Support Spectrum A1 revision
- Batch deletion of IPv6 neighbours
- Remove incorrect VPD capability
Signed-off-by: Shalom Toledo <shalomt@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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When package.count is larger than ACPI_MAX_HANDLES, buffer.pointer is
not freed before the function returns AE_NO_MEMORY. Fix this possible
memory leak by kfree'ing it.
Signed-off-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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