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2022-07-20platform/chrome: cros_ec_proto: add Kunit tests for get_host_eventTzung-Bi Shih
cros_ec_get_host_event() performs some sanity checks, parses `ec_dev->event_data.data.host_event`, and returns bitmap of EC_HOST_EVENT_*. Add Kunit tests for cros_ec_get_host_event(). Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220622041040.202737-5-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit tests for get_next_eventTzung-Bi Shih
cros_ec_get_next_event() gets events from EC. It consists of 3 versions of event retrieval: 1. No MKBP event. 2. MKBP event version 0. 3. MKBP event version >0. Add Kunit tests for cros_ec_get_next_event(). Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220622041040.202737-4-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit test for cros_ec_map_error()Tzung-Bi Shih
cros_ec_cmd_xfer_status() is the only exported function that calls static function cros_ec_map_error(). Add Kunit test for cros_ec_map_error() through calling cros_ec_cmd_xfer_status(). Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220622041040.202737-3-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit tests for cmd_xfer_statusTzung-Bi Shih
cros_ec_cmd_xfer_status() calls cros_ec_cmd_xfer() and cros_ec_map_error(). Given that there are already test cases for cros_ec_cmd_xfer(), only add basic Kunit tests for cros_ec_cmd_xfer_status(). Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220622041040.202737-2-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: return -EPROTO if empty payloadTzung-Bi Shih
cros_ec_wait_until_complete() sends EC_CMD_GET_COMMS_STATUS which expects to receive sizeof(struct ec_response_get_comms_status) from cros_ec_xfer_command(). Return -EPROTO if cros_ec_xfer_command() returns 0. Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220718050914.2267370-11-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit test for empty payloadTzung-Bi Shih
cros_ec_wait_until_complete() sends EC_CMD_GET_COMMS_STATUS which expects to receive sizeof(struct ec_response_get_comms_status) from cros_ec_xfer_command(). Add Kunit test and expect to receive an error code when cros_ec_xfer_command() returns 0. Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220718050914.2267370-10-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: return -EAGAIN when retries timed outTzung-Bi Shih
While EC_COMMS_STATUS_PROCESSING flag is still on after it tries EC_COMMAND_RETRIES times for sending EC_CMD_GET_COMMS_STATUS, cros_ec_wait_until_complete() doesn't return an error code. Return -EAGAIN in the case instead. Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220718050914.2267370-9-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: change Kunit expectation when timed outTzung-Bi Shih
While EC_COMMS_STATUS_PROCESSING flag is still on after it tries EC_COMMAND_RETRIES times for sending EC_CMD_GET_COMMS_STATUS, cros_ec_wait_until_complete() doesn't return an error code. Change the expectation to an error code. Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220718050914.2267370-8-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: separate cros_ec_wait_until_complete()Tzung-Bi Shih
EC returns EC_RES_IN_PROGRESS if the host command needs more time to complete. Whenever receives the return code, cros_ec_send_command() sends EC_CMD_GET_COMMS_STATUS to query the command status. Separate cros_ec_wait_until_complete() from cros_ec_send_command(). It sends EC_CMD_GET_COMMS_STATUS and waits until the previous command was completed, or encountered error, or timed out. Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20220718050914.2267370-7-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: separate cros_ec_xfer_command()Tzung-Bi Shih
cros_ec_send_command() has extra logic to handle EC_RES_IN_PROGRESS. Separate the command transfer part into cros_ec_xfer_command() so that other functions can re-use it. Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220718050914.2267370-6-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit tests for cros_ec_send_command()Tzung-Bi Shih
cros_ec_cmd_xfer() is the only exported function that calls static function cros_ec_send_command(). Add Kunit tests for cros_ec_send_command() through calling cros_ec_cmd_xfer(). Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220718050914.2267370-5-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add Kunit tests for cros_ec_cmd_xfer()Tzung-Bi Shih
cros_ec_cmd_xfer() transfers the given command and data if any. It performs some sanity checks and calls cros_ec_send_command(). Add Kunit tests for cros_ec_cmd_xfer(). Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220718050914.2267370-4-tzungbi@kernel.org
2022-07-20platform/chrome: cros_ec_proto: add "cros_ec_" prefix to send_command()Tzung-Bi Shih
To be neat, add "cros_ec_" prefix to static function send_command(). Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220718050914.2267370-3-tzungbi@kernel.org
2022-07-19Merge branch '1GbE' of ↵Jakub Kicinski
git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue Tony Nguyen says: ==================== 1GbE Intel Wired LAN Driver Updates 2022-07-18 This series contains updates to igc driver only. Kurt Kanzenbach adds support for Qbv schedules where one queue stays open in consecutive entries. Sasha removes an unused define and field. * '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue: igc: Remove forced_speed_duplex value igc: Remove MSI-X PBA Clear register igc: Lift TAPRIO schedule restriction ==================== Link: https://lore.kernel.org/r/20220718180109.4114540-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19Merge branch '40GbE' of ↵Jakub Kicinski
git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue Tony Nguyen says: ==================== Intel Wired LAN Driver Updates 2022-07-18 This series contains updates to iavf driver only. Przemyslaw fixes handling of multiple VLAN requests to account for individual errors instead of rejecting them all. He removes incorrect implementations of ETHTOOL_COALESCE_MAX_FRAMES and ETHTOOL_COALESCE_MAX_FRAMES_IRQ. He also corrects an issue with NULL pointer caused by improper handling of dummy receive descriptors. Finally, he corrects debug prints reporting an unknown state. * '40GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue: iavf: Fix missing state logs iavf: Fix handling of dummy receive descriptors iavf: Disallow changing rx/tx-frames and rx/tx-frames-irq iavf: Fix VLAN_V2 addition/rejection ==================== Link: https://lore.kernel.org/r/20220718174807.4113582-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19net: ethernet: mtk_ppe: fix possible NULL pointer dereference in ↵Lorenzo Bianconi
mtk_flow_get_wdma_info odev pointer can be NULL in mtk_flow_offload_replace routine according to the flower action rules. Fix possible NULL pointer dereference in mtk_flow_get_wdma_info. Fixes: a333215e10cb5 ("net: ethernet: mtk_eth_soc: implement flow offloading to WED devices") Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/r/4e1685bc4976e21e364055f6bee86261f8f9ee93.1658137753.git.lorenzo@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19r8152: fix a WOL issueHayes Wang
This fixes that the platform is waked by an unexpected packet. The size and range of FIFO is different when the device enters S3 state, so it is necessary to correct some settings when suspending. Regardless of jumbo frame, set RMS to 1522 and MTPS to MTPS_DEFAULT. Besides, enable MCU_BORW_EN to update the method of calculating the pointer of data. Then, the hardware could get the correct data. Fixes: 195aae321c82 ("r8152: support new chips") Signed-off-by: Hayes Wang <hayeswang@realtek.com> Link: https://lore.kernel.org/r/20220718082120.10957-391-nic_swsd@realtek.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19riscv/efi_stub: Add 64bit boot-hartid support on RV64Sunil V L
The boot-hartid can be a 64bit value on RV64 platforms but the "boot-hartid" in DT is assumed to be 32bit only. Detect the size of the "boot-hartid" in DT and use 32bit or 64bit read appropriately. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Link: https://lore.kernel.org/r/20220527051743.2829940-6-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-07-19riscv: cpu: Add 64bit hartid support on RV64Sunil V L
The hartid can be a 64bit value on RV64 platforms. Add support for 64bit hartid in riscv_of_processor_hartid() and update its callers. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20220527051743.2829940-5-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-07-19drm/panel-edp: Fix variable typo when saving hpd absent delay from DTNícolas F. R. A. Prado
The value read from the "hpd-absent-delay-ms" property in DT was being saved to the wrong variable, overriding the hpd_reliable delay. Fix the typo. Fixes: 5540cf8f3e8d ("drm/panel-edp: Implement generic "edp-panel"s probed by EDID") Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: André Almeida <andrealmeid@igalia.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220719203857.1488831-4-nfraprado@collabora.com
2022-07-19cxl/port: Read CDAT tableIra Weiny
The per-device CDAT data provides performance data that is relevant for mapping which CXL devices can participate in which CXL ranges by QTG (QoS Throttling Group) (per ECN: CXL 2.0 CEDT CFMWS & QTG_DSM) [1]. The QTG association specified in the ECN is advisory. Until the cxl_acpi driver grows support for invoking the QTG _DSM method the CDAT data is only of interest to userspace that may need it for debug purposes. Search the DOE mailboxes available, query CDAT data, cache the data and make it available via a sysfs binary attribute per endpoint at: /sys/bus/cxl/devices/endpointX/CDAT ...similar to other ACPI-structured table data in /sys/firmware/ACPI/tables. The CDAT is relative to 'struct cxl_port' objects since switches in addition to endpoints can host a CDAT instance. Switch CDAT support is not implemented. This does not support table updates at runtime. It will always provide whatever was there when first cached. It is also the case that table updates are not expected outside of explicit DPA address map affecting commands like Set Partition with the immediate flag set. Given that the driver does not support Set Partition with the immediate flag set there is no current need for update support. Link: https://www.computeexpresslink.org/spec-landing [1] Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Co-developed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> [djbw: drop in-kernel parsing infra for now, and other minor fixups] Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20220719205249.566684-7-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19cxl/pci: Create PCI DOE mailbox's for memory devicesIra Weiny
DOE mailbox objects will be needed for various mailbox communications with each memory device. Iterate each DOE mailbox capability and create PCI DOE mailbox objects as found. It is not anticipated that this is the final resting place for the iteration of the DOE devices. The support of switch ports will drive this code into the PCIe side. In this imagined architecture the CXL port driver would then query into the PCI device for the DOE mailbox array. For now creating the mailboxes in the CXL port is good enough for the endpoints. Later PCIe ports will need to support this to support switch ports more generically. Cc: Dan Williams <dan.j.williams@intel.com> Cc: Davidlohr Bueso <dave@stgolabs.net> Cc: Lukas Wunner <lukas@wunner.de> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/20220719205249.566684-5-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19PCI/DOE: Add DOE mailbox support functionsJonathan Cameron
Introduced in a PCIe r6.0, sec 6.30, DOE provides a config space based mailbox with standard protocol discovery. Each mailbox is accessed through a DOE Extended Capability. Each DOE mailbox must support the DOE discovery protocol in addition to any number of additional protocols. Define core PCIe functionality to manage a single PCIe DOE mailbox at a defined config space offset. Functionality includes iterating, creating, query of supported protocol, and task submission. Destruction of the mailboxes is device managed. Cc: "Li, Ming" <ming4.li@intel.com> Cc: Bjorn Helgaas <helgaas@kernel.org> Cc: Matthew Wilcox <willy@infradead.org> Acked-by: Bjorn Helgaas <helgaas@kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Co-developed-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/20220719205249.566684-4-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19PCI: Replace magic constant for PCI Sig Vendor IDIra Weiny
Replace the magic value in pci_bus_crs_vendor_id() with PCI_VENDOR_ID_PCI_SIG. Reviewed-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Davidlohr Bueso <dave@stgolabs.net> Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/20220719205249.566684-3-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-19of: overlay: Simplify of_overlay_fdt_apply() tailGeert Uytterhoeven
It does not hurt to fill in the changeset id while the mutex is still held. After doing so, the function tails for the success and failure cases become identical, so they can be unified. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Frank Rowand <frank.rowand@sony.com> Tested-by: Frank Rowand <frank.rowand@sony.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/6a3357a8f7f29704350e3ffae768ee8a462b54d3.1657893306.git.geert+renesas@glider.be
2022-07-19of: overlay: Move devicetree_corrupt() check upGeert Uytterhoeven
There is no point in doing several preparatory steps in of_overlay_fdt_apply(), only to see of_overlay_apply() return early because of a corrupt device tree. Move the check for a corrupt device tree from of_overlay_apply() to of_overlay_fdt_apply(), to check for this as early as possible. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Frank Rowand <frank.rowand@sony.com> Tested-by: Frank Rowand <frank.rowand@sony.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/c91ce7112eb5167ea46a43d8a980e76b920010ba.1657893306.git.geert+renesas@glider.be
2022-07-19sfc: update MCDI protocol headersEdward Cree
Link: https://lore.kernel.org/r/cover.1657878101.git.ecree.xilinx@gmail.com Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19net/mlx5: CT: Remove warning of ignore_flow_level support for non PFRoi Dayan
ignore_flow_level isn't supported for SFs, and so it causes post_act and ct to warn about it per SF. Apply the warning only for PF. Signed-off-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: Add resiliency for PTP TX port timestampAya Levin
PTP TX port timestamp relies on receiving 2 CQEs for each outgoing packet (WQE). The regular CQE has a less accurate timestamp than the wire CQE. On link change, the wire CQE may get lost. Let the driver detect and restore the relation between the CQEs, and re-sync after timeout. Add resiliency for this as follows: add id (producer counter) into the WQE's metadata. This id will be received in the wire CQE (in wqe_counter field). On handling the wire CQE, if there is no match, replay the PTP application with the time-stamp from the regular CQE and restore the sync between the CQEs and their SKBs. This patch adds 2 ptp counters: 1) ptp_cq0_resync_event: number of times a mismatch was detected between the regular CQE and the wire CQE. 2) ptp_cq0_resync_cqe: total amount of missing wire CQEs. Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: HTB, move htb functions to a new fileMoshe Tal
Move htb related functions and data to a separated file for better encapsulation. Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: HTB, change functions name to follow conventionMoshe Tal
Following the change of the functions to be object like, change also the names. Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: HTB, remove priv from htb function callsMoshe Tal
As a step to make htb self-contained replace the passing of priv as a parameter to htb function calls with members in the htb struct. Full decoupling the htb from priv will require more work, so for now leave the priv as one of the members in the htb struct, to be replaced by channels in a future commit. Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: HTB, hide and dynamically allocate mlx5e_htb structureSaeed Mahameed
Move structure mlx5e_htb from the main driver include file "en.h" to be hidden in qos.c where the qos functionality is implemented, forward declare it for the rest of the driver and allocate it dynamically upon user demand only. Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com>
2022-07-19net/mlx5e: HTB, move stats and max_sqs to privMoshe Tal
Preparation for dynamic allocation of the HTB struct. The statistics should be preserved even when the struct is de-allocated. Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: HTB, move section comment to the right placeMoshe Tal
mlx5e_get_qos_sq is a part of the SQ lifecycle, so need be under the title. Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: HTB, move ids to selq_params structMoshe Tal
HTB id fields are needed for selecting queue. Moving them to the selq_params struct will simplify synchronization between control flow and mlx5e_select_queues and will keep the IDs in the hot cacheline of mlx5e_selq_params. Replace mlx5e_selq_prepare() with separate functions that change subsets of parameters, while keeping the rest. This also will be useful to hide mlx5e_htb structure from the rest of the driver in a later patch in this series. Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com>
2022-07-19net/mlx5e: HTB, reduce visibility of htb functionsSaeed Mahameed
No need to expose all htb tc functions to the main driver file, expose only the master htb tc function mlx5e_htb_setup_tc() which selects the internal "now static" function to call. Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com>
2022-07-19net/mlx5e: Fix mqprio_rl handling on devlink reloadMoshe Tal
Keep mqprio_rl data to params and restore the configuration in case of devlink reload. Change the location of mqprio_rl resources cleanup so it will be done also in reload flow. Also, remove the rl pointer from the params, since this is dynamic object and saved to priv. Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: Report header-data split state through ethtoolGal Pressman
HW-GRO (SHAMPO) packet merger scheme implies header-data split in the driver, report it through the ethtool interface. Signed-off-by: Gal Pressman <gal@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19virt: sev-guest: Pass the appropriate argument type to iounmap()Tom Lendacky
Fix a sparse warning in sev_guest_probe() where the wrong argument type is provided to iounmap(). Fixes: fce96cf04430 ("virt: Add SEV-SNP guest driver") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/202207150617.jqwQ0Rpz-lkp@intel.com
2022-07-19can: peak_usb: include support for a new MCUStephane Grosjean
The CANFD-USB PCAN-USB FD interface undergoes an internal component change that requires a slight modification of its drivers, which leads them to dynamically use endpoint numbers provided by the interface itself. In addition to a change in the calls to the USB functions exported by the kernel, the detection of the USB interface dedicated to CAN must also be modified, as some PEAK-System devices support other interfaces than CAN. Link: https://lore.kernel.org/all/20220719120632.26774-3-s.grosjean@peak-system.com Signed-off-by: Stephane Grosjean <s.grosjean@peak-system.com> [mkl: add missing cpu_to_le16() conversion] [mkl: fix networking block comment style] Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: peak_usb: correction of an initially misnamed field nameStephane Grosjean
The data structure returned from the USB device contains a number flashed by the user and not the serial number of the device. Link: https://lore.kernel.org/all/20220719120632.26774-2-s.grosjean@peak-system.com Signed-off-by: Stephane Grosjean <s.grosjean@peak-system.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: peak_usb: pcan_dump_mem(): mark input prompt and data pointer as constStephane Grosjean
Mark the input prompt and data pointer as const. Link: https://lore.kernel.org/all/20220719120632.26774-1-s.grosjean@peak-system.com Signed-off-by: Stephane Grosjean <s.grosjean@peak-system.com> [mkl: mark data pointer as const, too; update commit message] Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: ctucanfd: Update CTU CAN FD IP core registers to match version 3.x.Pavel Pisa
The update is compatible/pure extension of 2.x IP core version - new option for 2, 4, or 8 Tx buffers option during synthesis. The 2.x version has fixed 4 Tx buffers. 3.x version default is 4 as well - new REG_TX_COMMAND_TXT_BUFFER_COUNT provides synthesis choice. When read as 0 assume 2.x core with fixed 4 Tx buffers. - new REG_ERR_CAPT_TS_BITS field to provide most significant active/implemented timestamp bit. For 2.x read as zero, assume value 63 is such case for 64 bit counter. - new REG_MODE_RXBAM bit which controls automatic advance to next word after Rx FIFO register read. Bit is set to 1 by default after the core reset (REG_MODE_RST) and value 1 has to be preserved for the normal ctucanfd Linux driver operation. Even preceding driver version resets core and then modifies only known/required MODE register bits so backward and forward compatibility is ensured. See complete datasheet for time-triggered and other updated capabilities http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf The fields related to ongoing Ondrej Ille's work on fault tolerant version with parity protected buffers and FIFOs are not included for now. Their inclusion will be considered when design is settled and tested. Link: https://lore.kernel.org/all/14a98ed1829121f0f3bde784f1aa533bc3cc7fe0.1658139843.git.pisa@cmp.felk.cvut.cz Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: c_can: remove wrong commentDario Binacchi
The comment referred to a status (warning) other than the one that was being managed (active error). Link: https://lore.kernel.org/all/20220716170112.2020291-1-dario.binacchi@amarulasolutions.com Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: slcan: do not sleep with a spin lock heldDario Binacchi
We can't call close_candev() with a spin lock held, so release the lock before calling it. After calling close_candev(), we can update the fields of the private `struct can_priv' without having to acquire the lock. Fixes: c4e54b063f42f ("can: slcan: use CAN network device driver API") Link: https://lore.kernel.org/linux-kernel/Ysrf1Yc5DaRGN1WE@xsang-OptiPlex-9020/ Link: https://lore.kernel.org/all/20220715072951.859586-1-dario.binacchi@amarulasolutions.com Reported-by: kernel test robot <oliver.sang@intel.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: sja1000: Change the return type as void for SoC specific initBiju Das
Change the return type as void for SoC specific init function as it always return 0. Link: https://lore.kernel.org/all/20220710115248.190280-6-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: sja1000: Use device_get_match_data to get device dataBiju Das
This patch replaces of_match_device->device_get_match_data to get pointer to device data. Link: https://lore.kernel.org/all/20220710115248.190280-5-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: sja1000: Add Quirk for RZ/N1 SJA1000 CAN controllerBiju Das
As per Chapter 6.5.16 of the RZ/N1 Peripheral Manual, The SJA1000 CAN controller does not support Clock Divider Register compared to the reference Philips SJA1000 device. This patch adds a device quirk to handle this difference. Link: https://lore.kernel.org/all/20220710115248.190280-4-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: slcan: clean up if/elseMarc Kleine-Budde
Remove braces after if() for single statement blocks, also remove else after return() in if() block. Link: https://lore.kernel.org/all/20220704125954.1587880-6-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
generated by cgit (git 2.34.1) at 2025-09-22 19:46:40 +0000