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2025-05-14mmc: sdhci-esdhc-imx: calculate data timeout value based on clockLuke Wang
Calculate data timeout value based on clock instead of using max value. Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com> Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20250409072604.3410459-1-ziniu.wang_1@nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: rename mmc_can_gpio_ro() to mmc_host_can_gpio_ro()Wolfram Sang
mmc_can_* functions sometimes relate to the card and sometimes to the host. Make it obvious by renaming this function to include 'host'. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250401095847.29271-12-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: rename mmc_can_gpio_cd() to mmc_host_can_gpio_cd()Wolfram Sang
mmc_can_* functions sometimes relate to the card and sometimes to the host. Make it obvious by renaming this function to include 'host'. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250401095847.29271-11-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: rename mmc_can_trim() to mmc_card_can_trim()Wolfram Sang
mmc_can_* functions sometimes relate to the card and sometimes to the host. Make it obvious by renaming this function to include 'card'. Also, convert to proper bool type while we are here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250401095847.29271-10-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: rename mmc_can_sleep() to mmc_card_can_sleep()Wolfram Sang
mmc_can_* functions sometimes relate to the card and sometimes to the host. Make it obvious by renaming this function to include 'card'. Also, convert to proper bool type while we are here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250401095847.29271-9-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: rename mmc_can_secure_erase_trim() to mmc_card_can_secure_erase_trim()Wolfram Sang
mmc_can_* functions sometimes relate to the card and sometimes to the host. Make it obvious by renaming this function to include 'card'. Also, convert to proper bool type while we are here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250401095847.29271-8-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: rename mmc_can_sanitize() to mmc_card_can_sanitize()Wolfram Sang
mmc_can_* functions sometimes relate to the card and sometimes to the host. Make it obvious by renaming this function to include 'card'. Also, convert to proper bool type while we are here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250401095847.29271-7-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: rename mmc_can_reset() to mmc_card_can_reset()Wolfram Sang
mmc_can_* functions sometimes relate to the card and sometimes to the host. Make it obvious by renaming this function to include 'card'. Also, convert to proper bool type while we are here. Conversion was simplified by inverting the logic. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250401095847.29271-6-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: rename mmc_can_poweroff_notify() to mmc_card_can_poweroff_notify()Wolfram Sang
mmc_can_* functions sometimes relate to the card and sometimes to the host. Make it obvious by renaming this function to include 'card'. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250401095847.29271-5-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: rename mmc_can_ext_csd() to mmc_card_can_ext_csd()Wolfram Sang
mmc_can_* functions sometimes relate to the card and sometimes to the host. Make it obvious by renaming this function to include 'card'. Also, convert to proper bool type while we are here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250401095847.29271-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: rename mmc_can_erase() to mmc_card_can_erase()Wolfram Sang
mmc_can_* functions sometimes relate to the card and sometimes to the host. Make it obvious by renaming this function to include 'card'. Also, convert to proper bool type while we are here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250401095847.29271-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: rename mmc_can_discard() to mmc_card_can_discard()Wolfram Sang
mmc_can_* functions sometimes relate to the card and sometimes to the host. Make it obvious by renaming this function to include 'card'. Also, convert to proper bool type while we are here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250401095847.29271-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: alcor: Use str_read_write() helperFeng Wei
Remove hard-coded strings by using the str_read_write() helper. Signed-off-by: Feng Wei <feng.wei8@zte.com.cn> Signed-off-by: Shao Mingyin <shao.mingyin@zte.com.cn> Link: https://lore.kernel.org/r/20250401195751834zbm34YDvwPeQf7ooZBCdh@zte.com.cn Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: renesas_sdhi: Use of_get_available_child_by_name()Biju Das
Use the helper of_get_available_child_by_name() to simplify renesas_sdhi_probe(). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250407092144.35268-1-biju.das.jz@bp.renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: mtk-sd: Aggregate R/W for top_base iospace case where possibleAngeloGioacchino Del Regno
In case the controller uses the top_base iospace, most register read/writes can be changed from multiple RWs to a single read and a single write. Where possible, and where it makes sense, aggregate the multiple reads and writes to just one. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250325110701.52623-5-angelogioacchino.delregno@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: mtk-sd: Do single write in function msdc_new_tx_settingAngeloGioacchino Del Regno
Instead of reading and writing the LOOP_TEST_CONTROL register for each set or cleared bit, read it once, modify the contents in a local variable, and then write once. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250325110701.52623-4-angelogioacchino.delregno@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: mtk-sd: Aggregate writes for MSDC_PATCH_BIT1/2 setupAngeloGioacchino Del Regno
Instead of continuously reading and writing to the patch bit 1/2 registers, prepare the final values to write to those and write just once per register during the setup phase. This makes the driver slightly smaller and also slightly improves the execution time of the msdc_init_hw function, called not only at probe time, but also when resuming from system suspend. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250325110701.52623-3-angelogioacchino.delregno@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: mtk-sd: Clarify patch bit register initialization and layoutAngeloGioacchino Del Regno
In preparation for cleaning up the msdc_init_hw register setting for the patch bit registers, add the necessary definitions for bits in the MSDC_PATCH_BIT and MSDC_PATCH_BIT1 registers and use them in place of "magic numbers" writes during initialization. This commit brings no functional differences. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250325110701.52623-2-angelogioacchino.delregno@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: sdhci-esdhc-imx: Save tuning value when card stays powered in suspendLuke Wang
For SoCs like i.MX6UL(L/Z) and i.MX7D, USDHC powers off completely during system power management (PM), causing the internal tuning status to be lost. To address this, save the tuning value when system suspend and restore it for any command issued after system resume when re-tuning is held. A typical case involves SDIO WiFi devices with the MMC_PM_KEEP_POWER and MMC_PM_WAKE_SDIO_IRQ flag, which retain power during system PM. To conserve power, WiFi switches to 1-bit mode and restores 4-bit mode upon resume. As per the specification, tuning commands are not supported in 1-bit mode. When sending CMD52 to restore 4-bit mode, re-tuning must be held. However, CMD52 still requires a correct sample point to avoid CRC errors, necessitating preservation of the previous tuning value. Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20250328112517.2624806-1-ziniu.wang_1@nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: core: Add support for graceful host removal for SDUlf Hansson
An mmc host driver may allow to unbind from its corresponding host device. If an SD card is attached to the host, the mmc core will just try to cut the power for it, without obeying to the SD spec that potentially may damage the card. Let's fix this problem by implementing a graceful power-down of the card at host removal. Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20250407152759.25160-6-ulf.hansson@linaro.org
2025-05-14mmc: core: Add support for graceful host removal for eMMCUlf Hansson
An mmc host driver may allow to unbind from its corresponding host device. If an eMMC card is attached to the host, the mmc core will just try to cut the power for it, without obeying to the eMMC spec. Potentially this may damage the card and it may also prevent us from successfully doing a re-initialization of it, which would typically happen if/when we try to re-bind the mmc host driver. To fix these problems, let's implement a graceful power-down of the card at host removal. Reported-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20250407152759.25160-5-ulf.hansson@linaro.org
2025-05-14mmc: core: Convert into an enum for the poweroff-type for eMMCUlf Hansson
Currently we are only distinguishing between the suspend and the shutdown scenarios, which make a bool sufficient as in-parameter to the various PM functions for eMMC. However, to prepare for adding support for another scenario in a subsequent change, let's convert into using an enum. Suggested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20250407152759.25160-4-ulf.hansson@linaro.org
2025-05-14mmc: core: Further avoid re-storing power to the eMMC before a shutdownUlf Hansson
To manage a graceful power-off of the eMMC card during platform shutdown, the prioritized option is to use the poweroff-notification command, if the eMMC card supports it. During a suspend request we may decide to fall back to use the sleep command, instead of the poweroff-notification, unless the mmc host supports a complete power-cycle of the eMMC. For this reason, we may need to restore power and re-initialize the card, if it remains suspended when a shutdown request is received. However, the current condition to restore power and re-initialize the card doesn't take into account MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND properly. This may lead to doing a re-initialization when it really isn't needed, as the eMMC may already have been powered-off using the poweroff-notification command. Let's fix the condition to avoid this. Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20250407152759.25160-3-ulf.hansson@linaro.org
2025-05-14mmc: core: Convert mmc_can_poweroff_notify() into a boolUlf Hansson
It's really a true/false value that matters, let's make it clear by returning a bool instead. Reviewed-by: Avri Altman <avri.altman@sandisk.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20250407152759.25160-2-ulf.hansson@linaro.org
2025-05-14mmc: Add quirk to disable DDR50 tuningErick Shepherd
Adds the MMC_QUIRK_NO_UHS_DDR50_TUNING quirk and updates mmc_execute_tuning() to return 0 if that quirk is set. This fixes an issue on certain Swissbit SD cards that do not support DDR50 tuning where tuning requests caused I/O errors to be thrown. Signed-off-by: Erick Shepherd <erick.shepherd@ni.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20250331221337.1414534-1-erick.shepherd@ni.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14mmc: renesas_sdhi: improve registering irqsWolfram Sang
The probe() function is convoluted enough, so merge sanity checks for number of irqs into one place. Also, change the error code for 'no irq' because ENXIO will not print a warning from the driver core. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250331064400.16677-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-14dmaengine: sh: rz-dmac: Add RZ/V2H(P) supportFabrizio Castro
The DMAC IP found on the Renesas RZ/V2H(P) family of SoCs is similar to the version found on the Renesas RZ/G2L family of SoCs, but there are some differences: * It only uses one register area * It only uses one clock * It only uses one reset * Instead of using MID/IRD it uses REQ No * It is connected to the Interrupt Control Unit (ICU) * On the RZ/G2L there is only 1 DMAC, on the RZ/V2H(P) there are 5 Add specific support for the Renesas RZ/V2H(P) family of SoC by tackling the aforementioned differences. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250423143422.3747702-6-fabrizio.castro.jz@renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: sh: rz-dmac: Allow for multiple DMACsFabrizio Castro
dma_request_channel() calls into __dma_request_channel() with NULL as value for np, which won't allow for the selection of the correct DMAC when multiple DMACs are available. Switch to using __dma_request_channel() directly so that we can choose the desired DMA for the channel. This is in preparation of adding DMAC support for the Renesas RZ/V2H(P) and similar SoCs. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250423143422.3747702-5-fabrizio.castro.jz@renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14irqchip/renesas-rzv2h: Add rzv2h_icu_register_dma_req()Fabrizio Castro
On the Renesas RZ/V2H(P) family of SoCs, DMAC IPs are connected to the Interrupt Control Unit (ICU). For DMA transfers, a request number must be registered with the ICU, which means that the DMAC driver has to be able to instruct the ICU driver with the registration of such id. Export rzv2h_icu_register_dma_req() so that the DMAC driver can register the DMAC request number. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250423143422.3747702-4-fabrizio.castro.jz@renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: idxd: Narrow the restriction on BATCH to ver. 1 onlyVinicius Costa Gomes
Allow BATCH operations to be submitted and the capability to be exposed for DSA version 2 (or later) devices. DSA version 2 devices allow safe submission of BATCH operations. Signed-off-by: Anil Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reported-by: Yi Sun <yi.sun@intel.com> Tested-by: Yi Sun <yi.sun@intel.com> Link: https://lore.kernel.org/r/20250312221511.277954-1-vinicius.gomes@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: ti: Add NULL check in udma_probe()Henry Martin
devm_kasprintf() returns NULL when memory allocation fails. Currently, udma_probe() does not check for this case, which results in a NULL pointer dereference. Add NULL check after devm_kasprintf() to prevent this issue. Fixes: 25dcb5dd7b7c ("dmaengine: ti: New driver for K3 UDMA") Signed-off-by: Henry Martin <bsdhenrymartin@gmail.com> Reviewed-by: Nathan Lynch <nathan.lynch@amd.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Link: https://lore.kernel.org/r/20250402023900.43440-1-bsdhenrymartin@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14fsldma: Set correct dma_mask based on hw capabilityBen Collins
The driver currently hardcodes DMA_BIT_MASK to 36-bits, which is only correct on eloplus: elo3 supports 40-bits eloplus supports 36-bits elo supports 32-bits This is based on 0x08 cdar register documention in the respective reference manuals. Set the dma mask accordingly. Feedback from Arnd Bergmann: - Use match data to set address bit mask Signed-off-by: Ben Collins <bcollins@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Vinod Koul <vkoul@kernel.org> Cc: linuxppc-dev@lists.ozlabs.org Cc: dmaengine@vger.kernel.org Cc: linux-kernel@vger.kernel.org Link: https://lore.kernel.org/r/2025050513-complex-crane-2babb6@boujee-and-buff Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14irqchip: Drop MSI_CHIP_FLAG_SET_ACK from unsuspecting MSI driversMarc Zyngier
Commit 1c000dcaad2be ("irqchip/irq-msi-lib: Optionally set default irq_eoi()/irq_ack()") added blanket MSI_CHIP_FLAG_SET_ACK flags, irrespective of whether the underlying irqchip required it or not. Drop it from a number of drivers that do not require it. Fixes: 1c000dcaad2be ("irqchip/irq-msi-lib: Optionally set default irq_eoi()/irq_ack()") Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20250513172819.2216709-6-maz@kernel.org
2025-05-14dmaengine: fsl-edma: Fix return code for unhandled interruptsStefan Wahren
For fsl,imx93-edma4 two DMA channels share the same interrupt. So in case fsl_edma3_tx_handler is called for the "wrong" channel, the return code must be IRQ_NONE. This signalize that the interrupt wasn't handled. Fixes: 72f5801a4e2b ("dmaengine: fsl-edma: integrate v3 support") Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Joy Zou <joy.zou@nxp.com> Link: https://lore.kernel.org/r/20250424114829.9055-1-wahrenst@gmx.net Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: mediatek: Fix a possible deadlock error in mtk_cqdma_tx_status()Qiu-ji Chen
Fix a potential deadlock bug. Observe that in the mtk-cqdma.c file, functions like mtk_cqdma_issue_pending() and mtk_cqdma_free_active_desc() properly acquire the pc lock before the vc lock when handling pc and vc fields. However, mtk_cqdma_tx_status() violates this order by first acquiring the vc lock before invoking mtk_cqdma_find_active_desc(), which subsequently takes the pc lock. This reversed locking sequence (vc → pc) contradicts the established pc → vc order and creates deadlock risks. Fix the issue by moving the vc lock acquisition code from mtk_cqdma_find_active_desc() to mtk_cqdma_tx_status(). Ensure the pc lock is acquired before the vc lock in the calling function to maintain correct locking hierarchy. Note that since mtk_cqdma_find_active_desc() is a static function with only one caller (mtk_cqdma_tx_status()), this modification safely eliminates the deadlock possibility without affecting other components. This possible bug is found by an experimental static analysis tool developed by our team. This tool analyzes the locking APIs to extract function pairs that can be concurrently executed, and then analyzes the instructions in the paired functions to identify possible concurrency bugs including deadlocks, data races and atomicity violations. Fixes: b1f01e48df5a ("dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for MT6765 SoC") Cc: stable@vger.kernel.org Signed-off-by: Qiu-ji Chen <chenqiuji666@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250508073634.3719-1-chenqiuji666@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: idxd: Fix ->poll() return valueDave Jiang
The fix to block access from different address space did not return a correct value for ->poll() change. kernel test bot reported that a return value of type __poll_t is expected rather than int. Fix to return POLLNVAL to indicate invalid request. Fixes: 8dfa57aabff6 ("dmaengine: idxd: Fix allowing write() from different address spaces") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202505081851.rwD7jVxg-lkp@intel.com/ Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20250508170548.2747425-1-dave.jiang@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: idxd: Check availability of workqueue allocated by idxd wq driver ↵Yi Sun
before using Running IDXD workloads in a container with the /dev directory mounted can trigger a call trace or even a kernel panic when the parent process of the container is terminated. This issue occurs because, under certain configurations, Docker does not properly propagate the mount replica back to the original mount point. In this case, when the user driver detaches, the WQ is destroyed but it still calls destroy_workqueue() attempting to completes all pending work. It's necessary to check wq->wq and skip the drain if it no longer exists. Signed-off-by: Yi Sun <yi.sun@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Link: https://lore.kernel.org/r/20250509000304.1402863-1-yi.sun@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: xilinx_dma: Set dma_device directionsThomas Gessler
Coalesce the direction bits from the enabled TX and/or RX channels into the directions bit mask of dma_device. Without this mask set, dma_get_slave_caps() in the DMAEngine fails, which prevents the driver from being used with an IIO DMAEngine buffer. Signed-off-by: Thomas Gessler <thomas.gessler@brueckmann-gmbh.de> Reviewed-by: Suraj Gupta <suraj.gupta2@amd.com> Tested-by: Folker Schwesinger <dev@folker-schwesinger.de> Link: https://lore.kernel.org/r/20250507182101.909010-1-thomas.gessler@brueckmann-gmbh.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: tegra210-adma: Add Tegra264 supportSheetal
Add Tegra264 ADMA support with following changes: - Add soc_data for Tegra264-specific variations. - Tegra264 supports 64 channels and 10 pages, hence update the global page configuration. - In Tegra264 FIFO and outstanding request configs are moved to global registers, hence add those registers offset in adma channel struct. Also, 'has_outstanding_reqs' is removed and configuration moved to the SoC data. - Update channel direction and mode bit positions as per Tegra264. - Register offsets are updated to align with Tegra264. Signed-off-by: Sheetal <sheetal@nvidia.com> Link: https://lore.kernel.org/r/20250512050010.1025259-3-sheetal@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: dw-edma: Add HDMA NATIVE map checkDevendra K Verma
The HDMA IP supports the HDMA_NATIVE map format as part of Vendor-Specific Extended Capability. Added the check for HDMA_NATIVE map format. The check for map format enables the IP specific function invocation during the DMA ops. Signed-off-by: Devendra K Verma <devverma@amd.com> Link: https://lore.kernel.org/r/20250513070314.577823-1-devverma@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: idxd: Refactor remove call with idxd_cleanup() helperShuai Xue
The idxd_cleanup() helper cleans up perfmon, interrupts, internals and so on. Refactor remove call with the idxd_cleanup() helper to avoid code duplication. Note, this also fixes the missing put_device() for idxd groups, enginces and wqs. Fixes: bfe1d56091c1 ("dmaengine: idxd: Init and probe for Intel data accelerators") Cc: stable@vger.kernel.org Suggested-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20250404120217.48772-10-xueshuai@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: idxd: Add missing idxd cleanup to fix memory leak in remove callShuai Xue
The remove call stack is missing idxd cleanup to free bitmap, ida and the idxd_device. Call idxd_free() helper routines to make sure we exit gracefully. Fixes: bfe1d56091c1 ("dmaengine: idxd: Init and probe for Intel data accelerators") Cc: stable@vger.kernel.org Suggested-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20250404120217.48772-9-xueshuai@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: idxd: fix memory leak in error handling path of idxd_pci_probeShuai Xue
Memory allocated for idxd is not freed if an error occurs during idxd_pci_probe(). To fix it, free the allocated memory in the reverse order of allocation before exiting the function in case of an error. Fixes: bfe1d56091c1 ("dmaengine: idxd: Init and probe for Intel data accelerators") Cc: stable@vger.kernel.org Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Link: https://lore.kernel.org/r/20250404120217.48772-8-xueshuai@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: idxd: fix memory leak in error handling path of idxd_allocShuai Xue
Memory allocated for idxd is not freed if an error occurs during idxd_alloc(). To fix it, free the allocated memory in the reverse order of allocation before exiting the function in case of an error. Fixes: a8563a33a5e2 ("dmanegine: idxd: reformat opcap output to match bitmap_parse() input") Cc: stable@vger.kernel.org Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Link: https://lore.kernel.org/r/20250404120217.48772-7-xueshuai@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: idxd: Add missing cleanups in cleanup internalsShuai Xue
The idxd_cleanup_internals() function only decreases the reference count of groups, engines, and wqs but is missing the step to release memory resources. To fix this, use the cleanup helper to properly release the memory resources. Fixes: ddf742d4f3f1 ("dmaengine: idxd: Add missing cleanup for early error out in probe call") Cc: stable@vger.kernel.org Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20250404120217.48772-6-xueshuai@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: idxd: Add missing cleanup for early error out in idxd_setup_internalsShuai Xue
The idxd_setup_internals() is missing some cleanup when things fail in the middle. Add the appropriate cleanup routines: - cleanup groups - cleanup enginces - cleanup wqs to make sure it exits gracefully. Fixes: defe49f96012 ("dmaengine: idxd: fix group conf_dev lifetime") Cc: stable@vger.kernel.org Suggested-by: Fenghua Yu <fenghuay@nvidia.com> Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20250404120217.48772-5-xueshuai@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: idxd: fix memory leak in error handling path of idxd_setup_groupsShuai Xue
Memory allocated for groups is not freed if an error occurs during idxd_setup_groups(). To fix it, free the allocated memory in the reverse order of allocation before exiting the function in case of an error. Fixes: defe49f96012 ("dmaengine: idxd: fix group conf_dev lifetime") Cc: stable@vger.kernel.org Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Link: https://lore.kernel.org/r/20250404120217.48772-4-xueshuai@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: idxd: fix memory leak in error handling path of idxd_setup_enginesShuai Xue
Memory allocated for engines is not freed if an error occurs during idxd_setup_engines(). To fix it, free the allocated memory in the reverse order of allocation before exiting the function in case of an error. Fixes: 75b911309060 ("dmaengine: idxd: fix engine conf_dev lifetime") Cc: stable@vger.kernel.org Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Link: https://lore.kernel.org/r/20250404120217.48772-3-xueshuai@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dmaengine: idxd: fix memory leak in error handling path of idxd_setup_wqsShuai Xue
Memory allocated for wqs is not freed if an error occurs during idxd_setup_wqs(). To fix it, free the allocated memory in the reverse order of allocation before exiting the function in case of an error. Fixes: 7c5dd23e57c1 ("dmaengine: idxd: fix wq conf_dev 'struct device' lifetime") Fixes: 700af3a0a26c ("dmaengine: idxd: add 'struct idxd_dev' as wrapper for conf_dev") Fixes: de5819b99489 ("dmaengine: idxd: track enabled workqueues in bitmap") Fixes: b0325aefd398 ("dmaengine: idxd: add WQ operation cap restriction support") Cc: stable@vger.kernel.org Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Link: https://lore.kernel.org/r/20250404120217.48772-2-xueshuai@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14dma-buf: insert memory barrier before updating num_fencesHyejeong Choi
smp_store_mb() inserts memory barrier after storing operation. It is different with what the comment is originally aiming so Null pointer dereference can be happened if memory update is reordered. Signed-off-by: Hyejeong Choi <hjeong.choi@samsung.com> Fixes: a590d0fdbaa5 ("dma-buf: Update reservation shared_count after adding the new fence") CC: stable@vger.kernel.org Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://lore.kernel.org/r/20250513020638.GA2329653@au1-maretx-p37.eng.sarc.samsung.com Signed-off-by: Christian König <christian.koenig@amd.com>