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2017-08-29PCI: dwc: Enable write permission for Class Code, Interrupt Pin updatesHou Zhiqiang
dw_pcie_setup_rc() contains fixes to update the Class Code and Interrupt Pin registers, but the fixes don't actually work because these registers are read-only. Enable write permission before updating the Class Code and Interrupt Pin. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com>
2017-08-29PCI: dwc: Add accessors for write permission of DBI read-only registersHou Zhiqiang
The read-only DBI registers can be written only when the "Write to RO Registers Using DBI" (DBI_RO_WR_EN) field of MISC_CONTROL_1_OFF is set. Add accessors to enable and disable write permission, and use them instead of accessing MISC_CONTROL_1_OFF directly. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com>
2017-08-29drm/vmwgfx: Fix F26 Wayland screen update issueSinclair Yeh
vmwgfx currently cannot support non-blocking commit because when vmw_*_crtc_page_flip is called, drm_atomic_nonblocking_commit() schedules the update on a thread. This means vmw_*_crtc_page_flip cannot rely on the new surface being bound before the subsequent dirty and flush operations happen. Cc: <stable@vger.kernel.org> # 4.12.x Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-08-29PCI: layerscape: Disable outbound windows configured by bootloaderHou Zhiqiang
Disable all the outbound windows to avoid one transaction hitting multiple outbound windows. dw_pcie_setup_rc() will reconfigure the outbound windows, which may conflict with windows configured by the bootloader. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com>
2017-08-29PCI: layerscape: Refactor ls1021_pcie_host_init()Hou Zhiqiang
ls1021_pcie_host_init() duplicated the code in the generic ls_pcie_host_init(). Call ls_pcie_host_init() instead of duplicating the code. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com>
2017-08-29power: supply: bq24190_charger: Add power_supply_battery_info supportLiam Breck
Set pre-charge and charge-term current, obtained from power_supply_battery_info. Add sysfs attributes precharge_current & charge_term_current. Cc: Hans de Goede <hdegoede@redhat.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Liam Breck <kernel@networkimprov.net> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2017-08-29power: supply: bq24190_charger: Add property system-minimum-microvoltLiam Breck
Set minimum system voltage limit obtained from device property. Cc: Hans de Goede <hdegoede@redhat.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Liam Breck <kernel@networkimprov.net> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2017-08-29power: supply: bq24190_charger: Enable devicetree configLiam Breck
Add get_config(). Rename set_mode_host() to set_config(). Call get_config() and hw_init() after power_supply_register(). No functional changes. Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Liam Breck <kernel@networkimprov.net> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2017-08-29power: supply: bq27xxx: Remove duplicate chip data arraysLiam Breck
BQ2751X & BQ27510G3 have identical regs & props. BQ2750X & BQ27510G3 have identical props. BQ27500 & BQ27510G1 & BQ27510G2 have identical regs & props. BQ27500 & BQ27520G2 have identical props. Remove the duplicate arrays. No functional changes to the driver. Signed-off-by: Liam Breck <kernel@networkimprov.net> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2017-08-29misc: pci_endpoint_test: Enable/Disable MSI using module paramKishon Vijay Abraham I
In certain platforms like TI's DRA7 SoCs, use of legacy PCI interrupt is exclusive with use of MSI (Section 24.9.4.6.2.1 Legacy PCI Interrupts in http://www.ti.com/lit/ug/spruhz6i/spruhz6i.pdf). However pci_endpoint_test driver enables MSI by default in probe. In order for pci_endpoint_test to be able to test legacy interrupt, MSI should be disabled. Add a module param 'no_msi' to disable MSI (only when legacy interrupt has to be tested). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> [bhelgaas: folded in static fix from Colin Ian King <colin.king@canonical.com>] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29misc: pci_endpoint_test: Avoid using hard-coded BAR sizesKishon Vijay Abraham I
BAR sizes are hard-coded in pci_endpoint_test driver corresponding to the sizes used in pci-epf-test function driver. This might break if the sizes in pci-epf-test function driver are modified (and the corresponding change is not done in pci_endpoint_test PCI driver). To avoid hard coding BAR sizes, use pci_resource_len() API. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29misc: pci_endpoint_test: Add support to not enable MSI interruptsKishon Vijay Abraham I
Some platforms like TI's K2G have a restriction that the host side buffer address should be aligned to either 1MB/2MB/4MB or 8MB addresses depending on how it is configured in the endpoint (Ref: 11.14.4.9.1 Outbound Address Translation in K2G TRM SPRUHY8F January 2016 – Revised May 2017). This restriction also applies to the MSI addresses provided by the RC. However it's not possible for the RC to know about this restriction and it may not provide 1MB/2MB/4MB or 8MB aligned address. So MSI interrupts should be disabled even if the K2G EP has MSI capabiltiy register. Add support to not enable MSI interrupts in pci_endpoint_test driver so that it can be used to test K2G EP. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29misc: pci_endpoint_test: Add support to provide aligned buffer addressesKishon Vijay Abraham I
Some platforms like TI's K2G have a restriction that the host side buffer address should be aligned to either 1MB/2MB/4MB or 8MB (Ref: 11.14.4.9.1 Outbound Address Translation in K2G TRM SPRUHY8F January 2016 – Revised May 2017) addresses depending on how it is configured in the endpoint. Add support to provide such aligned address here so that pci_endpoint_test driver can be used to test K2G EP. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29misc: pci_endpoint_test: Add support for PCI_ENDPOINT_TEST regs to be mapped ↵Kishon Vijay Abraham I
to any BAR pci_endpoint_test driver assumes the PCI_ENDPOINT_TEST registers will always be mapped to BAR_0. This need not always be the case like in TI's K2G where BAR_0 is mapped to PCI controller application registers. Add support so that PCI_ENDPOINT_TEST registers can be mapped to any BAR. Change the bar_size used for BAR test accordingly. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: designware-ep: Do not disable BARs during initializationKishon Vijay Abraham I
Some platforms like K2G has reserved use of BAR_0 which shouldn't be disabled by software. Avoid disabling all BARs during initialization. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: dra7xx: Reset all BARs during initializationKishon Vijay Abraham I
dra7xx has all base address registers (BAR) enabled by default. Reset all BARs during initialization and so that BARs are enabled only if they are actually used. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: dwc: designware: Provide page_size to pci_epc_memKishon Vijay Abraham I
Use the newly introduced __pci_epc_mem_init() instead of pci_epc_mem_init() to provide page_size to pci_epc_mem. This is in preparation for adding EP support to K2G which has a restriction that the address region should be either divided into 1MB/2MB/4MB or 8MB sizes (Ref: 11.14.4.9.1 Outbound Address Translation in K2G TRM SPRUHY8F January 2016 – Revised May 2017). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: endpoint: Remove the ->remove() callbackShawn Lin
epf_test is allocated using devm_kzalloc(). Hence it's not required to explicitly free it in remove() callback. Since ->remove() callback doesn't do anything other than freeing epf_test, remove the ->remove() callback. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: endpoint: Add support to poll early for host commandsKishon Vijay Abraham I
Certain platforms like TI's K2G doesn't support link-up notification. Add support to poll early (without waiting for the linkup notification) for commands from the host. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: endpoint: Add support to use _any_ BAR to map PCI_ENDPOINT_TEST regsKishon Vijay Abraham I
pci_epf_test always maps the PCI_ENDPOINT_TEST registers to BAR_0. But if BAR_0 is reserved for some other purpose (like in TI's K2G BAR_0 is mapped to application registers and cannot be used to map any other regions), PCI_ENDPOINT_TEST registers cannot be mapped making pci_epf_test unusable. Add support to use any BAR to map PCI_ENDPOINT_TEST registers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: endpoint: Do not reset *command* inadvertentlyKishon Vijay Abraham I
pci_epf_test_cmd_handler() is the delayed work function which reads *command* (set by the host) and performs various actions requested by the host periodically. If the value in *command* is '0', it goes to the reset_handler where it resets *command* to '0' and queues pci_epf_test_cmd_handler(). However if the host writes a value to the *command* just after the pci-epf-test driver checks *command* for '0' and before the control goes to reset_handler, the *command* will be reset to '0' and the pci-epf-test driver won't be able to perform the actions requested by the host. Fix it here by not resetting the *command* in the reset_handler. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: endpoint: Add "volatile" to pci_epf_test_regKishon Vijay Abraham I
struct pci_epf_test_reg is the MEMSPACE of pci-epf-test function driver that will be accessed by the "host" for programming the pci-epf-test device. So this structure shouldn't be subjected to compiler optimization in pci_epf_test_cmd_handler() since the values can be changed by code outside the scope of current code at any time. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: endpoint: Add support for configurable page sizeKishon Vijay Abraham I
pci-epc-mem uses a page size equal to *PAGE_SIZE* (usually 4KB) to manage the address space. However certain platforms like TI's K2G have a restriction that this address space should be either divided into 1MB/2MB/4MB or 8MB sizes (Ref: 11.14.4.9.1 Outbound Address Translation in K2G TRM SPRUHY8F January 2016 – Revised May 2017). Add support to handle different page sizes here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: endpoint: Make ->remove() callback optionalKishon Vijay Abraham I
Make ->remove() callback optional so that endpoint function drivers don't have to populate empty ->remove() callback functions. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29i2c: nomadik: constify amba_idArvind Yadav
amba_id are not supposed to change at runtime. All functions working with const amba_id. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29i2c: versatile: Make i2c_algo_bit_data constBhumika Goyal
Make this const as it is only used in a copy operation. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29i2c: busses: make i2c_adapter_quirks constBhumika Goyal
Make these const as they are only stored as a reference in the quirks field of an i2c_adapter structure, which is const. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29PCI: layerscape: Move generic init functions earlier in fileHou Zhiqiang
We will use the generic ls_pcie_link_up() and ls_pcie_host_init() from device-specific routines. Move the generic functions earlier in the file so we won't need forward declarations. This is strictly a code move with no functional change intended. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com>
2017-08-29PCI: layerscape: Add class code and multifunction fixups for ls1021aHou Zhiqiang
The current code depends on class code and multifunction fixups done by the bootloader. Perform these fixups in ls1021_pcie_host_init() to remove this dependency. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com>
2017-08-29PCI: layerscape: Move STRFMR1 access out from the DBI write-enable bracketHou Zhiqiang
The STRFMR1 is not a DBI read-only register, so move it out from the write-enable bracket. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com>
2017-08-29i2c: busses: make i2c_adapter constBhumika Goyal
Make these const as they are only used in a copy operation. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Acked-by: David Daney <david.daney@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29i2c: busses: make i2c_algorithm constBhumika Goyal
Make these const as they are only stored in the algo field of i2c_adapter structure, which is const. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29PCI: layerscape: Call dw_pcie_setup_rc() from ls_pcie_host_init()Hou Zhiqiang
We called dw_pcie_setup_rc() from the ls1021a host init function, but not from the common ls_pcie_host_init() function, so platforms other than ls1021a still depended on initialization by the bootloader. Call dw_pcie_setup_rc() from ls_pcie_host_init() to reduce dependencies on the bootloader. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com>
2017-08-29i2c: ismt: Return EMSGSIZE for block reads with bogus lengthStephen Douthit
Compare the number of bytes actually seen on the wire to the byte count field returned by the slave device. Previously we just overwrote the byte count returned by the slave with the real byte count and let the caller figure out if the message was sane. Signed-off-by: Stephen Douthit <stephend@adiengineering.com> Tested-by: Dan Priamo <danp@adiengineering.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2017-08-29i2c: ismt: Don't duplicate the receive length for block readsStephen Douthit
According to Table 15-14 of the C2000 EDS (Intel doc #510524) the rx data pointed to by the descriptor dptr contains the byte count. desc->rxbytes reports all bytes read on the wire, including the "byte count" byte. So if a device sends 4 bytes in response to a block read, on the wire and in the DMA buffer we see: count data1 data2 data3 data4 0x04 0xde 0xad 0xbe 0xef That's what we want to return in data->block to the next level. Instead we were actually prefixing that with desc->rxbytes: bad count count data1 data2 data3 data4 0x05 0x04 0xde 0xad 0xbe 0xef This was discovered while developing a BMC solution relying on the ipmi_ssif.c driver which was trying to interpret the bogus length field as part of the IPMI response. Signed-off-by: Stephen Douthit <stephend@adiengineering.com> Tested-by: Dan Priamo <danp@adiengineering.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2017-08-29spi: imx: fix use of native chip-selects with devicetreeGreg Ungerer
The commonly used mechanism of specifying the hardware or native chip-select on an SPI device in devicetree (that is "cs-gpios = <0>") does not result in the native chip-select being configured for use. So external SPI devices that require use of the native chip-select will not work. You can successfully specify native chip-selects if using a platform setup by specifying the cs-gpio as negative offset by 32. And that works correctly. You cannot use the same method in devicetree. The logic in the spi-imx.c driver during probe uses core spi function of_spi_register_master() in spi.c to parse the "cs-gpios" devicetree tag. For valid GPIO values that will be recorded for use, all other entries in the cs_gpios list will be set to -ENOENT. So entries like "<0>" will be set to -ENOENT in the cs_gpios list. When the SPI device registers are setup the code will use the GPIO listed in the cs_gpios list for the desired chip-select. If the cs_gpio is less then 0 then it is intended to be for a native chip-select, and its cs_gpio value is added to 32 to get the chipselect number to use. Problem is that with devicetree this can only ever be -ENOENT (which is -2), and that alone results in an invalid chip-select number. But also doesn't allow selection of the native chip-select at all. To fix, if the cs_gpio specified for this spi device is not a valid GPIO then use the "chip_select" (that is the native chip-select number) for hardware setup. Signed-off-by: Greg Ungerer <gerg@linux-m68k.org> Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-30Merge tag 'drm-misc-fixes-2017-08-28' of ↵Dave Airlie
git://anongit.freedesktop.org/git/drm-misc into drm-fixes Driver Changes: - bridge/sii8620: Fix out-of-bounds write to incorrect register Cc: Maciej Purski <m.purski@samsung.com> Cc: Andrzej Hajda <a.hajda@samsung.com> * tag 'drm-misc-fixes-2017-08-28' of git://anongit.freedesktop.org/git/drm-misc: drm/bridge/sii8620: Fix memory corruption
2017-08-29PCI: Warn periodically while waiting for non-CRS ("device ready") statusSinan Kaya
Add a print statement in pci_bus_wait_crs() so that user observes the progress of device polling instead of silently waiting for timeout to be reached. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> [bhelgaas: check for timeout first so we don't print "waiting, giving up", always print time we've slept (not the actual timeout, print a "ready" message if we've printed a "waiting" message] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: Wait up to 60 seconds for device to become ready after FLRSinan Kaya
Sporadic reset issues have been observed with an Intel 750 NVMe drive while assigning the physical function to the guest machine. The sequence of events observed is as follows: - perform a Function Level Reset (FLR) - sleep up to 1000ms total - read ~0 from PCI_COMMAND (CRS completion for config read) - warn that the device didn't return from FLR - touch the device before it's ready - device drops config writes when we restore register settings (there's no mechanism for software to learn about CRS completions for writes) - incomplete register restore leaves device in inconsistent state - device probe fails because device is in inconsistent state After reset, an endpoint may respond to config requests with Configuration Request Retry Status (CRS) to indicate that it is not ready to accept new requests. See PCIe r3.1, sec 2.3.1 and 6.6.2. Increase the timeout value from 1 second to 60 seconds to cover the period where device responds with CRS and also report polling progress. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> [bhelgaas: include the mandatory 100ms in the delays we print] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: Factor out pci_bus_wait_crs()Sinan Kaya
Configuration Request Retry Status (CRS) was previously hidden inside pci_bus_read_dev_vendor_id(). We want to add support for CRS in other situations, such as waiting for a device to become ready after a Function Level Reset. Move CRS handling into pci_bus_wait_crs() so it can be called from other places. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> [bhelgaas: pass pointer, not value, to pci_bus_wait_crs() so caller gets correct Vendor ID] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: Add pci_bus_crs_vendor_id() to detect CRS response dataSinan Kaya
Add pci_bus_crs_vendor_id() to determine whether data returned for a config read of the Vendor ID indicates a Configuration Request Retry Status (CRS) response. Per PCIe r3.1, sec 2.3.2, this data is only returned if: - CRS Software Visibility is enabled, - a config read includes both bytes of the Vendor ID, and - the read receives a CRS completion Signed-off-by: Sinan Kaya <okaya@codeaurora.org> [bhelgaas: changelog, change name to pci_bus_crs_vendor_id(), make static in probe.c, use it in pci_bus_read_dev_vendor_id()] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29PCI: Always check for non-CRS response before timeoutBjorn Helgaas
While waiting for a device to become ready (i.e., to return a non-CRS completion to a read of its Vendor ID), if we got a valid response to the very last read before timing out, we printed a warning and gave up on the device even though it was actually ready. For a typical 60s timeout, we wait about 65s (it's not exact because of the exponential backoff), but we treated devices that became ready between 33s and 65s as though they failed. Move the Device ID read later so we check whether the device is ready before checking for a timeout. Thanks to Sinan Kaya <okaya@codeaurora.org>, reorder reads so we always check device presence after sleep, since it's pointless to sleep unless we recheck afterwards. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29leds: gpio: Allow LED to retain state at shutdownAndrew Jeffery
In some systems, such as Baseboard Management Controllers (BMCs), we want to retain the state of LEDs across a reboot of the BMC (whilst the host remains up). Implement support for the retain-state-shutdown devicetree property in leds-gpio. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Pavel Machek <pavel@ucw.cz> Tested-by: Brandon Wyman <bjwyman@gmail.com> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
2017-08-29leds: powernv: Delete an error message for a failed memory allocation in ↵Markus Elfring
powernv_led_create() Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
2017-08-29leds: lp8501: make several arrays static constColin Ian King
Don't populate the arrays on the stack, instead make them static const. Makes the object code smaller by 50 bytes: Before: text data bss dec hex filename 5058 1552 64 6674 1a12 drivers/leds/leds-lp8501.o After: text data bss dec hex filename 4788 1776 64 6628 19e4 drivers/leds/leds-lp8501.o Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
2017-08-29leds: lp5562: make several arrays static constColin Ian King
Don't populate the arrays on the stack, instead make them static const. Makes the object code smaller by over 150 bytes: Before: text data bss dec hex filename 7725 2448 64 10237 27fd drivers/leds/leds-lp5562.o After: text data bss dec hex filename 7184 2832 64 10080 2760 drivers/leds/leds-lp5562.o Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
2017-08-29leds: lp5521: make several arrays static constColin Ian King
Don't populate the arrays on the stack, instead make them static const. Makes the object code smaller by over 120 bytes: Before: text data bss dec hex filename 8999 4176 64 13239 33b7 drivers/leds/leds-lp5521.o After: text data bss dec hex filename 8554 4496 64 13114 333a drivers/leds/leds-lp5521.o Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
2017-08-29leds: aat1290: make array max_mm_current_percent static constColin Ian King
Don't populate the array max_mm_current_percent on the stack, instead make it static const. Makes the object code smaller by over 280 bytes: Before: text data bss dec hex filename 7225 1936 64 9225 2409 ./drivers/leds/leds-aat1290.o After: text data bss dec hex filename 6847 2032 64 8943 22ef ./drivers/leds/leds-aat1290.o` Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
2017-08-29leds: pca955x: Prevent crippled LED device nameJacek Anaszewski
In case platform data provided empty LED name string the resulting LED class device name would be crippled. Use corresponding LED chip bit in place of "function" segment of LED class device name then to make the LEDs at least distinguishable. Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com> Reported-by: Colin King <colin.king@canonical.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Suggested-by: Nate Case <ncase@xes-inc.com>
2017-08-29leds: lm3533: constify attribute_group structureAmitoj Kaur Chawla
Functions working with attribute_groups provided by <linux/device.h> work with const attribute_group. These attribute_group structures do not change at runtime so mark them as const. File size before: text data bss dec hex filename 8272 4608 64 12944 3290 drivers/leds/leds-lm3533.o File size after: text data bss dec hex filename 8368 4512 64 12944 3290 drivers/leds/leds-lm3533.o This change was made with the help of Coccinelle. Signed-off-by: Amitoj Kaur Chawla <amitoj1606@gmail.com> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
generated by cgit (git 2.34.1) at 2025-09-19 18:42:27 +0000