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2025-03-17regulator: rtq6752: make const read-only array fault_mask staticColin Ian King
Don't populate the const read-only array fault_mask on the stack at run time, instead make it static. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Link: https://patch.msgid.link/20250317165845.525593-1-colin.i.king@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-17Merge branch 'for-6.15/features' into cxl-for-nextDave Jiang
Add CXL Features support. Setup code for enabling in kernel usage of CXL Features. Expecting EDAC/RAS to utilize CXL Features in kernel for things such as memory sparing. Also prepartion for enabling of CXL FWCTL support to issue allowed Features from user space.
2025-03-17printk: Add an option to allow ttynull to be a default console deviceAdam Simonelli
The new option is CONFIG_NULL_TTY_DEFAULT_CONSOLE. if enabled, and CONFIG_VT is disabled, ttynull will become the default primary console device. ttynull will be the only console device usually with this option enabled. Some architectures do call add_preferred_console() which may add another console though. Motivation: Many distributions ship with CONFIG_VT enabled. On tested desktop hardware if CONFIG_VT is disabled, the default console device falls back to /dev/ttyS0 instead of /dev/tty. This could cause issues in user space, and hardware problems: 1. The user space issues include the case where /dev/ttyS0 is disconnected, and the TCGETS ioctl, which some user space libraries use as a probe to determine if a file is a tty, is called on /dev/console and fails. Programs that call isatty() on /dev/console and get an incorrect false value may skip expected logging to /dev/console. 2. The hardware issues include the case if a user has a science instrument or other device connected to the /dev/ttyS0 port, and they were to upgrade to a kernel that is disabling the CONFIG_VT option, kernel logs will then be sent to the device connected to /dev/ttyS0 unless they edit their kernel command line manually. The new CONFIG_NULL_TTY_DEFAULT_CONSOLE option will give users and distribution maintainers an option to avoid this. Disabling CONFIG_VT and enabling CONFIG_NULL_TTY_DEFAULT_CONSOLE will ensure the default kernel console behavior is not dependent on hardware configuration by default, and avoid unexpected new behavior on devices connected to the /dev/ttyS0 serial port. Reviewed-by: Petr Mladek <pmladek@suse.com> Tested-by: Petr Mladek <pmladek@suse.com> Signed-off-by: Adam Simonelli <adamsimonelli@gmail.com> Link: https://lore.kernel.org/r/20250314160749.3286153-2-adamsimonelli@gmail.com [pmladek@suse.com: Fixed indentation of the commit message.] Signed-off-by: Petr Mladek <pmladek@suse.com>
2025-03-17clk: qcom: Add NSS clock Controller driver for IPQ9574Devi Priya
Add Networking Sub System Clock Controller (NSSCC) driver for ipq9574 based devices. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Link: https://lore.kernel.org/r/20250313110359.242491-5-quic_mmanikan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-17clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clockDevi Priya
Add support for gpll0_out_aux clock which acts as the parent for certain networking subsystem (nss) clocks. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Link: https://lore.kernel.org/r/20250313110359.242491-3-quic_mmanikan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-17hwmon: (pmbus/ltc2978) add support for lt717xKim Seer Paller
Add support for LT7170 and LT7171. The LT7170 and LT7171 are 20 A, 16 V, Single- or Dual-Phase, Silent Switcher Step-Down Regulators with Digital Power System Management. The relevant registers in the LT7170 and LT7171 are similar to those in the LTC3887, but with fewer channels. This adds the chip ID and identification of ASCII to differentiate between the LT7170 and LT7171. These devices support polling for status updates and clearing peak values. The data format for voltage, current, and temperature is set to IEEE754 for precision and compatibility. Co-developed-by: Cherrence Sarip <cherrence.sarip@analog.com> Signed-off-by: Cherrence Sarip <cherrence.sarip@analog.com> Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com> Link: https://lore.kernel.org/r/20250317-hwmon-next-v1-3-da0218c38197@analog.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-03-17power: supply: mt6370: Remove redundant 'flush_workqueue()' callsChen Ni
'destroy_workqueue()' already drains the queue before destroying it, so there is no need to flush it explicitly. Remove the redundant 'flush_workqueue()' calls. This was generated with coccinelle: @@ expression E; @@ - flush_workqueue(E); destroy_workqueue(E); Signed-off-by: Chen Ni <nichen@iscas.ac.cn> Link: https://lore.kernel.org/r/20250312073729.1430053-1-nichen@iscas.ac.cn Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2025-03-17Revert "power: supply: bq27xxx: do not report bogus zero values"Sicelo A. Mhlongo
Commit f3974aca381e ("power: supply: bq27xxx: do not report bogus zero values") breaks property reporting on chips which are reporting normal values. During testing, excessive emphasis was evidently placed on the chip with non-working conditions, and not enough testing was done on a battery that had normal state. A correct fix will be submitted in a separate patch. Reported-by: H. Nikolaus Schaller <hns@goldelico.com> Closes: https://lore.kernel.org/linux-pm/CB5B8FE7-D619-4D30-BD2D-58B6CEF83D46@goldelico.com/ Fixes: f3974aca381e ("power: supply: bq27xxx: do not report bogus zero values") Signed-off-by: Sicelo A. Mhlongo <absicsz@gmail.com> Link: https://lore.kernel.org/r/20250312121712.146109-2-absicsz@gmail.com Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2025-03-17perf/arm_cspmu: Fix missing io.h includeRobin Murphy
Adding the writel() calls needs io.h, which apparently gets transiently included somewhere on arm64, but not elsewhere. Fixes: 6de0298a3925 ("perf/arm_cspmu: Generalise event filtering") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202503150649.Dol8RBSh-lkp@intel.com/ Closes: https://lore.kernel.org/oe-kbuild-all/202503152245.cAG4FMfi-lkp@intel.com/ Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/657935ca177024ad08d5ec6f85e8faf75f82cf65.1742212833.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2025-03-17power: supply: max77693: Fix wrong conversion of charge input threshold valueArtur Weber
The charge input threshold voltage register on the MAX77693 PMIC accepts four values: 0x0 for 4.3v, 0x1 for 4.7v, 0x2 for 4.8v and 0x3 for 4.9v. Due to an oversight, the driver calculated the values for 4.7v and above starting from 0x0, rather than from 0x1 ([(4700000 - 4700000) / 100000] gives 0). Add 1 to the calculation to ensure that 4.7v is converted to a register value of 0x1 and that the other two voltages are converted correctly as well. Fixes: 87c2d9067893 ("power: max77693: Add charger driver for Maxim 77693") Signed-off-by: Artur Weber <aweber.kernel@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250316-max77693-charger-input-threshold-fix-v1-1-2b037d0ac722@gmail.com Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2025-03-17rtc: pm8xxx: implement qcom,no-alarm flag for non-HLOS owned alarmJonathan Marek
Qualcomm x1e80100 firmware sets the ownership of the RTC alarm to ADSP. Thus writing to RTC alarm registers and receiving alarm interrupts is not possible. Add a qcom,no-alarm flag to support RTC on this platform. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20241015004945.3676-2-jonathan@marek.ca [ johan: drop no_alarm flag and restructure probe() ] Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Tested-by: Steev Klimaszewski <steev@kali.org> Tested-by: Joel Stanley <joel@jms.id.au> Tested-by: Sebastian Reichel <sre@kernel.org> # Lenovo T14s Gen6 Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250219134118.31017-5-johan+linaro@kernel.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-03-17pinctrl: qcom: sa8775p: Enable egpio functionWasim Nazir
Egpio feature allows IsLand Domain IOs to be reused as TLMM GPIOs. sa8775p supports egpio feature for GPIOs ranging from 126 to 148. Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com> Reviewed-by: Dmitry Baryshkov <lumag@kernel.org> Link: https://lore.kernel.org/20250312072509.3247885-3-quic_wasimn@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-17pinctrl: qcom: tlmm-test: Validate irq_enable delivers edge irqsBjorn Andersson
In commit 'cf9d052aa600 ("pinctrl: qcom: Don't clear pending interrupts when enabling")' Doug establishes an expectation that edge interrupts occurring while an interrupt is disabled should be delivered once the interrupt is enabled again. Implement a test to validate that this is the case. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> Link: https://lore.kernel.org/20250313-tlmm-test-disabled-irq-delivered-v1-1-f0be903732ac@oss.qualcomm.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-17pinctrl: qcom: Clear latched interrupt status when changing IRQ typeStephan Gerhold
When submitting the TLMM test driver, Bjorn reported that some of the test cases are failing for GPIOs that not are backed by PDC (i.e. "non-wakeup" GPIOs that are handled directly in pinctrl-msm). Basically, lingering latched interrupt state is still being delivered at IRQ request time, e.g.: ok 1 tlmm_test_silent_rising tlmm_test_silent_falling: ASSERTION FAILED at drivers/pinctrl/qcom/tlmm-test.c:178 Expected atomic_read(&priv->intr_count) == 0, but atomic_read(&priv->intr_count) == 1 (0x1) not ok 2 tlmm_test_silent_falling tlmm_test_silent_low: ASSERTION FAILED at drivers/pinctrl/qcom/tlmm-test.c:178 Expected atomic_read(&priv->intr_count) == 0, but atomic_read(&priv->intr_count) == 1 (0x1) not ok 3 tlmm_test_silent_low ok 4 tlmm_test_silent_high Whether to report interrupts that came in while the IRQ was unclaimed doesn't seem to be well-defined in the Linux IRQ API. However, looking closer at these specific cases, we're actually reporting events that do not match the interrupt type requested by the driver: 1. After "ok 1 tlmm_test_silent_rising", the GPIO is in low state and configured for IRQF_TRIGGER_RISING. 2. (a) In preparation for "tlmm_test_silent_falling", the GPIO is switched to high state. The rising interrupt gets latched. (b) The GPIO is re-configured for IRQF_TRIGGER_FALLING, but the latched interrupt isn't cleared. (c) The IRQ handler is called for the latched interrupt, but there wasn't any falling edge. 3. (a) For "tlmm_test_silent_low", the GPIO remains in high state. (b) The GPIO is re-configured for IRQF_TRIGGER_LOW. This seems to result in a phantom interrupt that gets latched. (c) The IRQ handler is called for the latched interrupt, but the GPIO isn't in low state. 4. (a) For "tlmm_test_silent_high", the GPIO is switched to low state. (b) This doesn't result in a latched interrupt, because RAW_STATUS_EN was cleared when masking the level-triggered interrupt. Fix this by clearing the interrupt state whenever making any changes to the interrupt configuration. This includes previously disabled interrupts, but also any changes to interrupt polarity or detection type. With this change, all 16 test cases are now passing for the non-wakeup GPIOs in the TLMM. Cc: stable@vger.kernel.org Fixes: cf9d052aa600 ("pinctrl: qcom: Don't clear pending interrupts when enabling") Reported-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> Closes: https://lore.kernel.org/r/20250227-tlmm-test-v1-1-d18877b4a5db@oss.qualcomm.com/ Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Tested-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/20250312-pinctrl-msm-type-latch-v1-1-ce87c561d3d7@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-17pinctrl: bcm281xx: Add missing assignment in bcm21664_pinctrl_lock_all()Dan Carpenter
The next line checks if this regmap_write() failed, but it doesn't work because the assignment was accidentally left out. Add the assignment. Fixes: 60d69769c851 ("pinctrl: bcm281xx: Add support for BCM21664 pinmux") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Acked-by: Artur Weber <aweber.kernel@gmail.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/dfc15d59-7fa9-4f96-aacb-37c3df6d420d@stanley.mountain Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-17pinctrl: amd: isp411: Fix IS_ERR() vs NULL check in probe()Dan Carpenter
The platform_get_resource() returns NULL on error. It doesn't return error pointers. Fix the error checking to match. Fixes: e97435ab09f3 ("pinctrl: amd: isp411: Add amdisp GPIO pinctrl") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Pratap Nirujogi <pratap.nirujogi@amd.com> Link: https://lore.kernel.org/617f4c77-7837-4e24-9f4d-620ecfedf924@stanley.mountain Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-17pinctrl: tegra: Set SFIO mode to Mux RegisterPrathamesh Shete
Tegra devices have an 'sfsel' bit field that determines whether a pin operates in SFIO (Special Function I/O) or GPIO mode. Currently, tegra_pinctrl_gpio_disable_free() sets this bit when releasing a GPIO. However, tegra_pinctrl_set_mux() can be called independently in certain code paths where gpio_disable_free() is not invoked. In such cases, failing to set the SFIO mode could lead to incorrect pin configurations, resulting in functional issues for peripherals relying on SFIO. This patch ensures that whenever set_mux() is called, the SFIO mode is correctly set in the Mux Register if the 'sfsel' bit is present. This prevents situations where the pin remains in GPIO mode despite being configured for SFIO use. Fixes: 971dac7123c7 ("pinctrl: add a driver for NVIDIA Tegra") Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Link: https://lore.kernel.org/20250306050542.16335-1-pshete@nvidia.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-17regulator: rtq2208: Fix the LDO DVS capabilityChiYuan Huang
Use the hidden bank register to identify whether the LDO voltage is fixed or variable. Remove the read of 'richtek,fixed-microvolt' property. Fixes: af1296d15d89 ("regulator: rtq2208: Add fixed LDO VOUT property and check that matches the constraints") Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://patch.msgid.link/dae0321b710518ce32260336e3cc9caf2ba84215.1742204502.git.cy_huang@richtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-17regulator: rtq2208: Fix incorrect buck converter phase mappingChiYuan Huang
Use the hidden bank RG to get the correct buck converter phase mapping. Fixes: 85a11f55621a ("regulator: rtq2208: Add Richtek RTQ2208 SubPMIC") Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://patch.msgid.link/ae3245aa713f76000dbd20b4ad6f66d30611d3b8.1742204502.git.cy_huang@richtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-17hwmon: (nct6775-core) Fix out of bounds access for NCT679{8,9}Tasos Sahanidis
pwm_num is set to 7 for these chips, but NCT6776_REG_PWM_MODE and NCT6776_PWM_MODE_MASK only contain 6 values. Fix this by adding another 0 to the end of each array. Signed-off-by: Tasos Sahanidis <tasos@tasossah.com> Link: https://lore.kernel.org/r/20250312030832.106475-1-tasos@tasossah.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-03-17rtc: pm8xxx: mitigate flash wearJohan Hovold
On many Qualcomm platforms the PMIC RTC control and time registers are read-only so that the RTC time can not be updated. Instead an offset needs be stored in some machine-specific non-volatile memory, which the driver can take into account. On machines like the Lenovo ThinkPad X13s the PMIC RTC drifts about one second every 3.5 hours, something which leads to repeated updates of the offset when NTP synchronisation is enabled. Reduce wear of the underlying flash storage (used for UEFI variables) by deferring writes until shutdown in case they appear to be due to clock drift. As an example, deferring writes when the new offset differs up to 30 s from the previous one reduces the number of writes on the X13s during a ten day session with the machine not suspending for more than four days in a row from up to 68 writes (every 3.5 h) to at most two (boot and shutdown). Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Tested-by: Steev Klimaszewski <steev@kali.org> Tested-by: Joel Stanley <joel@jms.id.au> Tested-by: Sebastian Reichel <sre@kernel.org> # Lenovo T14s Gen6 Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250219134118.31017-4-johan+linaro@kernel.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-03-17rtc: pm8xxx: add support for uefi offsetJohan Hovold
On many Qualcomm platforms the PMIC RTC control and time registers are read-only so that the RTC time can not be updated. Instead an offset needs be stored in some machine-specific non-volatile memory, which the driver can take into account. Add support for storing a 32-bit offset from the GPS time epoch in a UEFI variable so that the RTC time can be set on such platforms. The UEFI variable is 882f8c2b-9646-435f-8de5-f208ff80c1bd-RTCInfo and holds a 12-byte structure where the first four bytes is a GPS time offset in little-endian byte order. Note that this format is not arbitrary as the variable is shared with the UEFI firmware (and Windows). Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Tested-by: Steev Klimaszewski <steev@kali.org> Tested-by: Joel Stanley <joel@jms.id.au> Tested-by: Sebastian Reichel <sre@kernel.org> # Lenovo T14s Gen6 Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250219134118.31017-3-johan+linaro@kernel.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-03-17rtc: rv3032: drop WADAAlexandre Belloni
WADA doesn't actually exist in CTRL1 of the RV-3032, drop it. Link: https://lore.kernel.org/r/20250306214243.1167692-2-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-03-17rtc: rv3032: fix EERD locationAlexandre Belloni
EERD is bit 2 in CTRL1 Link: https://lore.kernel.org/r/20250306214243.1167692-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-03-17rtc: pm8xxx: switch to devm_device_init_wakeupAlexandre Belloni
Switch to devm_device_init_wakeup to avoid a possible memory leak as wakeup is never disabled. Link: https://lore.kernel.org/r/20250303223600.1135142-3-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-03-17rtc: pm8xxx: fix possible race conditionAlexandre Belloni
probe must not fail after devm_rtc_register_device is successful because the character device will be seen by userspace and may be opened right away. Call it last to avoid opening the race window. Link: https://lore.kernel.org/r/20250303223600.1135142-2-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-03-17rtc: mpfs: switch to devm_device_init_wakeupAlexandre Belloni
Switch to devm_device_init_wakeup to avoid a possible memory leak as wakeup is never disabled. Link: https://lore.kernel.org/r/20250303223600.1135142-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-03-17mmc: sdhci-brcmstb: add cqhci suspend/resume to PM opsKamal Dasu
cqhci timeouts observed on brcmstb platforms during suspend: ... [ 164.832853] mmc0: cqhci: timeout for tag 18 ... Adding cqhci_suspend()/resume() calls to disable cqe in sdhci_brcmstb_suspend()/resume() respectively to fix CQE timeouts seen on PM suspend. Fixes: d46ba2d17f90 ("mmc: sdhci-brcmstb: Add support for Command Queuing (CQE)") Cc: stable@vger.kernel.org Signed-off-by: Kamal Dasu <kamal.dasu@broadcom.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20250311165946.28190-1-kamal.dasu@broadcom.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-03-17thunderbolt: Do not add non-active NVM if NVM upgrade is disabled for retimerMika Westerberg
This is only used to write a new NVM in order to upgrade the retimer firmware. It does not make sense to expose it if upgrade is disabled. This also makes it consistent with the router NVM upgrade. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2025-03-17thunderbolt: Scan retimers after device router has been enumeratedMika Westerberg
Thomas reported connection issues on AMD system with Pluggable UD-4VPD dock. After some experiments it looks like the device has some sort of internal timeout that triggers reconnect. This is completely against the USB4 spec, as there is no requirement for the host to enumerate the device right away or even at all. In Linux case the delay is caused by scanning of retimers on the link so we can work this around by doing the scanning after the device router has been enumerated. Reported-by: Thomas Lynema <lyz27@yahoo.com> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=219748 Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2025-03-17tty: mmc: sdio: use bool for cts and remove parenthesesJiri Slaby (SUSE)
'cts' in sdio_uart_check_modem_status() is considered a 'bool', but typed as signed 'int'. Make it 'bool' so it is clear the code does not care about the masked value, but true/false. Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org> Link: https://lore.kernel.org/r/20250317070046.24386-18-jirislaby@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-03-17pmdomain: arm: scmi_pm_domain: Remove redundant state verificationSudeep Holla
Currently, scmi_pd_power() explicitly verifies whether the requested power state was applied by calling state_get(). While this check could detect failures where the state was not properly updated, ensuring correctness is the responsibility of the SCMI firmware. Removing this redundant state_get() call eliminates an unnecessary round-trip to the firmware, improving efficiency. Any mismatches between the requested and actual states should be handled by the SCMI firmware, which must return a failure if state_set() is unsuccessful. Additionally, in some cases, checking the state after powering off a domain may be unreliable or unsafe, depending on the firmware implementation. This patch removes the redundant verification, simplifying the function without compromising correctness. Reported-and-tested-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Cristian Marussi <cristian.marussi@arm.com> Link: https://lore.kernel.org/r/20250314095851.443979-1-sudeep.holla@arm.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-03-17pmdomain: thead: fix TH1520_AON_PROTOCOL dependencyArnd Bergmann
Kconfig treats the dependency as optional, but the header file only provides normal declarations and no empty API stubs: ld: fs/btrfs/extent_io.o: in function `writepage_delalloc': extent_io.c:(.text+0x2b42): undefined reference to `__udivdi3' ld: drivers/pmdomain/thead/th1520-pm-domains.o: in function `th1520_pd_power_off': th1520-pm-domains.c:(.text+0x57): undefined reference to `th1520_aon_power_update' ld: drivers/pmdomain/thead/th1520-pm-domains.o: in function `th1520_pd_power_on': th1520-pm-domains.c:(.text+0x8a): undefined reference to `th1520_aon_power_update' ld: drivers/pmdomain/thead/th1520-pm-domains.o: in function `th1520_pd_probe': th1520-pm-domains.c:(.text+0xb8): undefined reference to `th1520_aon_init' ld: th1520-pm-domains.c:(.text+0x1c6): undefined reference to `th1520_aon_power_update' Since the firmware code can easily be enabled for compile testing, there is no need to add stubs either, so just make it a hard dependency. Fixes: dc9a897dbb03 ("pmdomain: thead: Add power-domain driver for TH1520") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Michal Wilczynski <m.wilczynski@samsung.com> Link: https://lore.kernel.org/r/20250314154834.4053416-1-arnd@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-03-17irqchip: Add support for Amlogic A4 and A5 SoCsXianwei Zhao
The Amlogic A4 SoCs support 12 GPIO IRQ lines and 2 AO GPIO IRQ lines, A5 SoCs support 12 GPIO IRQ lines, details are as below. A4 IRQ Number: - 72:55 18 pins on bank T - 54:32 23 pins on bank X - 31:16 16 pins on bank D - 15:14 2 pins on bank E - 13:0 14 pins on bank B A4 AO IRQ Number: - 7 1 pin on bank TESTN - 6:0 7 pins on bank AO A5 IRQ Number: - 98 1 pin on bank TESTN - 97:82 16 pins on bank Z - 81:62 20 pins on bank X - 61:48 14 pins on bank T - 47:32 16 pins on bank D - 31:27 5 pins on bank H - 26:25 2 pins on bank E - 24:14 11 pins on bank C - 13:0 14 pins on bank B Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20250311-irqchip-gpio-a4-a5-v5-2-ca4cc276c18c@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-03-17gpio: da9055: use new line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-15-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: da9052: use new line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-14-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: cs5535: use new line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-13-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: crystalcove: use new line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-12-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: cros-ec: use new line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Reviewed-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-11-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: creg-snps: use new line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-10-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: cgbc: use new line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-9-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: bt8xx: use new line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-8-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: bt8xx: use lock guardsBartosz Golaszewski
Reduce the code complexity by using automatic lock guards with the spinlock. Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-7-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: bt8xx: allow to build the module with COMPILE_TEST=yBartosz Golaszewski
Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-6-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: bd9571mwv: use new line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Reviewed-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-5-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: bd71828: use new line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Reviewed-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-4-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: bd71815: use new line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Reviewed-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-3-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: bcm-kona: use new line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-2-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17gpio: bcm-kona: use lock guardsBartosz Golaszewski
Reduce the code complexity by using automatic lock guards with the raw spinlock. Link: https://lore.kernel.org/r/20250310-gpiochip-set-conversion-v1-1-03798bb833eb@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-03-17Merge tag 'v6.14-rc7' of ↵Bartosz Golaszewski
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-next Linux 6.14-rc7