summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2023-01-30Merge tag 'amlogic-drivers-for-v6.3' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers Amlogic Drivers changes for v6.3: - Merge of immutable bindings branch with Reset & power domain binding - Addition of NNA power domain for A311D SoC - meson_sm.txt conversionto dt-schema - mark amlogic,meson-gx-pwrc bindings as deprecated - fix of meson_sm driver by using NULL instead of 0 * tag 'amlogic-drivers-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: firmware: meson_sm: stop using 0 as NULL pointer dt-bindings: power: amlogic,meson-gx-pwrc: mark bindings as deprecated dt-bindings: firmware: convert meson_sm.txt to dt-schema soc: amlogic: meson-pwrc: Add NNA power domain for A311D dt-bindings: power: Add G12A NNA power domain dt-bindings: reset: meson-g12a: Add missing NNA reset Link: https://lore.kernel.org/r/ec9552d8-96df-a677-ab94-9723f5c30f1c@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30Merge tag 'imx-drivers-6.3' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/drivers i.MX drivers change for 6.3: - A couple of cleanups to drop device_driver owner setting from i.MX93 PD and SRC driver. - A series from Lucas Stach to add high performance PLL clock support for imx8mp-blk-ctrl driver. - A couple of changes to set LCDIF panic read hurry level for i.MX8M blk-ctrl drivers. - Use devm_platform_get_and_ioremap_resource() for imx-weim bus driver. * tag 'imx-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: imx8mp-blk-ctrl: set HDMI LCDIF panic read hurry level soc: imx: imx93-src: No need to set device_driver owner soc: imx: imx93-pd: No need to set device_driver owner soc: imx: imx8m-blk-ctrl: set LCDIF panic read hurry level soc: imx: imx8mp-blk-ctrl: expose high performance PLL clock soc: imx: imx8mp-blk-ctrl: add instance specific probe function soc: imx: add Kconfig symbols for blk-ctrl drivers bus: imx-weim: use devm_platform_get_and_ioremap_resource() Link: https://lore.kernel.org/r/20230130023947.11780-1-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30PCI: Avoid FLR for AMD FCH AHCI adaptersDamien Le Moal
PCI passthrough to VMs does not work with AMD FCH AHCI adapters: the guest OS fails to correctly probe devices attached to the controller due to FIS communication failures: ata4: softreset failed (1st FIS failed) ... ata4.00: qc timeout after 5000 msecs (cmd 0xec) ata4.00: failed to IDENTIFY (I/O error, err_mask=0x4) Forcing the "bus" reset method before unbinding & binding the adapter to the vfio-pci driver solves this issue, e.g.: echo "bus" > /sys/bus/pci/devices/<ID>/reset_method gives a working guest OS, indicating that the default FLR reset method doesn't work correctly. Apply quirk_no_flr() to AMD FCH AHCI devices to work around this issue. Link: https://lore.kernel.org/r/20230128013951.523247-1-damien.lemoal@opensource.wdc.com Reported-by: Niklas Cassel <niklas.cassel@wdc.com> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: stable@vger.kernel.org
2023-01-30ACPI: PMIC: Add comments with DSDT power opregion field namesHans de Goede
The DSDTs of CHT devices using the Dollar Cove TI PMIC, all use LDO1 - LDO14 names for the DSDT power opregion field names. Add comments with these fields to make it easier to see which PMIC registers are being set by ACPI code using these. Note that LDO4 is missing and the mapped registers jump from 0x43 to 0x45 to match. This matches with how the fields are declared in the DSDT where LDO4 is skipped too. Note there is no hole in the field addresses, LDO4 is simply just not defined on either side. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-01-30ACPI: battery: Increase maximum string lengthArmin Wolf
On the Dell Inspiron 3505, the battery model name is represented as a hex string containing seven numbers, causing it to be larger than the current maximum string length (32). Increase this length to 64 to avoid truncating the string in such cases. Also introduce a common define for the length. Signed-off-by: Armin Wolf <W_Armin@gmx.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-01-30ACPI: battery: Fix buffer overread if not NUL-terminatedArmin Wolf
If a buffer containing ASCII characters is not NUL-terminated (which is perfectly legal according to the ACPI specification), the ACPI battery driver might not honor its length. Fix this by limiting the amount of data to be copied to the buffer length while also using strscpy() to make sure that the resulting string is always NUL-terminated. Also replace strncpy() vs strscpy(). Signed-off-by: Armin Wolf <W_Armin@gmx.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-01-30pwm: stm32-lp: fix the check on arr and cmp registers updateFabrice Gasnier
The ARR (auto reload register) and CMP (compare) registers are successively written. The status bits to check the update of these registers are polled together with regmap_read_poll_timeout(). The condition to end the loop may become true, even if one of the register isn't correctly updated. So ensure both status bits are set before clearing them. Fixes: e70a540b4e02 ("pwm: Add STM32 LPTimer PWM driver") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2023-01-30pwm: sifive: Always let the first pwm_apply_state succeedEmil Renner Berthing
Commit 2cfe9bbec56ea579135cdd92409fff371841904f added support for the RGB and green PWM controlled LEDs on the HiFive Unmatched board managed by the leds-pwm-multicolor and leds-pwm drivers respectively. All three colours of the RGB LED and the green LED run from different lines of the same PWM, but with the same period so this works fine when the LED drivers are loaded one after the other. Unfortunately it does expose a race in the PWM driver when both LED drivers are loaded at roughly the same time. Here is an example: | Thread A | Thread B | | led_pwm_mc_probe | led_pwm_probe | | devm_fwnode_pwm_get | | | pwm_sifive_request | | | ddata->user_count++ | | | | devm_fwnode_pwm_get | | | pwm_sifive_request | | | ddata->user_count++ | | ... | ... | | pwm_state_apply | pwm_state_apply | | pwm_sifive_apply | pwm_sifive_apply | Now both calls to pwm_sifive_apply will see that ddata->approx_period, initially 0, is different from the requested period and the clock needs to be updated. But since ddata->user_count >= 2 both calls will fail with -EBUSY, which will then cause both LED drivers to fail to probe. Fix it by letting the first call to pwm_sifive_apply update the clock even when ddata->user_count != 1. Fixes: 9e37a53eb051 ("pwm: sifive: Add a driver for SiFive SoC PWM") Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2023-01-30ACPI: APEI: EINJ: Limit error type to 32-bit widthShuai Xue
The bit map of error types to inject is 32-bit width [1]. Add parameter check to reflect the fact. [1] ACPI Specification 6.4, Section 18.6.4. Error Types Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-01-30Merge tag 'arm-soc/for-6.3/drivers' of https://github.com/Broadcom/stblinux ↵Arnd Bergmann
into soc/drivers This pull request contains Broadcom ARM/ARM64 SoCs drivers updates for 6.3, please pull the following: - Uwe removes an empty platform driver remove function in the bcm2835-power driver * tag 'arm-soc/for-6.3/drivers' of https://github.com/Broadcom/stblinux: soc: bcm: bcm2835-power: Drop empty platform remove function Link: https://lore.kernel.org/r/20230128193844.1628888-1-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30Merge tag 'sunxi-drivers-for-6.3-1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/drivers - introduce Allwinner PPU driver - limit iteration in sram debugfs * tag 'sunxi-drivers-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: soc: sunxi: Add Allwinner D1 PPU driver dt-bindings: power: Add Allwinner D1 PPU soc: sunxi: sram: Only iterate over SRAM children Link: https://lore.kernel.org/r/Y9RXXATRNqEv0GJT@jernej-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30Merge tag 'renesas-drivers-for-v6.3-tag2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers Renesas driver updates for v6.3 (take two) - Add support for the Renesas RZ/V2M External Power Sequence Controller (PWC). * tag 'renesas-drivers-for-v6.3-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: Add PWC support for RZ/V2M Link: https://lore.kernel.org/r/cover.1674815095.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30Merge tag 'riscv-soc-for-v6.3-mw0' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V SoC drivers for v6.3-mw0 It's all StarFive stuff this time: Their new JH7110 SoC uses a SiFive core complex, and therefore a SiFive cache controller too. That needed a compatible added to both the binding and driver. The JH7110 also has power domains, which are supported by a new driver and a corresponding dt-binding. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-soc-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: soc: starfive: Add StarFive JH71XX pmu driver dt-bindings: power: Add starfive,jh7110-pmu soc: sifive: ccache: Add StarFive JH7110 support dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC Link: https://lore.kernel.org/r/Y9LNIm9pkr+Owv/e@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30gpiolib: of: Move enum of_gpio_flags to its only userAndy Shevchenko
GPIO library for OF is the only user for enum of_gpio_flags. Move it there. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: mvebu: Use IS_REACHABLE instead of IS_ENABLED for CONFIG_PWMUwe Kleine-König
To check if a certain function (here e.g. pwmchip_add()) can be called IS_REACHABLE is the better check. The relevant difference to IS_ENABLED is that IS_REACHABLE evaluates to 0 if the current code is builtin but the checked symbol is =m and so must not be used. Today there is no practical impact as CONFIG_PWM is a bool. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: zevio: Add missing headerAndy Shevchenko
The commit 899f6a9c4364 ("gpio: zevio: Use proper headers and drop OF_GPIO dependency") missed one header this driver depends on. Add it. Fixes: 899f6a9c4364 ("gpio: zevio: Use proper headers and drop OF_GPIO dependency") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: Get rid of gpio_to_chip()Linus Walleij
The gpio_to_chip() function refers to the global GPIO numberspace which is a problem we want to get rid of. Get this function out of the header and open code it into gpiolib with appropriate FIXME notices so no new users appear in the kernel. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: pcf857x: Drop unneeded explicit castingAndy Shevchenko
The s32 is compatible with int, no need to cast. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: pcf857x: Make use of device propertiesAndy Shevchenko
Convert the module to be property provider agnostic and allow it to be used on non-OF platforms. Add mod_devicetable.h include. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: pcf857x: Get rid of legacy platform dataAndy Shevchenko
Platform data is a legacy interface to supply device properties to the driver. In this case we don't have in-kernel users for it. Moreover it uses plain GPIO numbers which is no-no for a new code. Just remove it for good. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: rockchip: Do not mention legacy API in the codeAndy Shevchenko
Replace mentioning of legacy API by the latest one. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: wcd934x: Remove duplicate assignment of of_gpio_n_cellsAndy Shevchenko
The of_gpio_n_cells default is 2 when ->of_xlate() callback is not defined. No need to assign it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: zevio: Use proper headers and drop OF_GPIO dependencyAndy Shevchenko
The driver doesn't depend on the OF_GPIO to be compiled. Hence the proper header to use is mod_devicetable.h. Replace of*.h with the above mentioned and drop redundant dependency. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: zevio: Remove duplicate assignment of of_gpio_n_cellsAndy Shevchenko
The of_gpio_n_cells default is 2 when ->of_xlate() callback is not defined. No need to assign it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: xilinx: Remove duplicate assignment of of_gpio_n_cellsAndy Shevchenko
The of_gpio_n_cells default is 2 when ->of_xlate() callback is not defined. No need to assign it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: ge: Remove duplicate assignment of of_gpio_n_cellsAndy Shevchenko
The of_gpio_n_cells default is 2 when ->of_xlate() callback is not defined. No need to assign it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: davinci: Remove duplicate assignment of of_gpio_n_cellsAndy Shevchenko
The of_gpio_n_cells default is 2 when ->of_xlate() callback is not defined. No need to assign it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: omap: use dynamic allocation of baseAndreas Kemnade
Static allocatin is deprecated and may cause probe mess, if probe order is unusual. like this example [ 2.553833] twl4030_gpio twl4030-gpio: gpio (irq 145) chaining IRQs 161..178 [ 2.561401] gpiochip_find_base: found new base at 160 [ 2.564392] gpio gpiochip5: (twl4030): added GPIO chardev (254:5) [ 2.564544] gpio gpiochip5: registered GPIOs 160 to 177 on twl4030 [...] [ 2.692169] omap-gpmc 6e000000.gpmc: GPMC revision 5.0 [ 2.697357] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 2.703643] gpiochip_find_base: found new base at 178 [ 2.704376] gpio gpiochip6: (omap-gpmc): added GPIO chardev (254:6) [ 2.704589] gpio gpiochip6: registered GPIOs 178 to 181 on omap-gpmc [...] [ 2.840393] gpio gpiochip7: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 2.849365] gpio gpiochip7: (gpio-160-191): GPIO integer space overlap, cannot add chip [ 2.857513] gpiochip_add_data_with_key: GPIOs 160..191 (gpio-160-191) failed to register, -16 [ 2.866149] omap_gpio 48310000.gpio: error -EBUSY: Could not register gpio chip So probing was done in an unusual order, causing mess and chips not getting their gpio in the end. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: davinci: Do not mention legacy API in the codeAndy Shevchenko
Replace mentioning of legacy API by the latest one. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpiolib: Remove unused of_mm_gpiochip_add()Andy Shevchenko
of_mm_gpiochip_add() is unused API, remove it for good. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: pcf857x: Implement get_multiple/set_multiple methodsRadu Rendec
This change allows the GPIO core to read/change multiple pins in a single driver call and subsequent I2C transfer. It helps a lot with PCF857x devices, since their I2C protocol always reads/changes all existing pins anyway. Therefore, when the GPIO client code does a bulk operation on multiple pins, the driver makes a single I2C transfer. Signed-off-by: Radu Rendec <radu.rendec@gmail.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: pcf857x: Fix indentation of variable declarationsRadu Rendec
No functional changes. This is a whitespace change only. Signed-off-by: Radu Rendec <radu.rendec@gmail.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: pcf857x: Replace 'unsigned' with 'unsigned int'Radu Rendec
Cosmetic change only to improve the coding style. No functional change, since 'unsigned' and 'unsigned int' are identical as far as the compiler is concerned. Signed-off-by: Radu Rendec <radu.rendec@gmail.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: tegra186: add Tegra234 PMC compatible in GPIO driverPrathamesh Shete
Using this patch we are adding PMC compatible string for Tegra234 in GPIO driver so the IRQ hierarchy can be set. Signed-off-by: Manish Bhardwaj <mbhardwaj@nvidia.com> Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: regmap: use new regmap_might_sleep()Michael Walle
Now that the regmap can be queried whether it might sleep, we can get rid of the conservative setting "can_sleep = true". New drivers which want to use gpio-regmap and can access the registers memory-mapped won't have the restriction that their consumers have to use the gpiod_*cansleep() variants anymore. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpiolib: sort header inclusion alphabeticallyAndy Shevchenko
Sort header inclusion alphabetically. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpiolib: Get rid of not used of_node memberAndy Shevchenko
All new drivers should use fwnode and / or parent to provide the necessary information to the GPIO library. Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpiolib: Introduce gpio_device_get() and gpio_device_put()Andy Shevchenko
Introduce gpio_device_get() and gpio_device_put() helpers and convert existing users. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: vf610: connect GPIO label to dev nameHaibo Chen
Current GPIO label is fixed, so can't distinguish different GPIO controllers through labels. Use dev name instead. Fixes: 7f2691a19627 ("gpio: vf610: add gpiolib/IRQ chip driver for Vybrid") Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: pca9570: rename platform_data to chip_dataBartosz Golaszewski
By convention platform_data refers to structures passed to drivers by code that registers devices. When talking about model-specific data structures associated with OF compatibles, we usually call them chip_data. In order to avoid confusion rename all mentions of platform_data to chip_data. Fixes: fbb19fe17eae ("gpio: pca9570: add slg7xl45106 support") Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-30gpiolib: of: remove [devm_]gpiod_get_from_of_node() APIsDmitry Torokhov
Now that everyone is using [devm_]fwnode_gpiod_get[_index]() APIs, remove OF-specific [devm_]gpiod_get_from_of_node(). Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpiolib: of: remove of_get_gpio[_flags]() and of_get_named_gpio_flags()Dmitry Torokhov
There are no more users of these APIs in the mainline kernel, remove them. This leaves of_get_named_gpio() as the only legacy OF-specific API. Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpiolib: of: remove obsolete comment for of_gpio_get_count()Dmitry Torokhov
The function is only being called form the main gpiolib module, so remove comment saying that it is also used by external callers. Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpiolib: of: stop exporting of_gpio_named_count()Dmitry Torokhov
The only user of this function is gpiolib-of.c so move it there. Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: i8255: Remove unused legacy interfaceWilliam Breathitt Gray
All i8255 library consumers have migrated to the new interface leveraging the gpio-regmap API. Legacy interface functions and code are removed as no longer needed. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: gpio-mm: Migrate to regmap APIWilliam Breathitt Gray
The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. The gpio-mm module is migrated to the new i8255 library interface leveraging the gpio-regmap API. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: 104-dio-48e: Migrate to regmap APIWilliam Breathitt Gray
The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. The 104-dio-48e module is migrated to the new i8255 library interface leveraging the gpio-regmap API. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: i8255: Migrate to gpio-regmap APIWilliam Breathitt Gray
The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. By leveraging the gpio-regmap API, the i8255 library is reduced to simply a devm_i8255_regmap_register() function, a configuration structure struct i8255_regmap_config, and a helper macro i8255_volatile_regmap_range() provided to simplify volatile PPI register hinting for the regmap. Legacy functions and code will be removed once all consumers have migrated to the new i8255 library interface. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: 104-idi-48: Migrate to gpio-regmap APIWilliam Breathitt Gray
The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. Despite the underlying interface being based on i8255, it is simpler to use the gpio-regmap API directly because the 104-IDI-48 device features only input signals. Therefore, the dependence on the i8255 GPIO library is removed in this patch. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30gpio: 104-idi-48: Migrate to the regmap-irq APIWilliam Breathitt Gray
The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. For the 104-idi-48, we get an IRQ register with some status information and basic masking, but it's broken down by banks rather than individual GPIO. There are six banks (8 GPIO lines each) that correspond to the lower six bits of the IRQ register (bits 0-5): Base Address + 7 (Read): IRQ Status Register/IRQ Clear Bit 0-5: Respective Bank IRQ Statuses Bit 6: IRQ Status (Active Low) Bit 7: IRQ Enable Status Base Address + 7 (Write): IRQ Enable/Disable Bit 0-5: Respective Bank IRQ Enable/Disable Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
generated by cgit (git 2.34.1) at 2025-09-30 07:12:16 +0000