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2018-10-16scsi: target: log NOP ping timeouts as errorsDavid Disseldorp
Events resulting in connection outages like this should be logged as errors. Include the I_T Nexus in the message to aid path identification. Signed-off-by: David Disseldorp <ddiss@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-16scsi: target: log Data-Out timeouts as errorsDavid Disseldorp
Data-Out timeouts resulting in connection outages should be logged as errors. Include the I_T Nexus in the message to aid path identification. Signed-off-by: David Disseldorp <ddiss@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-16scsi: target: use ISCSI_IQN_LEN in iscsi_target_statDavid Disseldorp
Move the ISCSI_IQN_LEN definition up, so that it can be used in more places instead of a hardcoded value. Signed-off-by: David Disseldorp <ddiss@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15r8169: Enable MSI-X on RTL8106eJian-Hong Pan
Originally, we have an issue where r8169 MSI-X interrupt is broken after S3 suspend/resume on RTL8106e of ASUS X441UAR. 02:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8101/2/6E PCI Express Fast/Gigabit Ethernet controller [10ec:8136] (rev 07) Subsystem: ASUSTeK Computer Inc. RTL810xE PCI Express Fast Ethernet controller [1043:200f] Flags: bus master, fast devsel, latency 0, IRQ 16 I/O ports at e000 [size=256] Memory at ef100000 (64-bit, non-prefetchable) [size=4K] Memory at e0000000 (64-bit, prefetchable) [size=16K] Capabilities: [40] Power Management version 3 Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+ Capabilities: [70] Express Endpoint, MSI 01 Capabilities: [b0] MSI-X: Enable+ Count=4 Masked- Capabilities: [d0] Vital Product Data Capabilities: [100] Advanced Error Reporting Capabilities: [140] Virtual Channel Capabilities: [160] Device Serial Number 01-00-00-00-36-4c-e0-00 Capabilities: [170] Latency Tolerance Reporting Kernel driver in use: r8169 Kernel modules: r8169 We found the all of the values in PCI BAR=4 of the ethernet adapter become 0xFF after system resumes. That breaks the MSI-X interrupt. Therefore, we can only fall back to MSI interrupt to fix the issue at that time. However, there is a commit which resolves the drivers getting nothing in PCI BAR=4 after system resumes. It is 04cb3ae895d7 "PCI: Reprogram bridge prefetch registers on resume" by Daniel Drake. After apply the patch, the ethernet adapter works fine before suspend and after resume. So, we can revert the workaround after the commit "PCI: Reprogram bridge prefetch registers on resume" is merged into main tree. This patch reverts commit 7bb05b85bc2d1a1b647b91424b2ed4a18e6ecd81 "r8169: don't use MSI-X on RTL8106e". Buglink: https://bugzilla.kernel.org/show_bug.cgi?id=201181 Fixes: 7bb05b85bc2d ("r8169: don't use MSI-X on RTL8106e") Signed-off-by: Jian-Hong Pan <jian-hong@endlessm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-16scsi: hisi_sas: Update v3 hw AIP_LIMIT and CFG_AGING_TIME register valuesXiang Chen
Update registers as follows: - Default value of AIP timer is 1ms, and it is easy for some expanders to cause IO error. Change the value to max value 65ms to avoid IO error for those expanders. - A CQ completion will be reported by HW when 4 CQs have occurred or the aging timer expires, whichever happens first. Sor serial IO scenario, it will still wait 8us for every IO before it is reported. So in the situation, the performance is poor. So to improve it, change the limit time to the least value. For other scenario, it does little affect to the performance. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-16scsi: hisi_sas: Use block layer tag instead for IPTTXiang Chen
Currently we use the IPTT defined in LLDD to identify IOs. Actually for IOs which are from the block layer, they have tags to identify them. So for those IOs, use tag of the block layer directly, and for IOs which is not from the block layer (such as internal IOs from libsas/LLDD), reserve 96 IPTTs for them. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-16scsi: hisi_sas: unmask interrupts ent72 and ent74Xiang Chen
The interrupts of ent72 and ent74 are not processed by PCIe AER handling, so we need to unmask the interrupts and process them first in the driver. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-16scsi: hisi_sas: Free slot later in slot_complete_vx_hw()Xiang Chen
If an SSP/SMP IO times out, it may be actually in reality be simultaneously processing completion of the slot in slot_complete_vx_hw(). Then if the slot is freed in slot_complete_vx_hw() (this IPTT is freed and it may be re-used by other slot), and we may abort the wrong slot in hisi_sas_abort_task(). So to solve the issue, free the slot after the check of SAS_TASK_STATE_ABORTED in slot_complete_vx_hw(). Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-16scsi: hisi_sas: Fix the race between IO completion and timeout for ↵Xiang Chen
SMP/internal IO If SMP/internal IO times out, we will possibly free the task immediately. However if the IO actually completes at the same time, the IO completion may refer to task which has been freed. So to solve the issue, flush the tasklet to finish IO completion before free'ing slot/task. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-16scsi: hisi_sas: Move evaluation of hisi_hba in hisi_sas_task_prep()Luo Jiaxing
In evaluating hisi_hba, the sas_port may be NULL, so for safety relocate the the check to value possible NULL deference. Signed-off-by: Luo Jiaxing <luojiaxing@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-16scsi: hisi_sas: Feed back linkrate(max/min) when re-attachedLuo Jiaxing
At directly attached situation, if the user modifies the sysfs interface of maximum_linkrate and minimum_linkrate to renegotiate the linkrate between SAS controller and target, the value of both files mentioned above should have change to user setting after renegotiate is over, but it remains unchanged. To fix this bug, maximum_linkrate and minimum_linkrate will be directly fed back to relevant sas_phy structure. Signed-off-by: Luo Jiaxing <luojiaxing@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-16scsi: target: Fix target_wait_for_sess_cmds breakage with active signalsNicholas Bellinger
With the addition of commit 00d909a10710 ("scsi: target: Make the session shutdown code also wait for commands that are being aborted") in v4.19-rc, it incorrectly assumes no signals will be pending for task_struct executing the normal session shutdown and I/O quiesce code-path. For example, iscsi-target and iser-target issue SIGINT to all kthreads as part of session shutdown. This has been the behaviour since day one. As-is when signals are pending with se_cmds active in se_sess->sess_cmd_list, wait_event_interruptible_lock_irq_timeout() returns a negative number and immediately kills the machine because of the do while (ret <= 0) loop that was added in commit 00d909a107 to spin while backend I/O is taking any amount of extended time (say 30 seconds) to complete. Here's what it looks like in action with debug plus delayed backend I/O completion: [ 4951.909951] se_sess: 000000003e7e08fa before target_wait_for_sess_cmds [ 4951.914600] target_wait_for_sess_cmds: signal_pending: 1 [ 4951.918015] wait_event_interruptible_lock_irq_timeout ret: -512 signal_pending: 1 loop count: 0 [ 4951.921639] wait_event_interruptible_lock_irq_timeout ret: -512 signal_pending: 1 loop count: 1 [ 4951.921944] wait_event_interruptible_lock_irq_timeout ret: -512 signal_pending: 1 loop count: 2 [ 4951.921944] wait_event_interruptible_lock_irq_timeout ret: -512 signal_pending: 1 loop count: 3 [ 4951.921944] wait_event_interruptible_lock_irq_timeout ret: -512 signal_pending: 1 loop count: 4 [ 4951.921944] wait_event_interruptible_lock_irq_timeout ret: -512 signal_pending: 1 loop count: 5 [ 4951.921944] wait_event_interruptible_lock_irq_timeout ret: -512 signal_pending: 1 loop count: 6 [ 4951.921944] wait_event_interruptible_lock_irq_timeout ret: -512 signal_pending: 1 loop count: 7 [ 4951.921944] wait_event_interruptible_lock_irq_timeout ret: -512 signal_pending: 1 loop count: 8 [ 4951.921944] wait_event_interruptible_lock_irq_timeout ret: -512 signal_pending: 1 loop count: 9 ... followed by the usual RCU CPU stalls and deadlock. There was never a case pre commit 00d909a107 where wait_for_complete(&se_cmd->cmd_wait_comp) was able to be interrupted, so to address this for v4.19+ moving forward go ahead and use wait_event_lock_irq_timeout() instead so new code works with all fabric drivers. Also for commit 00d909a107, fix a minor regression in target_release_cmd_kref() to only wake_up the new se_sess->cmd_list_wq only when shutdown has actually been triggered via se_sess->sess_tearing_down. Fixes: 00d909a10710 ("scsi: target: Make the session shutdown code also wait for commands that are being aborted") Cc: <stable@vger.kernel.org> # v4.19+ Cc: Bart Van Assche <bvanassche@acm.org> Cc: Mike Christie <mchristi@redhat.com> Cc: Hannes Reinecke <hare@suse.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Sagi Grimberg <sagi@grimberg.me> Cc: Bryant G. Ly <bryantly@linux.vnet.ibm.com> Tested-by: Nicholas Bellinger <nab@linux-iscsi.org> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org> Reviewed-by: Bryant G. Ly <bly@catalogicsoftware.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15scsi: libfc: retry PRLI if we cannot analyse the payloadHannes Reinecke
When we fail to analyse the payload of a PRLI response we should reset the state machine to retry the PRLI; eventually we will be getting a proper frame. Not doing so will result in a stuck state machine and the port never to be presented to the systsm. Suggested-by: Chad Dupuis <chad.dupuis@cavium.com> Signed-off-by: Hannes Reinecke <hare@suse.com> Reviewed-by: Arun Easi <arun.easi@cavium.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15scsi: libfc: check fc_frame_payload_get() return value for nullThomas Abraham
We should not assume the payload of a PRLI or PLOGI respons is always present. Signed-off-by: Thomas Abraham <tabraham@suse.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Reviewed-by: Arun Easi <arun.easi@cavium.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15scsi: core: Allow state transitions from OFFLINE to BLOCKEDHannes Reinecke
When an RSCN gets delayed (or not being sent at all), the transport class will detect an error, EH kicks in, and eventually will be setting the device to offline. If we receive an RSCN after that, the device will stay in 'offline'. This patch allows for an 'offline' to 'blocked' transition, thereby allowing the device to become active again. Signed-off-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15scsi: esp_scsi: remove union in esp_cmd_privChristoph Hellwig
The dma_addr_t member is unused ever since we switched the SCSI layer to send down single-segement command using a scatterlist as well many years ago. Signed-off-by: Christoph Hellwig <hch@lst.de> Tested-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15scsi: esp_scsi: move dma mapping into the core codeChristoph Hellwig
Except for the mac_esp driver, which uses PIO or pseudo DMA, all drivers share the same dma mapping calls. Move the dma mapping into the core code using the scsi_dma_map / scsi_dma_unmap helpers, with a special identify mapping variant triggered off a new ESP_FLAG_NO_DMA_MAP flag for mac_esp. Signed-off-by: Christoph Hellwig <hch@lst.de> Tested-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15scsi: esp_scsi: remove the dev argument to scsi_esp_registerChristoph Hellwig
We can simplify use esp->dev now. Signed-off-by: Christoph Hellwig <hch@lst.de> Tested-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15scsi: esp_scsi: use strong typing for the dev fieldChristoph Hellwig
esp->dev is a void pointer that points either to a struct device, or a struct platform_device. As we can easily get from the device to the platform_device if needed change it to always point to a struct device and properly type the pointer to avoid errors. Signed-off-by: Christoph Hellwig <hch@lst.de> Tested-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15scsi: sun_esp: don't use GFP_ATOMIC for command block allocationChristoph Hellwig
esp_sbus_map_command_block is called straight from the probe routine without any locks held, so we can safely use GFP_KERNEL here. Signed-off-by: Christoph Hellwig <hch@lst.de> Tested-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15scsi: am53c974: use the generic DMA APIChristoph Hellwig
Remove usage of the legacy PCI DMA API. To make this easier we also store a struct device instead of pci_dev in the dev field of struct esp. Signed-off-by: Christoph Hellwig <hch@lst.de> Tested-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15scsi: ufs: make UFS Tx lane1 clock optional for QCOM platformsVenkat Gopalakrishnan
Per Qcom's UFS host controller HW design, the UFS Tx lane1 clock could be muxed with Tx lane0 clock, hence keep Tx lane1 clock optional by ignoring it if it is not provided in device tree. This change also performs some cleanup to lanes per direction checks when enable/disable lane clocks just for symmetry. Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by: Can Guo <cang@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15scsi: lpfc: remove a bogus pci_dma_sync_single_for_device callChristoph Hellwig
dma_alloc_coherent allocates memory that can be used by the cpu and the device at the same time, calls to pci_dma_sync_* are not required, and in fact actively harmful on some architectures like arm. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15scsi: megaraid_mbox: remove bogus use of pci_dma_sync_sg_* APIsChristoph Hellwig
The dma_map_sg / dma_unmap_sg APIs called from scsi_dma_map / scsi_dma_unmap already transfer memory ownership to the device or cpu respectively. Adding additional calls to pci_dma_sync_sg_* will in fact lead to data corruption if we end up using swiotlb for some reason. Also remove the now pointless megaraid_mbox_sync_scb function. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-15xsysace: convert to blk-mqJens Axboe
Straight forward conversion, using an internal list to enable the driver to pull requests at will. Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-10-15paride: convert pf to blk-mqJens Axboe
Tested-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-10-15paride: convert pd to blk-mqJens Axboe
Tested-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-10-15paride: convert pcd to blk-mqJens Axboe
Tested-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-10-15ps3disk: convert to blk-mqJens Axboe
Convert from the old request_fn style driver to blk-mq. Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-10-15null_blk: remove set but not used variable 'q'YueHaibing
Fixes gcc '-Wunused-but-set-variable' warning: drivers/block/null_blk_main.c: In function 'end_cmd': drivers/block/null_blk_main.c:609:24: warning: variable 'q' set but not used [-Wunused-but-set-variable] It not used any more after commit e50b1e327aeb ("null_blk: remove legacy IO path") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-10-15hwmon: (pmbus) Fix page count auto-detection.Dmitry Bazhenov
Devices with compatible="pmbus" field have zero initial page count, and pmbus_clear_faults() being called before the page count auto- detection does not actually clear faults because it depends on the page count. Non-cleared faults in its turn may fail the subsequent page count auto-detection. This patch fixes this problem by calling pmbus_clear_fault_page() for currently set page and calling pmbus_clear_faults() after the page count was detected. Cc: stable@vger.kernel.org Signed-off-by: Dmitry Bazhenov <bazhenov.dn@gmail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2018-10-15Input: elan_i2c - add ACPI ID for Lenovo IdeaPad 330-15IGMMikhail Nikiforov
Add ELAN061C to the ACPI table to support Elan touchpad found in Lenovo IdeaPad 330-15IGM. Signed-off-by: Mikhail Nikiforov <jackxviichaos@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2018-10-15dmaengine: owl: Fix warnings generated during buildManivannan Sadhasivam
Following warnings are generated when compiled with W=1, drivers/dma/owl-dma.c:170: warning: Function parameter or member 'cyclic' not described in 'owl_dma_txd' drivers/dma/owl-dma.c:198: warning: Function parameter or member 'cfg' not described in 'owl_dma_vchan' drivers/dma/owl-dma.c:198: warning: Function parameter or member 'drq' not described in 'owl_dma_vchan' drivers/dma/owl-dma.c:225: warning: Function parameter or member 'irq' not described in 'owl_dma' Fix this by adding comments for relevant struct members to appear in kernel-doc. Fixes: d64e1b3f5cce ("dmaengine: owl: Add Slave and Cyclic mode support for Actions Semi Owl S900 SoC") Reported-by: Vinod Koul <vinod.koul@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2018-10-15mmc: pwrseq_simple: Fix incorrect handling of GPIO bitmapJanusz Krzysztofik
Commit b9762bebc633 ("gpiolib: Pass bitmaps, not integer arrays, to get/set array") changed the way GPIO values are passed to gpiod_get/set_array_value() and friends. The new code introduced into mmc_pwrseq_simple_set_gpios_value() incorrectly interpretes the 'value' argument as a bitmap of GPIO values and assigns it directly to the 'values' bitmap variable passed to gpiod_set_array_value_cansleep() instead of filling that bitmap with bits equal to the 'value' argument. As a result, only member 0 of the array is handled correctly. Moreover, wrong assumption is taken about the 'values' bitmap size not exceding the number of bits of the 'value' argument type. Fix it. Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-15gpio: fix SNPS_CREG kconfig dependency warningRandy Dunlap
Fix kconfig warning for GPIO_SNPS_CREG: WARNING: unmet direct dependencies detected for OF_GPIO Depends on [n]: GPIOLIB [=y] && OF [=n] && HAS_IOMEM [=y] Selected by [y]: - GPIO_SNPS_CREG [=y] && GPIOLIB [=y] && HAS_IOMEM [=y] && (ARC || COMPILE_TEST [=y]) Drivers in drivers/gpio/Kconfig depend on OF_GPIO, not select it. This prevents attempting to build when OF is not enabled. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-15pinctrl: renesas: Fix platform_no_drv_owner.cocci warningsYueHaibing
Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-15pinctrl: mediatek: Make eint_m u16Manivannan Sadhasivam
For SoC's which lacks EINT support, U16_MAX is assigned to both eint_m and eint_n through macro NO_EINT_SUPPORT. This will generate integer overflow warning because eint_m is declared as u8 type. Hence modify the eint_m type to u16. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-15PCI: mediatek: Fix class type for MT7622 to PCI_CLASS_BRIDGE_PCIHonghui Zhang
commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class type for MT7622") erroneously set the class type for MT7622 to PCI_CLASS_BRIDGE_HOST. The PCIe controller of MT7622 integrates a Root Port that has type 1 configuration space header and related bridge windows. The HW default value of this bridge's class type is invalid. Fix its class type and set it to PCI_CLASS_BRIDGE_PCI to match the hardware implementation. Fixes: 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class type for MT7622") Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: reworked the commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2018-10-15PCI: mediatek: Fix mtk_pcie_find_port() endpoint/port matching logicHonghui Zhang
The Mediatek's host controller has two slots, each with its own control registers. The host driver needs to identify what slot is connected to what port in order to access the device's configuration space. Current code retrieving slot connected to a given endpoint device. Assuming each slot is connected to one endpoint device as below: host bridge bus 0 --> __________|_______ | | | | slot 0 slot 1 bus 1 -->| bus 2 --> | | | EP 0 EP 1 During PCI enumeration, system software will scan all the PCI devices on every bus starting from devfn 0. Using PCI_SLOT(devfn) for matching an endpoint to its slot is erroneous in that the devfn does not contain the hierarchical bus numbering in it. In order to match an endpoint with its slot (and related port), the PCI tree must be walked up to the root bus (where the root ports are situated) and then the PCI_SLOT(devfn) matching logic can be correctly applied for matching. This patch fixes the mtk_pcie_find_port() slot matching logic by adding appropriate PCI tree walking code to retrieve the slot/port a given endpoint is connected to. Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: rewrote the commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2018-10-15mmc: mediatek: drop too much code of tuning methodChaotian Jing
the tuning code is becoming more and more bloated, let's make the set cmd/data delay to inline function to avoid too much redundant code. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: mediatek: add MT8183 MMC driver supportChaotian Jing
MT8183 puts the tune register at top layer, so need add new code to support it. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: mediatek: tune CMD/DATA togetherChaotian Jing
for MSDC IP which supports both data tune and async fifo, it can tune cmd/data together. which can save the time and make the tune result of CMD more stable as data line are 4bit or 8bit. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: mediatek: fix cannot receive new request when msdc_cmd_is_ready failChaotian Jing
when msdc_cmd_is_ready return fail, the req_timeout work has not been inited and cancel_delayed_work() will return false, then, the request return directly and never call mmc_request_done(). so need call mod_delayed_work() before msdc_cmd_is_ready() Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: mediatek: fill the actual clock for mmc debugfsChaotian Jing
as the mmc core layer has the mmc->actual_clock, so fill it and drop msdc_host->sclk. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: uniphier-sd: avoid using broken DMA RX channelMasahiro Yamada
host->chan_rx is NULL when UNIPHIER_SD_CAP_BROKEN_DMA_RX quirk flag is set. In this case, it should not set up DMA. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: uniphier-sd: fix DMA disablingMasahiro Yamada
Once DMA is enabled, it is not possible to disable it because uniphier_sd_dma_endisable() always sets the DMA_ENABLE_DMASDRW bit regardless of the argument 'enable'. It should disable DMA when 'enable' is false. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: tmio: simplify the DMA mode testMasahiro Yamada
host->chan_{rx,tx} represents the DMA capability of the platform. Even if DMA is supported, there are cases where we want to use PIO, for example, data length is short enough as commit 5f52c3552946 ("mmc: tmio: use PIO for short transfers") mentioned. Regarding the hardware control flow, we are interested in whether DMA is currently enabled or not, instead of whether the platform has the DMA capability. Hence, the several conditionals in tmio_mmc_core.c end up with checking host->chan_{rx,tx} and !host->force_pio. This is not nice. Let's flip the flag host->force_pio into host->dma_on. host->dma_on represents whether the DMA is currently enabled or not. This flag is set false in the beginning of each command, then should be set true by tmio_mmc_start_dma() when the DMA is turned on. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: tmio: remove TMIO_MMC_HAVE_HIGH_REG flagMasahiro Yamada
TMIO_MMC_HAVE_HIGH_REG is confusing due to its counter-intuitive name. All the TMIO MMC variants (TMIO MMC, Renesas SDHI, UniPhier SD) actually have high registers. It is just that each of them implements its own registers there. The original IP from Panasonic only defines registers 0x00-0xff in the bus_shift=1 review. The register area above them is platform-dependent. In fact, TMIO_MMC_HAVE_HIGH_REG is set only by tmio-mmc.c and used to test the accessibility of CTL_SDIO_REGS. Because it is specific to the TMIO MFD variant, the right thing to do is to move such registers to tmio_mmc.c and delete the TMIO_MMC_HAVE_HIGH_REG flag. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: tmio: move MFD variant reset to a platform hookMasahiro Yamada
CTL_RESET_SDIO register is specific to the TMIO MFD (tmio_mmc.c). Add a new hook host->reset() for performing a platform-specific reset sequence, and move CTL_RESET_SDIO over there. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: renesas_sdhi: Add r8a77470 SDHI1 supportFabrizio Castro
The RZ/G1C (a.k.a. R8A77470) comes with three SDHI interfaces, SDHI0 and SDHI2 are compatible with the R-Car Gen2 SDHIs, SDHI1 is compatible with R-Car Gen3 SDHIs and it can be used as eMMC as well. This patch adds driver compatibility, and makes sure both drivers get compiled for the R8A77470. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>