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2018-12-14PCI/AER: Queue one GHES event, not several uninitialized onesYanjiang Jin
ecae65e133f2 ("PCI/AER: Use kfifo_in_spinlocked() to insert locked elements") replaced kfifo_put() with kfifo_in_spinlocked(), but passed the *size* of the queue entry, where kfifo_in_spinlocked() expects the *number* of entries to be copied. We want to insert only one element into kfifo, not "sizeof(entry) = 16". Without this patch, we would get 15 uninitialized elements. Fixes: ecae65e133f2 ("PCI/AER: Use kfifo_in_spinlocked() to insert locked elements") Signed-off-by: Yanjiang Jin <yanjiang.jin@hxt-semitech.com> [bhelgaas: changelog] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com>
2018-12-14Merge tag 'pinctrl-v4.20-3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "Three pin control fixes for the v4.20 series. Just odd drivers, so nothing particularly interesting: - Set the tile property on Qualcomm SDM60. - Fix up enable register calculation for the Meson - Fix an IRQ offset on the Sunxi (Allwinner)" * tag 'pinctrl-v4.20-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: sunxi: a83t: Fix IRQ offset typo for PH11 pinctrl: meson: fix pull enable register calculation pinctrl: sdm660: Set tile property for pingroups
2018-12-14Merge tag 'drm-fixes-2018-12-14' of git://anongit.freedesktop.org/drm/drmLinus Torvalds
Pull drm fixes from Dave Airlie: "While I hoped things would calm down, the world hasn't joined with me, but it's a few things scattered over a wide area. The i915 workarounds regression fix is probably the largest, the rest are more usual sized. We also get some new AMD PCI IDs. There is also a patch in here to MAINTAINERS to added Daniel as an official DRM toplevel co-maintainer, he's decided he wants to step up and share the glory, and he'll likely process next weeks fixes while I'm away on holidays. Summary: amdgpu: - some new PCI IDs - fixed firmware image updates - power management fixes - locking warning fix nouveau: - framebuffer flushing fix - memory leak fix - tegra device init regression fix vmwgfx: - OOM kernel memory fix - excess return in function fix i915: - the biggest fix is a regression fix where workarounds weren't getting reapplied after a gpu hang causing further crashing, this fixes the workaround application to make it happen again - GPU hang fixes for Braswell and some GEN3 GPUs - GVT fix for broadwell tiling rockchip: - revert to fix a regression causing a WARN on shutdown mediatek: - avoid crash attaching to non-existant bridges" * tag 'drm-fixes-2018-12-14' of git://anongit.freedesktop.org/drm/drm: (23 commits) drm/vmwgfx: Protect from excessive execbuf kernel memory allocations v3 MAINTAINERS: Daniel for drm co-maintainer drm/amdgpu: drop fclk/gfxclk ratio setting drm/vmwgfx: remove redundant return ret statement drm/i915: Flush GPU relocs harder for gen3 drm/i915: Allocate a common scratch page drm/i915/execlists: Apply a full mb before execution for Braswell drm/nouveau/kms: Fix memory leak in nv50_mstm_del() drm/nouveau/kms/nv50-: also flush fb writes when rewinding push buffer drm/amdgpu: Fix DEBUG_LOCKS_WARN_ON(depth <= 0) in amdgpu_ctx.lock Revert "drm/rockchip: Allow driver to be shutdown on reboot/kexec" drm/nouveau/drm/nouveau: tegra: Call nouveau_drm_device_init() drm/amdgpu/powerplay: Apply avfs cks-off voltages on VI drm/amdgpu: update SMC firmware image for polaris10 variants drm/amdkfd: add new vega20 pci id drm/amdkfd: add new vega10 pci ids drm/amdgpu: add some additional vega20 pci ids drm/amdgpu: add some additional vega10 pci ids drm/amdgpu: update smu firmware images for VI variants (v2) drm/i915: Introduce per-engine workarounds ...
2018-12-14drm/amdgpu/psp: Correct and refine the vmr support. (v2)Emily Deng
Currently driver only psp v11 support vmr. v2: squash in unused variable removal (Alex) Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu/psp_v3_1: Get psp fw version through reading registerEmily Deng
If PSP FW is running already, driver will not load PSP FW again and skip it. So psp fw version is not correct if reading it from FW binary file, need to get right version from register. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu: access register without KIQEmily Deng
There is no need to access register such as mmSMC_IND_INDEX_11 and mmSMC_IND_DATA_11, PCIE_INDEX, PCIE_DATA through KIQ because they are VF-copy. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu: kfd_pre_reset outside req_full_gpu cause sriov hangwentalou
XGMI hive put kfd_pre_reset into amdgpu_device_lock_adev, but outside req_full_gpu of sriov. It would make sriov hang during reset. Signed-off-by: Wentao Lou <Wentao.Lou@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14x86/hyper-v: move synic/stimer control structures definitions to hyperv-tlfs.hVitaly Kuznetsov
We implement Hyper-V SynIC and synthetic timers in KVM too so there's some room for code sharing. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-12-14Merge tag 'usb-serial-4.20-rc7' of ↵Greg Kroah-Hartman
https://git.kernel.org/pub/scm/linux/kernel/git/johan/usb-serial into usb-linus Johan writes: USB-serial fixes for 4.20-rc7 Here are some new modem device ids. All have been in linux-next with no reported issues. Signed-off-by: Johan Hovold <johan@kernel.org> * tag 'usb-serial-4.20-rc7' of https://git.kernel.org/pub/scm/linux/kernel/git/johan/usb-serial: USB: serial: option: add Telit LN940 series USB: serial: option: add Fibocom NL668 series USB: serial: option: add Simcom SIM7500/SIM7600 (MBIM mode) USB: serial: option: add GosunCn ZTE WeLink ME3630 USB: serial: option: add HP lt4132
2018-12-14pinctrl: sunxi: Deal with per-bank regulatorsMaxime Ripard
The Allwinner SoCs have on most of their GPIO banks a regulator input. This issue was mainly ignored so far because either the regulator was a static regulator that would be providing power anyway, or the bank was used for a feature unsupported so far (CSI). For the odd cases, enabling it in the bootloader was the preferred option. However, now that we are starting to support those features, and that we can't really rely on the bootloader for this, we need to model those regulators as such in the DT. This is slightly more complicated than what it looks like, since some regulators will be tied to the PMIC, and in order to have access to the PMIC bus, you need to mux its pins, which will need the pinctrl driver, that needs the regulator driver to be registered. And this is how you get a circular dependency. In practice however, the hardware cannot fall into this case since it would result in a completely unusable bus. In order to avoid that circular dependency, we can thus get and enable the regulators at pin_request time. We'll then need to account for the references of all the pins of a particular branch to know when to put the reference, but it works pretty nicely once implemented. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14pinctrl: Use of_node_name_eq for node name comparisonsRob Herring
Convert string compares of DT node names to use of_node_name_eq helper instead. This removes direct access to the node name pointer. Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: linux-gpio@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14Merge tag 'hyperv-fixes-4.20-rc6' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux into char-misc-linus Sasha writes: hyperv-fixes-4.20-rc6 * tag 'hyperv-fixes-4.20-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux: Drivers: hv: vmbus: Return -EINVAL for the sys files for unopened channels x86, hyperv: remove PCI dependency
2018-12-14gpio: pca953x: Restore registers after suspend/resume cycleMarek Vasut
It is possible that the PCA953x is powered down during suspend. Use regmap cache to assure the registers in the PCA953x are in line with the driver state after resume. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Zap single use of pca953x_read_single()Marek Vasut
Drop pca953x_write_single() which is used in one place. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Zap ad-hoc reg_output cacheMarek Vasut
Replace the ad-hoc reg_output output register caching with generic regcache cache. Drop pca953x_write_single() which is no longer used. This reduces code duplication. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Zap ad-hoc reg_direction cacheMarek Vasut
Replace the ad-hoc reg_direction direction register caching with generic regcache cache. This reduces code duplication. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Perform basic regmap conversionMarek Vasut
Convert the driver to use regmap to access the chips. Due to the convoluted register mapping scheme, implement read/write/volatile check functions that untangle the mess and perform check accordingly. This patch does not zap the internal register cache of the PCA953x driver, nor does it push the regmap access down into the gpiochip accessors to simplify the review. All that is in subsequent patches. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Extract the register address mangling to single functionMarek Vasut
Instead of having the I2C register calculation function spread across multiple accessor functions, pull it out into a single function which returns the adjusted register address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Zap ad-hoc I2C block write in multi GPIO setMarek Vasut
The ad-hoc i2c block write can be replaced by standard register accessor function, which correctly handles all the chip details and differences. Do so to simplify the code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Factor out common code from device_pca95xx_init()Marek Vasut
The PCA957x and PCA953x init functions are almost the same, except for the different register mapping and one extra write to BKEN register in case of PCA957x. Factor out the common code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Unify pca953x_{read,write}_regs_{8,mul}()Marek Vasut
At this point, the pca953x_{read,write}_regs_mul() can read single bank PCA953x GPIO chips as well. Merge the _8 and _mul functions together to simplify the code a bit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Unify pca953x_{read,write}_regs_{16,24}()Marek Vasut
At this point, these two functions only differ in whether they do or do not set the address increment bit. The 16 GPIO case does not need to set the AI bit, except for PCA9575 on write, while the 24 GPIO and more case does set the AI bit always. Merge these two functions together to simplify the code a bit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Unify pca95{3,7}x_write_regs_16()Marek Vasut
At this point, these two functions only differ in whether they do or do not set the address increment bit on PCA9575. Merge these two functions together to simplify the code a bit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Repair multi-byte IO address increment on PCA9575Marek Vasut
The multi-byte IO on various pca953x chips requires the auto-increment bit, while other chips toggle the LSbit automatically. Note that LSbit toggling only alternates between two registers during the IO, it is not the same as address auto-increment. The driver currently assumes that #gpios > 16 implies auto-increment, while #gpios <= 16 implies LSbit toggling. This is incorrect at there are chips with 16 GPIOs which require the auto-increment bit. The PCA9575, according to NXP datasheet rev. 4.2 from 16 April 2015, section 7.3 Command Register, the bit 7 in command register is the auto-increment bit, which allows programming multiple registers sequentially. Set this bit both in pca953x_gpio_set_multiple(), where it fixes the multi register programming, and in pca957x_write_regs_16(), where is simplifies the function. In fact, the pca957x_write_regs_16() now looks rather similar to pca953x_write_regs_24() and pca953x_write_regs_16(), which is intended for subsequent patches. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Fix AI overflow on PCAL6524Marek Vasut
The PCAL_PINCTRL_MASK is too large. The extended register block on PCAL6524, which is the largest chip with this block, has the block limited to address range 0x40..0x7f. This is because the bit 7 in the command register is used for the Address Increment functionality. Trim the mask to 0x60 to match the datasheet and to prevent accidental overwrite of the AI bit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: pca953x: Deduplicate the bank_shiftMarek Vasut
The bank_shift = fls(...) code was duplicated in the driver 5 times, pull it into separate function. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14gpio: tegra186: Rename flow variable to typeThierry Reding
The IRQ core code refers to the interrupt type by that name, whereas the term flow is almost never used. Some GPIO controllers use the term flow_type, but it is most consistent to just go with the IRQ core terminology. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14Merge tag 'intel-gpio-v4.21-1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel intel-gpio for v4.21-1 Use managed resource allocation in pch and sodaville drivers. Switch to use for_each_set_bit() in IRQ handlers. Headers clean up. Sort headers in inclusion block alphabetically for better maintenance. Convert to SPDX identifier and fixing MODULE_LICENSE() when appropriate. Additional format fixes to rectify debug and message printing. There is a commit which had been applied to v4.20-rc4, that's why dup. - c3bc3ff9e8019fba74ce62bfb501d710c2fca9d3 MAINTAINERS: Do maintain Intel GPIO drivers via separate tree The following is an automated git shortlog grouped by driver: ich: - Convert to use SPDX identifier - Sort headers alphabetically - Join string literals back - Convert pr_<level> to dev_<level> - Switch to use struct device instead of platform_device - Simplify error handling in ichx_write_bit() intel-mid: - Convert to use SPDX identifier - Remove linux/module.h and sort headers lynxpoint: - Convert to use SPDX identifier - Remove linux/init.h and sort headers - Use for_each_set_bit() in IRQ handler MAINTAINERS: - Do maintain Intel GPIO drivers via separate tree merrifield: - Convert to use SPDX identifier - Remove linux/init.h pch: - Convert to use SPDX identifier - Sort headers alphabetically - Remove duplicate assignments - Remove redundant __func__ from debug print - Use for_each_set_bit() in IRQ handler - Convert to dev_pm_ops - Convert to use managed functions pcim_* and devm_* sch: - Convert to use SPDX identifier - Remove linux/init.h and sort headers sodaville: - Convert to use SPDX identifier - Sort headers alphabetically - Use for_each_set_bit() in IRQ handler - Convert to use managed functions pcim_* and devm_*
2018-12-14gpio: Pass a flag to gpiochip_request_own_desc()Linus Walleij
Before things go out of hand, make it possible to pass flags when requesting "own" descriptors from a gpio_chip. This is necessary if the chip wants to request a GPIO with active low semantics, for example. Cc: Janusz Krzysztofik <jmkrzyszt@gmail.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Roger Quadros <rogerq@ti.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14xhci: Don't prevent USB2 bus suspend in state check intended for USB3 onlyMathias Nyman
The code to prevent a bus suspend if a USB3 port was still in link training also reacted to USB2 port polling state. This caused bus suspend to busyloop in some cases. USB2 polling state is different from USB3, and should not prevent bus suspend. Limit the USB3 link training state check to USB3 root hub ports only. The origial commit went to stable so this need to be applied there as well Fixes: 2f31a67f01a8 ("usb: xhci: Prevent bus suspend if a port connect change or polling state is detected") Cc: stable@vger.kernel.org Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-12-14Merge branch 'opp/linux-next' of ↵Rafael J. Wysocki
git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm Pull more operating performance points (OPP) framework changes for v4.21 from Viresh Kumar: "- Fix missing OPP debugfs directory (Viresh Kumar). - Make genpd performance states orthogonal to idlestates (Ulf Hansson). - Propagate performance state changes from genpd to its master (Viresh Kumar). - Minor improvement of some OPP helpers (Viresh Kumar)." * 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm: PM / Domains: Propagate performance state updates PM / Domains: Factorize dev_pm_genpd_set_performance_state() PM / Domains: Save OPP table pointer in genpd OPP: Don't return 0 on error from of_get_required_opp_performance_state() OPP: Add dev_pm_opp_xlate_performance_state() helper OPP: Improve _find_table_of_opp_np() PM / Domains: Make genpd performance states orthogonal to the idlestates OPP: Fix missing debugfs supply directory for OPPs OPP: Use opp_table->regulators to verify no regulator case
2018-12-14regulator: mcp16502: add support for suspendAndrei.Stefanescu@microchip.com
This patch adds support for entering/resuming suspend states. It does this by setting the LPM pin of the PMIC. When suspending the PMIC will enter the Low-power mode when the LPM pin will be set to high. If the suspend target state is suspend-to-mem, the PMIC will transition to Hibernate mode, otherwise, if it is standby, it will remain in Low-power mode. Signed-off-by: Andrei Stefanescu <andrei.stefanescu@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-14iwlwifi: mvm: don't check if a pointer is set if it can't be unsetEmmanuel Grumbach
We used to have many versions of statistics notification coming from the firmware. In one of the cleanup patches, we forgot to clean the code that checks if data->general is set. Since it is always set, remove the check. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: pcie: set cmd_len in the correct placeSara Sharon
command len is set too early in the code, since when building AMSDU, the size changes. This causes the byte count table to have the wrong size. Fixes: a0ec0169b7a9 ("iwlwifi: support new tx api") Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: mvm: radiotap: remove UL_DL bit in HE TRIG_BASEDShaul Triebitz
UL_DL is irrelevant to HE TRIG_BASED PPDU. Signed-off-by: Shaul Triebitz <shaul.triebitz@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: mvm: add L-SIG length to radiotapShaul Triebitz
We may have the L-SIG length depending on the phy_data info type; add it to radiotap when we do. Move getting the phy_data out one layer up and the info type into it so we can use this data more generically. We need to call the iwl_mvm_rx_he() function for other reasons as well, so can't just combine all of that into something like iwl_mvm_parse_phy_data(). Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Shaul Triebitz <shaul.triebitz@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: mvm: change PHY data RX for HE radiotapShaul Triebitz
The firmware changed the PHY data API, so follow suit. Some data is now available even for HT/VHT frames, so the info type in the metadata was changed. This change isn't backwards compatible, but 1) the firmware with the old API was never released; 2) the only overlap in the info type field is from the old type of TB to the new of HT, so this basically just means that with older FW and newer driver the data will be considered missing. While at it, remove the extra code to set the LTF syms corresponding to the streams and use the data from the device instead - we don't really need this in any case other than when we have it from the device. As the new API gives use the spatial reuse 1-4 fields for trigger-based PPDUs, also expose that to radiotap. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Shaul Triebitz <shaul.triebitz@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: pcie: fix erroneous printSara Sharon
When removing the driver, the following flow can happen: 1. host command is in progress, for example at index 68. 2. RX interrupt is received with the response. 3. Before it is processed, the remove flow kicks in, and calls iwl_pcie_txq_unmap. The function cleans all DMA, and promotes the read pointer to 69. 4. RX thread proceeds with the processing, and is calling iwl_pcie_cmdq_reclaim, which will print this error: iwl_pcie_cmdq_reclaim: Read index for DMA queue txq id (0), index 4 is out of range [0-256] 69 69. Detect this situation, and avoid the print. Change it to warning while at it, to make such issues more noticeable in the future. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: mvm: force TCM re-evaluation on TCM resumeAvraham Stern
When traffic load is not low or low latency is active, TCM schedules re-evaluation work so in case traffic stops TCM will detect that traffic load has become low or that low latency is no longer active. However, if TCM is paused when the re-evaluation work runs, it does not re-evaluate and the re-evaluation work is no longer scheduled. As a result, TCM will not indicate that low latency is no longer active or that traffic load is low when traffic stops. Fix this by forcing TCM re-evaluation when TCM is resumed in case low latency is active or traffic load is not low. Signed-off-by: Avraham Stern <avraham.stern@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: remove all unnecessary occurrences of nvm_calib_verLuca Coelho
Now that nvm_calib_ver is not checked in opmodes other than dvm, we can remove it from all irrelevant configurations. Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: move iwl_nvm_check_version() into dvmLuca Coelho
This function is only half-used by mvm (i.e. only the nvm_version part matters, since the calibration version is irrelevant), so it's pointless to export it from iwlwifi. If mvm uses this function, it has the additional complexity of setting the calib version to a bogus value on all cfg structs. To avoid this, move the function to dvm and make a simple comparison of the nvm_version in mvm instead. Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: remove useless NVM_HW_SECTION_NUM_FAMILY_* macrosLuca Coelho
These macros are useless because each one of them is used only once and the element they are assigned to is already pretty clear about what they mean, "nvm_hw_section_num". Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: don't define OTP_LOW_IMAGE_SIZE per family, but per sizeLuca Coelho
Using OTP_LOW_IMAGE_SIZE_FAMILY_8000/9000/22000 only obfuscates the actual values, since these 3 are the same. Redefine the values per size so it's easier to understand and compare the different configurations. Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: mvm: activate apply pointsSara Sharon
Call the previously introduced apply points entry point when reaching an apply point. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: add support for triggering ini triggersSara Sharon
Add support for ini triggers. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: dbg: dump data according to the new ini TLVsSara Sharon
When ini TLVs are loaded, dump data according to the stored configuration. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14iwlwifi: move common 9000 cfg parameters to common macroLuca Coelho
The ht_params, nvm_ver, nvm_calib_ver and max_ht_ampdu_exponent elements in 9000 devices are always the same. Move them to the common macro. Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2018-12-14Merge branch 'opp/genpd/propagation' into opp/linux-nextViresh Kumar
2018-12-14PM / Domains: Propagate performance state updatesViresh Kumar
Currently a genpd only handles the performance state requirements from the devices under its control. This commit extends that to also handle the performance state requirement(s) put on the master genpd by its sub-domains. There is a separate value required for each master that the genpd has and so a new field is added to the struct gpd_link (link->performance_state), which represents the link between a genpd and its master. The struct gpd_link also got another field prev_performance_state, which is used by genpd core as a temporary variable during transitions. On a call to dev_pm_genpd_set_performance_state(), the genpd core first updates the performance state of the masters of the device's genpd and then updates the performance state of the genpd. The masters do the same and propagate performance state updates to their masters before updating their own. The performance state transition from genpd to its master is done with the help of dev_pm_opp_xlate_performance_state(), which looks at the OPP tables of both the domains to translate the state. Tested-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2018-12-14PM / Domains: Factorize dev_pm_genpd_set_performance_state()Viresh Kumar
Separate out _genpd_set_performance_state() and _genpd_reeval_performance_state() from dev_pm_genpd_set_performance_state() to handle performance state update related stuff. This will be used by a later commit. Tested-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
generated by cgit (git 2.34.1) at 2025-09-18 21:36:27 +0000