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2013-07-01UBI: support ubi_num on mtd.ubi command lineMike Frysinger
I want to be able to add UBI volumes with specific numbers, but the command line API doesn't have that atm. Add an additional token to support it. Artem: amended the patch a little bit. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2013-06-30Input: cyttsp4 - SPI driver for Cypress TMA4XX touchscreen devicesFerruh Yigit
Cypress TrueTouch(tm) Standard Product controllers, Generation4 devices, SPI adapter module. This driver adds communication support with TTSP controller using SPI bus. Signed-off-by: Ferruh Yigit <fery@cypress.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2013-06-30Input: cyttsp4 - I2C driver for Cypress TMA4XX touchscreen devicesFerruh Yigit
Cypress TrueTouch(tm) Standard Product controllers, Generation4 devices, I2C adapter module. This driver adds communication support with TTSP controller using I2C bus. Signed-off-by: Ferruh Yigit <fery@cypress.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2013-06-30Input: cyttsp4 - add core driver for Cypress TMA4XX touchscreen devicesFerruh Yigit
Cypress TrueTouch(tm) Standard Product controllers, Generetion4 devices, Core driver. Core driver is interface between host and TTSP controller and processes data sent by controller. Responsibilities of module are IRQ handling, reading system information registers and sending multi-touch protocol type B events. Signed-off-by: Ferruh Yigit <fery@cypress.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2013-06-30Input: cyttsp - I2C driver split into two modulesFerruh Yigit
Existing I2C code is for TrueTouch Gen3 devices TrueTouch Gen4 device is using same protocol, will split driver into two pieces to use common code with both drivers. Read/Write functions parameter list modified, since shared code will be used by two separate drivers and these drivers are not sharing same structs, parameters updated to use common structures. Signed-off-by: Ferruh Yigit <fery@cypress.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2013-07-01Merge branch 'drm-nouveau-next' of ↵Dave Airlie
git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next - Various fixes that make surviving concurrent piglit more possible. - Buffer object deletion no longer synchronous - Context/register initialisation updates that have been reported to solve some stability issues (particularly on some problematic GF119 chips) - Kernel side support for VP2 video decoding engines * 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (44 commits) drm/nvd0-/disp: handle case where display engine is missing/disabled drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4 drm/nouveau/bsp/nv84: initial vp2 engine implementation drm/nouveau/vp/nv84: initial vp2 engine implementation drm/nouveau/core: xtensa engine base class implementation drm/nouveau/vdec: fork vp3 implementations from vp2 drm/nouveau/core: move falcon class to engine/ drm/nouveau/kms: don't fail if there's no dcb table entries drm/nouveau: remove limit on gart drm/nouveau/vm: perform a bar flush when flushing vm drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches drm/nvc8/gr: update initial register/context values drm/nvc4/gr: update initial register/context values drm/nvc1/gr: update initial register/context values drm/nvc3/gr: update initial register/context values drm/nvc0/gr: update initial register/context values drm/nvd9/gr: update initial register/context values drm/nve4/gr: update initial register/context values drm/nvc0-/gr: bump maximum gpc/tpc limits drm/nvf0/gr: initial register/context setup ...
2013-07-01drm/nvd0-/disp: handle case where display engine is missing/disabledMaarten Lankhorst
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4Ben Skeggs
No code changes, proven by envyas producing identical binaries. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/bsp/nv84: initial vp2 engine implementationIlia Mirkin
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/vp/nv84: initial vp2 engine implementationIlia Mirkin
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/core: xtensa engine base class implementationIlia Mirkin
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/vdec: fork vp3 implementations from vp2Ilia Mirkin
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/core: move falcon class to engine/Ben Skeggs
Not really "core" per-se. About to merge Ilia's work adding another similar class for the VP2 xtensa engines, so, seems like a good time to move all these to engine/. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/kms: don't fail if there's no dcb table entriesBen Skeggs
Fixes module not loading on Tesla K20. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau: remove limit on gartMaarten Lankhorst
Most graphics cards nowadays have a multiple of this limit as their vram, so limiting GART doesn't seem to make much sense. Signed-off-by: Maarten >Lnkhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/vm: perform a bar flush when flushing vmMaarten Lankhorst
Appears to fix the regression from "drm/nvc0/vm: handle bar tlb flushes internally". nvidia always seems to do this flush after writing values. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switchesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nvc8/gr: update initial register/context valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nvc4/gr: update initial register/context valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nvc1/gr: update initial register/context valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nvc3/gr: update initial register/context valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nvc0/gr: update initial register/context valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nvd9/gr: update initial register/context valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve4/gr: update initial register/context valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nvc0-/gr: bump maximum gpc/tpc limitsBen Skeggs
Needed for GK110, separate commit to catch any unexpected breaks to other parts of the code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nvf0/gr: initial register/context setupBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve7/gr: update initial register/context valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve6/gr: update initial register/context valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau: delay busy bo vma removal until fence signalsBen Skeggs
As opposed to an explicit wait. Allows userspace to not stall waiting on buffer deletion. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/vm: make each vma take a reference on its parent vmBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/core: remove nouveau_mm.mutex, no more usersBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/vm: take subdev mutex, not the mm, protects against race with ↵Ben Skeggs
vm/nvc0 nvc0_vm_flush() accesses the pgd list, which will soon be able to race with vm_unlink() during channel destruction. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nvc0/vm: handle bar tlb flushes internallyBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nv50-/vm: take mutex rather than irqsave spinlockBen Skeggs
These operations can take quite some time, and we really don't want to have to hold a spinlock for too long. Now that the lock ordering for vm and the gr/nv84 hw bug workaround has been reversed, it's possible to use a mutex here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nv50/vm: remove explicit vm knowledge from enginesBen Skeggs
This reverses the lock ordering between VM and gr/nv84:nvc0. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nv50/vm: handle bar tlb flushes internallyBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nvc0/gr: port mp trap handling from calim's kepler codeBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve0/gr: attempt to resume after sm trapsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve0/gr: s/tp/tpc/Ben Skeggs
NVIDIA's name... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve0/fifo: create our playlists up-front, at startupBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nva3/clk: minor improvements to fractional N calculationBen Skeggs
Helps us to get identical numbers to the binary driver for (at least) Kepler memory PLLs, and fixes a rounding error. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/fb: initialise vram controller as pfb sub-objectBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/clk: change init ordering, no longer needed by devinitBen Skeggs
And, will depend on FB/VOLT/DAEMON being ready when it gets initialised so that it can set/restore clocks. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/devinit: move simple pll setting routines to devinitBen Skeggs
These are pretty much useless for reclocking purposes. Lets make it clearer what they're for and move them to DEVINIT to signify they're for the very simple PLL setting requirements of running the init tables. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau: pass generic subdev to calculation routinesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve0/ce: stub interrupt handlerBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve0/ce: link ce2 to its engine, rather than from graphicsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve0/fifo: copy engine context stored in ramfc, not externallyBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve0/ce: create engine object for ce2Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau: pull in latest ucode builds from external treeBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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