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2022-05-05drm/amdgpu/discovery: add psp13 support for PSP 13.0.7Chengming Gui
Enable psp 13 support. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/psp13: add support for MP0 13.0.7Chengming Gui
Enable support in psp code. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/discovery: add gmc11 support for GC 11.0.2Flora Cui
Enable gmc11 support. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: add GMC11 support for GC 11.0.2Flora Cui
Add initial support for GC 11.0.2. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: add UMC 8.11.0 supportFlora Cui
Add initial support for UMC 8.11.0. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: split mmhub v3_0_2 callbacks from mmhub v3_0Hawking Zhang
So we don't need to add ip version check in every callback when there is atc related programming that is only available in mmhub v3_0 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: add mmhub v3_0_2 ip callback functionsHawking Zhang
Unlike mmhub v3_0_0, there is no atc_l2 related registers available in mmhub v3_0_2. Split the mmhub v3_0_2 callback implementations from mmhub v3_0 so we don't need to add ip version check when atc related programming needs to be added to mmhub v3_0_0. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: add mmhub v3_0_2 ip headersHawking Zhang
Add mmhub v3_0_2 register offset and shift masks v2: update to latest headers Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/discovery: add SMUIO_13_0_8 func supportChengming Gui
Add SMUIO funcs for SMUIO_13_0_8. Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/discovery: add hdp6 support for HDP 6.0.1Flora Cui
Enable Host Data Path support. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/discovery: add nbio 4.3 support for NBIO 4.3.1Flora Cui
Enable nbio 4.3 support. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/discovery: add smu13 support for MP1 13.0.7Flora Cui
Enable System Management Unit support. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/discovery: add ih6 support for IH 6.0.2Flora Cui
Enable Interrupt Handler v6 support. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: add support for ATHUB 3.0.2Flora Cui
Add support 3.0.2 to the ATHUB 3.0 code. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/discovery: add soc21 support for GC 11.0.2Flora Cui
Enable soc21 common soc support. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: add soc21 support for GC 11.0.2Flora Cui
Add initial soc21 support. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: enable clock gating for HDP 6.0Evan Quan
Enable HDP 6.0 clock gating. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: enable clock gating for IH 6.0Evan Quan
Enable IH 6.0 clock gating. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: enable MGCG and LS for MMHUB 3.0Evan Quan
Enable MMHUB 3.0 MGCG and LS features. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: enable MGCG and LS for ATHUB 3.0Evan Quan
Enable ATHUB 3.0 MGCG and LS features. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable more dpm features to pair with PMFW 78.31.0Evan Quan
Enables the support for DCN DPM and DCFCLK DS features. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable gfx ulv feature control for SMU 13.0.0Evan Quan
Fulfill the interface for gfx ulv control. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable deep sleep features control for SMU 13.0.0Evan Quan
Fulfill the interface for deep sleep features control. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: support more DPM features for SMU 13.0.0Evan Quan
To pair with 78.30.0 PMFW, support more dpm features: - UCLK DPM (disabled temporarily) - VMEMP Scaling (disabled temporarily) - VDDIO Scaling (disabled temporarily) - GFXCLK DS - SOCCLK DS - MPCLK Deep Sleep on VDD_SOC - MPCLK Deep Sleep on VDD_BACO - Memory Temperature Reading (disabled temporarily) Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: enable more GFX clockgating features for GC 11.0.0Evan Quan
Support more GFX clockgating features(3D_CGCG, 3D_CGLS, MGCG, FGCG and PERF_CLK). Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable df cstate feature for SMU 13.0.0Evan Quan
As the feature is ready with 78.29.0 PMFW. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable PMLOG support for SMU 13.0.0Evan Quan
Fulfill the interface for setting PMLOG DramAddr on SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable ppfeature mask setting for SMU 13.0.0Evan Quan
Fulfill the interfaces for retrieving and setting ppfeature masks on SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable RunDcBtc support for SMU 13.0.0Evan Quan
Fulfill the RunDcBtc for SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable power profile setting for SMU 13.0.0Evan Quan
Fulfill the interfaces for retrieving and setting power profile mode on SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable ac/dc switching for SMU 13.0.0Evan Quan
Fulfill the ->set_power_source interface which notifies PMFW the current system power source(AC/DC). Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable power limit retrieving and setting for SMU 13.0.0Evan Quan
Fulfill the interfaces for retrieving and setting power limit on SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: simplify the return expression of vega10_ih_hw_init()Minghao Chi
Simplify the return expression. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: simplify the return expressionMinghao Chi
Simplify the return expression. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/gfx11: Avoid uninitialised variable 'index'Mike Lothian
This stops clang complaining: drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:376:6: warning: variable 'index' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized] if (ring->is_mes_queue) { ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:433:30: note: uninitialized use occurs here amdgpu_device_wb_free(adev, index); ^~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:376:2: note: remove the 'if' if its condition is always false if (ring->is_mes_queue) { ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:364:16: note: initialize the variable 'index' to silence this warning unsigned index; ^ = 0 Signed-off-by: Mike Lothian <mike@fireburn.co.uk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/gfx10: Avoid uninitialised variable 'index'Mike Lothian
This stops clang complaining: drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3846:6: warning: variable 'index' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized] if (ring->is_mes_queue) { ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3903:30: note: uninitialized use occurs here amdgpu_device_wb_free(adev, index); ^~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3846:2: note: remove the 'if' if its condition is always false if (ring->is_mes_queue) { ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3839:16: note: initialize the variable 'index' to silence this warning unsigned index; ^ = 0 Signed-off-by: Mike Lothian <mike@fireburn.co.uk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/gfx11: Add missing breakMike Lothian
This stops clang complaining: drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:5895:2: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough] default: ^ drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:5895:2: note: insert 'break;' to avoid fall-through default: ^ break; Signed-off-by: Mike Lothian <mike@fireburn.co.uk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05Revert "fbdev: fbmem: add a helper to determine if an aperture is used by a ↵Alex Deucher
fw fb" This reverts commit 9a45ac2320d0a6ae01880a30d4b86025fce4061b. This was added a helper for amdgpu to workaround a runtime pm regression caused by a runtime pm fix in efifb. We now have a better workaround in amdgpu in commit f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are displays attached (v3)") so this workaround is no longer necessary. Since amdgpu was the only user of this interface, we can remove it. Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05Revert "drm/amdgpu: disable runpm if we are the primary adapter"Alex Deucher
This reverts commit b95dc06af3e683d6b7ddbbae178b2b2a21ee8b2b. This workaround is no longer necessary. We have a better workaround in commit f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are displays attached (v3)"). Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05tty: hvc: dcc: Bind driver to CPU core0 for reads and writesShanker Donthineni
Some external debuggers do not handle reads/writes from/to DCC on secondary cores. Each core has its own DCC device registers, so when a core reads or writes from/to DCC, it only accesses its own DCC device. Since kernel code can run on any core, every time the kernel wants to write to the console, it might write to a different DCC. In SMP mode, external debugger creates multiple windows, and each window shows the DCC output only from that core's DCC. The result is that console output is either lost or scattered across windows. Selecting this debug option will enable code that serializes all console input and output to core 0. The DCC driver will create input and output FIFOs that all cores will use. Reads and writes from/to DCC are handled by a workqueue that runs only core 0. This is a debug feature to be used only in early stage development where debug serial console support would not be present. It disables PM feature like CPU hotplug and is not suitable for production environment. Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> Acked-by: Adam Wallis <awallis@codeaurora.org> Signed-off-by: Timur Tabi <timur@codeaurora.org> Signed-off-by: Elliot Berman <eberman@codeaurora.org> Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Link: https://lore.kernel.org/r/20220428090858.14489-1-quic_saipraka@quicinc.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05serial: pch: inline pop_tx() into handle_tx()Jiri Slaby
Given pop_tx() is a simple loop, inline it directly into handle_tx(). The code in handle_tx() looks much saner and straightforward now. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220503080808.28332-6-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05serial: pch: simplify pop_tx() even moreJiri Slaby
1) take uart_tx_stopped into account every loop (the same as other uart drivers) 2) no need for 'count' variable, operate on 'size' directly This allows inlining this into handle_tx() nicely in the next patch. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220503080808.28332-5-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05serial: pch: remove xmit circ_buf size double checkJiri Slaby
One is in handle_tx() (as "min(xmit->head - xmit->tail, fifo_size))", another one in pop_tx() (as uart_circ_empty(xmit)). So keep only the latter. This makes the code simpler and size variable is not needed now. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220503080808.28332-4-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05serial: pch: remove debug print from pop_txJiri Slaby
It makes the code overly complicated for no good reason. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220503080808.28332-3-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05serial: pch: decomission pch_uart_hal_write()Jiri Slaby
It's horrid and if we inline it into callers, we can get rid of a lot of sugar around. So: * x_char handling becomes a single iowrite8. * xmit->buf handling is a single loop simply writing characters one by one directly from the buf instead of complex cnt_to_end computations. Until the buf is empty or fifo size is reached. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220503080808.28332-2-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05serial: pch: don't overwrite xmit->buf[0] by x_charJiri Slaby
When x_char is to be sent, the TX path overwrites whatever is in the circular buffer at offset 0 with x_char and sends it using pch_uart_hal_write(). I don't understand how this was supposed to work if xmit->buf[0] already contained some character. It must have been lost. Remove this whole pop_tx_x() concept and do the work directly in the callers. (Without printing anything using dev_dbg().) Cc: <stable@vger.kernel.org> Fixes: 3c6a483275f4 (Serial: EG20T: add PCH_UART driver) Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220503080808.28332-1-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05serial: pch: move size check from pop_tx one level upJiri Slaby
'count' is zero in the pop_tx()'s comparison against 'size'. So the 'if' tries to find out if 'size' is negative or zero and returns in that case. But it cannot be negative, due to previous (size < 0) check in the caller: handle_tx(). So simply move this check from pop_tx() to handle_tx(). Now it's clear that pop_tx() is called only if fifo_size is non-zero. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220503080613.27601-2-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05serial: pic32: restore disabled irqs in pic32_uart_startup()Jiri Slaby
pic32_uart_startup() disables interrupts by local_irq_save(). But the function never enables them. The serial core only holds a mutex, so irqs are not restored. So how could this driver work? This irq handling was already present in the driver's initial commit 157b9394709ed (serial: pic32_uart: Add PIC32 UART driver). So is it a candidate for removal? Anyone has a contact to the author: Andrei Pistirica (I believe the one below -- @microchip.com -- will bounce)? Or to someone else @microchip.com? Cc: Andrei Pistirica <andrei.pistirica@microchip.com> Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220503063122.20957-12-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05serial: pic32: free up irq names correctlyJiri Slaby
struct pic32_sport contains built-up names for irqs. These are freed only in error path of pic32_uart_startup(). And even there, the freeing happens before free_irq(). So fix this by: * moving frees after free_irq(), and * add frees to pic32_uart_shutdown() -- the opposite of pic32_uart_startup(). Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220503063122.20957-11-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05serial: pic32: don't zero members of kzalloc-ated structureJiri Slaby
struct pic32_sport (sport) has just been kzallocated. So there is no need to zero its member (sport->port) now. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220503063122.20957-10-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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