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2020-05-29Bluetooth: hci_qca: Fix qca6390 enable failure after warm rebootZijun Hu
Warm reboot can not reset controller qca6390 due to lack of controllable power supply, so causes firmware download failure during enable. Fixed by sending VSC EDL_SOC_RESET to reset qca6390 within added device shutdown implementation. Signed-off-by: Zijun Hu <zijuhu@codeaurora.org> Tested-by: Zijun Hu <zijuhu@codeaurora.org> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2020-05-29Merge series "Fix regulators coupling for Exynos5800" from Marek Szyprowski ↵Mark Brown
<m.szyprowski@samsung.com>: Hi! This patchset is another attempt to fix the regulator coupling on Exynos5800/5422 SoCs. Here are links to the previous attempts: https://lore.kernel.org/linux-samsung-soc/20191008101709.qVNy8eijBi0LynOteWFMnTg4GUwKG599n6OyYoX1Abs@z/ https://lore.kernel.org/lkml/20191017102758.8104-1-m.szyprowski@samsung.com/ https://lore.kernel.org/linux-pm/cover.1589528491.git.viresh.kumar@linaro.org/ https://lore.kernel.org/linux-pm/20200528131130.17984-1-m.szyprowski@samsung.com/ The problem is with "vdd_int" regulator coupled with "vdd_arm" on Odroid XU3/XU4 boards family. "vdd_arm" is handled by CPUfreq. "vdd_int" is handled by devfreq. CPUfreq initialized quite early during boot and it starts changing OPPs and "vdd_arm" value. Sometimes CPU activity during boot goes down and some low-frequency OPPs are selected, what in turn causes lowering "vdd_arm". This happens before devfreq applies its requirements on "vdd_int". Regulator balancing code reduces "vdd_arm" voltage value, what in turn causes lowering "vdd_int" value to the lowest possible value. This is much below the operation point of the wcore bus, which still runs at the highest frequency. The issue was hard to notice because in the most cases the board managed to boot properly, even when the regulator was set to lowest value allowed by the regulator constraints. However, it caused some random issues, which can be observed as "Unhandled prefetch abort" or low USB stability. Adding more and more special cases to the generic code has been rejected, so the only way to ensure the desired behavior on Exynos5800-based SoCs is to make a custom regulator coupler driver. Best regards, Marek Szyprowski Patch summary: Marek Szyprowski (2): regulator: extract voltage balancing code to separate function soc: samsung: Add simple voltage coupler for Exynos5800 arch/arm/mach-exynos/Kconfig | 1 + drivers/regulator/core.c | 49 ++++++++------- drivers/soc/samsung/Kconfig | 3 + drivers/soc/samsung/Makefile | 1 + .../soc/samsung/exynos-regulator-coupler.c | 59 +++++++++++++++++++ include/linux/regulator/coupler.h | 8 +++ 6 files changed, 101 insertions(+), 20 deletions(-) create mode 100644 drivers/soc/samsung/exynos-regulator-coupler.c -- 2.17.1 base-commit: 8f3d9f354286745c751374f5f1fcafee6b3f3136
2020-05-29regulator: extract voltage balancing code to the separate functionMarek Szyprowski
Move the coupled regulators voltage balancing code to the separate function and allow to call it from the custom regulator couplers. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20200529124940.10675-2-m.szyprowski@samsung.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-05-29iommu: Fix reference count leak in iommu_group_alloc.Qiushi Wu
kobject_init_and_add() takes reference even when it fails. Thus, when kobject_init_and_add() returns an error, kobject_put() must be called to properly clean up the kobject. Fixes: d72e31c93746 ("iommu: IOMMU Groups") Signed-off-by: Qiushi Wu <wu000273@umn.edu> Link: https://lore.kernel.org/r/20200527210020.6522-1-wu000273@umn.edu Signed-off-by: Joerg Roedel <jroedel@suse.de>
2020-05-29EDAC/amd64: Remove redundant assignment to variable ret in hw_info_get()Colin Ian King
The variable ret is being assigned with a value that is never read and it is being updated later with a new value. The initialization is redundant so remove it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20200429154847.287001-1-colin.king@canonical.com
2020-05-29Merge remote-tracking branch 'regmap/for-5.8' into regmap-nextMark Brown
2020-05-29Merge remote-tracking branch 'regmap/for-5.7' into regmap-linusMark Brown
2020-05-29Merge series "regmap: provide simple bitops and use them in a driver" from ↵Mark Brown
Bartosz Golaszewski <brgl@bgdev.pl> Bartosz Golaszewski <bgolaszewski@baylibre.com>: From: Bartosz Golaszewski <bgolaszewski@baylibre.com> I noticed that oftentimes I use regmap_update_bits() for simple bit setting or clearing. In this case the fourth argument is superfluous as it's always 0 or equal to the mask argument. This series proposes to add simple bit operations for setting, clearing and testing specific bits with regmap. The second patch uses all three in a driver that got recently picked into the net-next tree. The patches obviously target different trees so - if you're ok with the change itself - I propose you pick the first one into your regmap tree for v5.8 and then I'll resend the second patch to add the first user for these macros for v5.9. v1 -> v2: - convert the new macros to static inline functions v2 -> v3: - drop unneeded ternary operator Bartosz Golaszewski (2): regmap: provide helpers for simple bit operations net: ethernet: mtk-star-emac: use regmap bitops drivers/base/regmap/regmap.c | 22 +++++ drivers/net/ethernet/mediatek/mtk_star_emac.c | 80 ++++++++----------- include/linux/regmap.h | 36 +++++++++ 3 files changed, 93 insertions(+), 45 deletions(-) base-commit: 8f3d9f354286745c751374f5f1fcafee6b3f3136 -- 2.26.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
2020-05-29regmap: provide helpers for simple bit operationsBartosz Golaszewski
In many instances regmap_update_bits() is used for simple bit setting and clearing. In these cases the last argument is redundant and we can hide it with a static inline function. This adds three new helpers for simple bit operations: set_bits, clear_bits and test_bits (the last one defined as a regular function). Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Link: https://lore.kernel.org/r/20200528154503.26304-2-brgl@bgdev.pl Signed-off-by: Mark Brown <broonie@kernel.org>
2020-05-29gpio: fix locking open drain IRQ linesLinus Walleij
We provided the right semantics on open drain lines being by definition output but incidentally the irq set up function would only allow IRQs on lines that were "not output". Fix the semantics to allow output open drain lines to be used for IRQs. Reported-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Tested-by: Hans Verkuil <hverkuil@xs4all.nl> Cc: Russell King <linux@armlinux.org.uk> Cc: stable@vger.kernel.org # v5.3+ Link: https://lore.kernel.org/r/20200527140758.162280-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-29Bluetooth: btmtkuart: Improve exception handling in btmtuart_probe()Chuhong Yuan
Calls of the functions clk_disable_unprepare() and hci_free_dev() were missing for the exception handling. Thus add the missed function calls together with corresponding jump targets. Fixes: 055825614c6b ("Bluetooth: btmtkuart: add an implementation for clock osc property") Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2020-05-29Bluetooth: hci_qca: Fix suspend/resume functionality failureZijun Hu
@dev parameter of qca_suspend()/qca_resume() represents serdev_device, but it is mistook for hci_dev and causes succedent unexpected memory access. Fix by taking @dev as serdev_device. Fixes: 41d5b25fed0 ("Bluetooth: hci_qca: add PM support") Signed-off-by: Zijun Hu <zijuhu@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2020-05-29mmc: core: Export device/vendor ids from Common CIS for SDIO cardsPali Rohár
Device/vendor ids from Common CIS (Card Information Structure) may be different as device/vendor ids from CIS on particular SDIO function. Kernel currently exports only device/vendor ids from SDIO functions and not "main" device/vendor ids from Common CIS. This patch exports "main" device/vendor ids for SDIO and SD combo cards at top level mmc device in sysfs hierarchy. Userspace can use e.g. udev rules to correctly match whole SDIO card based on Common CIS device/vendor id and not only one particular SDIO function. Having this information in userspace also helps developers to debug whole SDIO card as e.g. kernel mmc quirks use device/vendor ids from Common CIS and not from particular SDIO function. Also it allows to write userspace applications which list all connected SDIO cards based on CIS ids. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Link: https://lore.kernel.org/r/20200527110858.17504-2-pali@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: core: Do not export MMC_NAME= and MODALIAS=mmc:block for SDIO cardsPali Rohár
SDIO non-combo cards are not handled by mmc_block driver and do not have accessible CID register which is used for MMC_NAME= construction. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Link: https://lore.kernel.org/r/20200527110858.17504-1-pali@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: sdhci-of-at91: fix CALCR register being rewrittenEugen Hristev
When enabling calibration at reset, the CALCR register was completely rewritten. This may cause certain bits being deleted unintentedly. Fix by issuing a read-modify-write operation. Fixes: 727d836a375a ("mmc: sdhci-of-at91: add DT property to enable calibration on full reset") Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Link: https://lore.kernel.org/r/20200527105659.142560-1-eugen.hristev@microchip.com Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: sdhci-esdhc-imx: disable the CMD CRC check for standard tuningHaibo Chen
In current code, we add 1ms dealy after each tuning command for standard tuning method. Adding this 1ms dealy is because USDHC default check the CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning IC logic do not wait for the tuning data sending out by the card, trigger the buffer read ready interrupt immediately, and step to next cycle. So when next time the new tuning command send out by USDHC, card may still not send out the tuning data of the upper command，then some eMMC cards may stuck, can't response to any command, block the whole tuning procedure. If do not check the CMD CRC for tuning, then do not has this issue. USDHC will wait for the tuning data of each tuning command and check them. If the tuning data pass the check, it also means the CMD line also okay for tuning. So this patch disable the CMD CRC check for tuning, save some time for the whole tuning procedure. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Link: https://lore.kernel.org/r/1590488522-9292-2-git-send-email-haibo.chen@nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: sdhci-esdhc-imx: fix the mask for tuning start pointHaibo Chen
According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is TUNING_START_TAP, bit[7] of this register is to disable the command CRC check for standard tuning. So fix it here. Fixes: d87fc9663688 ("mmc: sdhci-esdhc-imx: support setting tuning start point") Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Link: https://lore.kernel.org/r/1590488522-9292-1-git-send-email-haibo.chen@nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: host: sdhci-esdhc-imx: add wakeup feature for GPIO CD pinHaibo Chen
When use the specific GPIO to detect the card insert/remove, we can also add the GPIO as a wakeup source. When system suspend, insert or remove the card can wakeup the system. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Link: https://lore.kernel.org/r/1590547175-15070-1-git-send-email-haibo.chen@nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: mmci_sdmmc: fix DMA API warning max segment sizeLudovic Barre
Turning on CONFIG_DMA_API_DEBUG_SG results in the following warning: WARNING: CPU: 1 PID: 85 at kernel/dma/debug.c:1302 debug_dma_map_sg+0x2a0/0x3cc mmci-pl18x 58005000.sdmmc: DMA-API: mapping sg segment longer than device claims to support [len=126976] [max=65536] dma api debug checks and compares the segment size to dma_get_max_seg_size (dev->dma_parms->max_segment_size), the sdmmc variant has an internal DMA and should define its max_segment_size constraint to avoid this warning. This Patch defines the dev->dma_parms->max_segment_size with the constraint already set for mmc core (host->mmc->max_seg_size). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Link: https://lore.kernel.org/r/20200526155103.12514-3-ludovic.barre@st.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: mmci_sdmmc: fix DMA API warning overlapping mappingsLudovic Barre
Turning on CONFIG_DMA_API_DEBUG_SG results in the following warning: WARNING: CPU: 1 PID: 20 at kernel/dma/debug.c:500 add_dma_entry+0x16c/0x17c DMA-API: exceeded 7 overlapping mappings of cacheline 0x031d2645 Modules linked in: CPU: 1 PID: 20 Comm: kworker/1:1 Not tainted 5.5.0-rc2-00021-gdeda30999c2b-dirty #49 Hardware name: STM32 (Device Tree Support) Workqueue: events_freezable mmc_rescan [<c03138c0>] (unwind_backtrace) from [<c030d760>] (show_stack+0x10/0x14) [<c030d760>] (show_stack) from [<c0f2eb28>] (dump_stack+0xc0/0xd4) [<c0f2eb28>] (dump_stack) from [<c034a14c>] (__warn+0xd0/0xf8) [<c034a14c>] (__warn) from [<c034a530>] (warn_slowpath_fmt+0x94/0xb8) [<c034a530>] (warn_slowpath_fmt) from [<c03bca0c>] (add_dma_entry+0x16c/0x17c) [<c03bca0c>] (add_dma_entry) from [<c03bdf54>] (debug_dma_map_sg+0xe4/0x3d4) [<c03bdf54>] (debug_dma_map_sg) from [<c0d09244>] (sdmmc_idma_prep_data+0x94/0xf8) [<c0d09244>] (sdmmc_idma_prep_data) from [<c0d05a2c>] (mmci_prep_data+0x2c/0xb0) [<c0d05a2c>] (mmci_prep_data) from [<c0d073ec>] (mmci_start_data+0x134/0x2f0) [<c0d073ec>] (mmci_start_data) from [<c0d078d0>] (mmci_request+0xe8/0x154) [<c0d078d0>] (mmci_request) from [<c0cecb44>] (mmc_start_request+0x94/0xbc) DMA api debug brings to light leaking dma-mappings, dma_map_sg and dma_unmap_sg are not correctly balanced. If a request is prepared, the dma_map/unmap are done in asynchronous call pre_req (prep_data) and post_req (unprep_data). In this case the dma-mapping is right balanced. But if the request was not prepared, the data->host_cookie is define to zero and the dma_map/unmap must be done in the request. The dma_map is called by mmci_dma_start (prep_data), but there is no dma_unmap in this case. This patch adds dma_unmap_sg when the dma is finalized and the data cookie is zero (request not prepared). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Link: https://lore.kernel.org/r/20200526155103.12514-2-ludovic.barre@st.com Fixes: 46b723dd867d ("mmc: mmci: add stm32 sdmmc variant") Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: sdhci-of-arasan: Add support for Intel Keem BayWan Ahmad Zainie
Intel Keem Bay SoC eMMC/SD/SDIO controller is based on Arasan SD 3.0 / eMMC 5.1 host controller IP. However, it does not support 64-bit access as its AXI interface has 32-bit address ports. Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com> Reviewed-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200526062758.17642-3-wan.ahmad.zainie.wan.mohamad@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: sdhci-cadence: fix PHY writeVladimir Kondratiev
Accordingly to Cadence documentation, PHY write procedure is: 1. Software sets the PHY Register Address (HRS04[5:0]) and the PHY Write Data (HRS04[15:8]) fields. 2. Software sets the PHY Write Transaction Request (HRS04[24]) field to 1. 3. Software waits as the PHY Write Transaction Acknowledge (HRS04[26]) field is equal to 0. 4. Hardware performs the write transaction to PHY register where HRS04[15:8] is a data written to register under HRS04[5:0] address. 5. Hardware sets the PHY Transaction Acknowledge (HRS04[26]) to 1 when transaction is completed. 6. Software clears the PHY Write Transaction Request (HRS04[24]) to 1 after noticing that the PHY Write Transaction Acknowledge (HRS04[26]) field is equal to 1. 7. Software waits for the PHY Acknowledge Register (HRS04[26]) field is equal to 0. Add missing steps 3 and 7. Lack of these steps causes integrity errors detested by hardware. Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@intel.com> Link: https://lore.kernel.org/r/20200525074053.7309-1-vladimir.kondratiev@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: sdio: Fix Cypress SDIO IDs macros in common include filePali Rohár
All macro names for SDIO device IDs are prefixed by vendor name to which device ID belongs. So for consistency add Broadcom string vendor prefix to all Cypress macro names as they belong to SDIO Broadcom vendor ID. Change also Cypress 43012 value from decimal do hexadecimal notation to be consistent with all other values. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20200522144412.19712-11-pali@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: sdio: Move SDIO IDs from b43-sdio driver to common include filePali Rohár
Define appropriate macro names for consistency with other macros. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20200522144412.19712-10-pali@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: sdio: Move SDIO IDs from ath10k driver to common include filePali Rohár
Also replace generic MANUFACTURER macros by proper SDIO IDs macros. Checks for device IDs are slightly modified to use SDIO device IDs. This allows removal of all custom MANUFACTURER macros from ath10k. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20200522144412.19712-9-pali@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: sdio: Move SDIO IDs from ath6kl driver to common include filePali Rohár
Also replace generic MANUFACTURER macros by proper SDIO IDs macros. Check for "AR6003 or later" is slightly modified to use SDIO device IDs. This allows removal of all custom MANUFACTURER macros from ath6kl. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200522144412.19712-8-pali@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: sdio: Move SDIO IDs from smssdio driver to common include filePali Rohár
Define appropriate macro names for consistency with other Siano macros. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20200522144412.19712-7-pali@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-29mmc: sdio: Move SDIO IDs from btmtksdio driver to common include filePali Rohár
Define appropriate macro names for consistency with other macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20200522144412.19712-6-pali@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Ganapathi Bhat <ganapathi.bhat@nxp.com>
2020-05-29mmc: sdio: Move SDIO IDs from btmrvl driver to common include filePali Rohár
Define appropriate macro names for consistency with other Marvell macros. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20200522144412.19712-5-pali@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Ganapathi Bhat <ganapathi.bhat@nxp.com>
2020-05-29mmc: sdio: Move SDIO IDs from mwifiex driver to common include filePali Rohár
Add _WLAN suffix to macro names for consistency with other Marvell macros. These IDs represents wlan function of combo bt/wlan cards. Other functions of these cards have different IDs. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200522144412.19712-4-pali@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Ganapathi Bhat <ganapathi.bhat@nxp.com>
2020-05-29mmc: sdio: Change macro names for Marvell 8688 modulesPali Rohár
Add underscore as separator in Marvell 8688 macro names for better readability and consistency. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20200522144412.19712-3-pali@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Ganapathi Bhat <ganapathi.bhat@nxp.com>
2020-05-29irqchip: Add Loongson PCH MSI controllerJiaxun Yang
This controller appears on Loongson LS7A family of PCH to transform interrupts from PCI MSI into HyperTransport vectorized interrrupts and send them to procrssor's HT vector controller. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200528152757.1028711-6-jiaxun.yang@flygoat.com
2020-05-29irqchip: Add Loongson PCH PIC controllerJiaxun Yang
This controller appears on Loongson LS7A family of PCH to transform interrupts from devices into HyperTransport vectorized interrrupts and send them to procrssor's HT vector controller. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200528152757.1028711-4-jiaxun.yang@flygoat.com
2020-05-29irqchip: Add Loongson HyperTransport Vector supportJiaxun Yang
This controller appears on Loongson-3 chips for receiving interrupt vectors from PCH's PIC and PCH's PCIe MSI interrupts. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200528152757.1028711-2-jiaxun.yang@flygoat.com
2020-05-29iwlwifi: bump FW API to 56 for AX devicesLuca Coelho
Start supporting API version 56 for AX devices. Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20200529092401.aabbc5b472ee.I88cb2c3d2d07e62eac3671335ff1fb80b73c5839@changeid
2020-05-29iwlwifi: mvm: add support for range request version 10Avraham Stern
Range request version 10 keeps the same command size as version 9 but uses 2 reserved fields for the responder beacon interval and station id (if exists). For now, since the beacon interval of unassoc APs is unknown, use a value of 100 TUs which is a common value for many APs. While at it, remove the definition for CCMP_256 cipher, since this is not supported. Signed-off-by: Avraham Stern <avraham.stern@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20200529092401.b7ccdad0805f.I59ea7f773caed85a66c61401066ae169008442e6@changeid
2020-05-29iwlwifi: mvm: fix aux station leakSharon
When mvm is initialized we alloc aux station with aux queue. We later free the station memory when driver is stopped, but we never free the queue's memory, which casues a leak. Add a proper de-initialization of the station. Signed-off-by: Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20200529092401.0121c5be55e9.Id7516fbb3482131d0c9dfb51ff20b226617ddb49@changeid
2020-05-29iwlwifi: move txq-specific from trans_pcie to common transMordechay Goodstein
We don't want to have txq code in the PCIe transport code, so move all the relevant elements to a new iwl_txq structure and store it in iwl_trans. spatch @ replace_pcie @ struct iwl_trans_pcie *trans_pcie; @@ ( -trans_pcie->queue_stopped +trans->txqs.queue_stopped | -trans_pcie->queue_used +trans->txqs.queue_used | -trans_pcie->txq +trans->txqs.txq | -trans_pcie->txq +trans->txqs.txq | -trans_pcie->cmd_queue +trans->txqs.cmd.q_id | -trans_pcie->cmd_fifo +trans->txqs.cmd.fifo | -trans_pcie->cmd_q_wdg_timeout +trans->txqs.cmd.wdg_timeout ) // clean all new unused variables @ depends on replace_pcie @ type T; identifier i; expression E; @@ - T i = E; ... when != i Signed-off-by: Mordechay Goodstein <mordechay.goodstein@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20200529092401.a428d3c9d66f.Ie04ae55f33954636a39c98e7ae1e739c0507435b@changeid
2020-05-29iwlwifi: move iwl_txq and substructures to a common trans headerMordechay Goodstein
The txq code is not directly related to the PCIe transport, so move the structures it uses to the common iwl-trans.h header. Signed-off-by: Mordechay Goodstein <mordechay.goodstein@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20200529092401.d9d0082b8369.I8298f6e83804c1ea99217a79d95d23ef68b184d4@changeid
2020-05-29iwlwifi: pcie: gen3: indicate 8k/12k RB size to deviceJohannes Berg
Newer firmware versions will parse a few extra bits in the context info to be able to determine whether we are using bigger than 4k RBs, indicate 8k/12k to them if we actually use those (e.g. for sniffer based on the module parameter). Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20200529092401.f83f994572ca.Ibcfd66c3f9b69e68a53b3b2df8331ffb225db655@changeid
2020-05-29iwlwifi: acpi: evaluate dsm to enable 5.2 bands in IndonesiaGil Adam
Evaluate the appropriate DSM from ACPI to enable 5.15,5.35 GHz bands in Indonesia. If enabled send LARI_CONFIG_CHANGE cmd to fw. Signed-off-by: Gil Adam <gil.adam@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20200529092401.f549b75bfdac.Iac74a6ffe45aff887cea13ee1d31b100ca11e249@changeid
2020-05-29iwlwifi: acpi: support device specific method (DSM)Gil Adam
ACPI Device Specific Method (DSM) allows standardized feature configuration through the ACPI interface without the namespace pollution of the usual mechanism (ACPI method for each feature). Add generic function for evaluating DSM objects and function for evaluating a DSM with no arguments and a single int return value. also implement the required backport for UUID. Signed-off-by: Gil Adam <gil.adam@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20200529092401.c3242ff3ba5c.Icb48c8d61bede5dda7ef267bff10e4798e9dc77b@changeid
2020-05-29iwlwifi: pcie: keep trans instead of trans_pcie in iwl_txqMordechay Goodstein
We used both the trans and the trans_pcie structures in iwl_txq, so we can keep the trans structure instead. This helps with the refactoring of txq code out of pcie. Signed-off-by: Mordechay Goodstein <mordechay.goodstein@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20200529092401.1f826d34339e.I23182a59bfbe089a1f659742d6fee6f64d2ed08c@changeid
2020-05-29iwlwifi: pcie: don't count on the FW to set persistence modeHaim Dreyfuss
Apparently the FW can't set the persistence in all flows. Don't count on the FW setting it in AX210 devices or above either to avoid potential resets on resume. Signed-off-by: Haim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20200529092401.5405db448555.Ie3c110932ebbd5b6aca99938a5e0a1e4dfbaa848@changeid
2020-05-29iwlwifi: set NO_HE if the regulatory domain forbids itHaim Dreyfuss
If the firmware's regulatory domain forbids HE operation, set it in the cfg80211 regdomain. Signed-off-by: Haim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20200529092401.c3e50c36c628.I991bfa662c0ef35de5be9eaf5b78ef190b67cb56@changeid
2020-05-28e1000: Fix typo in the commentHari
Continuous Double "the" in a comment. Changed it to single "the" Signed-off-by: Hari <harichandrakanthan@gmail.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-28igc: Fix wrong register nameSasha Neftin
Accordance to the i225 datasheet this register address used by Host Transmit Discarded Packet by MAC counter and not by not applicable Carrier Extension Error counter. This patch comes to fix this wrong definition. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-28igc: Remove Sequence Error CounterSasha Neftin
Accordance to the i225 datasheet sequence error counter does not applicable to the i225 device. This patch comes to clean up this counter. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-28igc: Add Receive Error CounterSasha Neftin
Receive error counter reflect total number of non-filtered packets received with errors. This includes: CRC error, symbol error, Rx data error and carrier extend error. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-28igc: Remove symbol error counterSasha Neftin
Accordance to the i225 datasheet symbol error counter does not applicable to the i225 device. This patch comes to clean up this counter. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
generated by cgit (git 2.34.1) at 2025-09-12 05:16:29 +0000