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2018-10-17nvme-pci: Add support for P2P memory in requestsLogan Gunthorpe
For P2P requests, we must use the pci_p2pmem_map_sg() function instead of the dma_map_sg functions. With that, we can then indicate PCI_P2P support in the request queue. For this, we create an NVME_F_PCI_P2P flag which tells the core to set QUEUE_FLAG_PCI_P2P in the request queue. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Sagi Grimberg <sagi@grimberg.me> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Keith Busch <keith.busch@intel.com>
2018-10-17nvme-pci: Use PCI p2pmem subsystem to manage the CMBLogan Gunthorpe
Register the CMB buffer as p2pmem and use the appropriate allocation functions to create and destroy the IO submission queues. If the CMB supports WDS and RDS, publish it for use as P2P memory by other devices. Kernels without CONFIG_PCI_P2PDMA will also no longer support NVMe CMB. However, seeing the main use-cases for the CMB is P2P operations, this seems like a reasonable dependency. We drop the __iomem safety on the buffer seeing that, by convention, it's safe to directly access memory mapped by memremap()/devm_memremap_pages(). Architectures where this is not safe will not be supported by memremap() and therefore will not support PCI P2P and have no support for CMB. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Christoph Hellwig <hch@lst.de>
2018-10-17IB/core: Ensure we map P2P memory correctly in rdma_rw_ctx_[init|destroy]()Logan Gunthorpe
In order to use PCI P2P memory the pci_p2pmem_map_sg() function must be called to map the correct PCI bus address. To do this, check the first page in the scatter list to see if it is P2P memory or not. At the moment, scatter lists that contain P2P memory must be homogeneous so if the first page is P2P the entire SGL should be P2P. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
2018-10-17PCI/P2PDMA: Introduce configfs/sysfs enable attribute helpersLogan Gunthorpe
Users of the P2PDMA infrastructure will typically need a way for the user to tell the kernel to use P2P resources. Typically this will be a simple on/off boolean operation but sometimes it may be desirable for the user to specify the exact device to use for the P2P operation. Add new helpers for attributes which take a boolean or a PCI device. Any boolean as accepted by strtobool() turn P2P on or off (such as 'y', 'n', '1', '0', etc). Specifying a full PCI device name/BDF will select the specific device. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de>
2018-10-17PCI/P2PDMA: Add PCI p2pmem DMA mappings to adjust the bus offsetLogan Gunthorpe
The DMA address used when mapping PCI P2P memory must be the PCI bus address. Thus, introduce pci_p2pmem_map_sg() to map the correct addresses when using P2P memory. Memory mapped in this way does not need to be unmapped and thus if we provided pci_p2pmem_unmap_sg() it would be empty. This breaks the expected balance between map/unmap but was left out as an empty function doesn't really provide any benefit. In the future, if this call becomes necessary it can be added without much difficulty. For this, we assume that an SGL passed to these functions contain all P2P memory or no P2P memory. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de>
2018-10-17PCI/P2PDMA: Add sysfs group to display p2pmem statsLogan Gunthorpe
Add a sysfs group to display statistics about P2P memory that is registered in each PCI device. Attributes in the group display the total amount of P2P memory, the amount available and whether it is published or not. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de>
2018-10-17clk: at91: h32mx: separate registration from DT parsingAlexandre Belloni
Separate registration out of of_sama5d4_clk_h32mx_setup to allow other code to use it. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17clk: at91: generated: SSCs don't have a gclkAlexandre Belloni
As the SSCs don't have gclk, don't check for their ID to allow them to set the audio pll rate. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17clk: at91: audio-pll: fix audio pmc typeAlexandre Belloni
The allocation for the audio pmc is using the size of struct clk_audio_pad instead of struct clk_audio_pmc. This works fine because the former is larger than the latter but it is safer to be correct. Fixes: ("0865805d82d4 clk: at91: add audio pll clock drivers") Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17clk: mmp2: fix the clock id for sdh2_clk and sdh3_clkLubomir Rintel
A typo that makes it impossible to get the correct clocks for MMP2_CLK_SDH2 and MMP2_CLK_SDH3. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Fixes: 1ec770d92a62 ("clk: mmp: add mmp2 DT support for clock driver") Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17IB/mlx5: Add support for extended atomic operationsYonatan Cohen
Extended atomic operations cmp&swp and fetch&add is a Mellanox feature extending the standard atomic operation to use, varied operand sizes, as apposed to normal atomic operation that use an 8 byte operand only. Extended atomics allows masking the results and arguments. This patch configures QP to support extended atomic operation with the maximum size possible, as exposed by HCA capabilities. Signed-off-by: Yonatan Cohen <yonatanc@mellanox.com> Reviewed-by: Guy Levi <guyle@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2018-10-17RDMA/core: Fix comment for hw stats init for port == 0Parav Pandit
When add_port() is done for port == 0, it indicates that ports hardware counters initialization should be skipped. Reflect so in the comment. Signed-off-by: Parav Pandit <parav@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2018-10-17RDMA/core: Refactor ib_register_device() functionParav Pandit
ib_register_device() does several allocation and initialization steps. Split it into smaller more readable functions for easy review and maintenance. Signed-off-by: Parav Pandit <parav@mellanox.com> Reviewed-by: Daniel Jurgens <danielj@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2018-10-17RDMA/core: Fix unwinding flow in case of error to register deviceParav Pandit
If port pkey list initialization fails, free the port_immutable memory during cleanup path. Currently it is missed out. If cache setup fails, free the pkey list during cleanup path. Fixes: d291f1a65 ("IB/core: Enforce PKey security on QPs") Signed-off-by: Parav Pandit <parav@mellanox.com> Reviewed-by: Daniel Jurgens <danielj@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2018-10-17ib_srp: Remove WARN_ON in srp_terminate_io()Hannes Reinecke
The WARN_ON() is pointless as the rport is placed in SDEV_TRANSPORT_OFFLINE at that time, so no new commands can be submitted via srp_queuecommand() Signed-off-by: Hannes Reinecke <hare@suse.com> Reviewed-by: Jens Axboe <axboe@kernel.dk> Reviewed-by: Johannes Thumshirn <jthumshirn@suse.com> Acked-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Doug Ledford <dledford@redhat.com>
2018-10-17drivers/block: Remove DAC960 driverHannes Reinecke
The DAC960 driver has been obsoleted by the myrb/myrs drivers, so it can be dropped. Signed-off-by: Hannes Reinecke <hare@suse.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-10-17clk: imx7d: remove CLK_IS_CRITICAL flag for arm_a7_root_clkAnson Huang
i.MX7D uses virtual cpu clock of "arm" clock to be child clock of "arm_a7_root_clk" and it is with CLK_IS_CRITICAL flag set, so no need to add CLK_IS_CRITICAL flag for keeping "arm_a7_root_clk" use count correct, latest clock tree is as below in clk_summary: pll_arm_main 1 1 0 792000000 0 pll_arm_main_bypass 1 1 0 792000000 0 pll_arm_main_clk 1 1 0 792000000 0 arm_a7_src 1 1 0 792000000 0 arm_a7_cg 1 1 0 792000000 0 arm_a7_div 1 1 0 792000000 0 arm_a7_root_clk 1 1 0 792000000 0 arm 1 1 0 792000000 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17clk: imx: cpu clock should be always criticalAnson Huang
Add CLK_IS_CRITICAL flag for cpu clock type to make cpu clock use count correct, as cpu clock should be always critical. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17IB/mlx5: Allow scatter to CQE without global signaled WRsYonatan Cohen
Requester scatter to CQE is restricted to QPs configured to signal all WRs. This patch adds ability to enable scatter to cqe (force enable) in the requester without sig_all, for users who do not want all WRs signaled but rather just the ones whose data found in the CQE. Signed-off-by: Yonatan Cohen <yonatanc@mellanox.com> Reviewed-by: Guy Levi <guyle@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2018-10-17IB/mlx5: Verify that driver supports user flagsYonatan Cohen
Flags sent down from user might not be supported by running driver. This might lead to unwanted bugs. To solve this, added macro to test for unsupported flags. Signed-off-by: Yonatan Cohen <yonatanc@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2018-10-17IB/mlx5: Support scatter to CQE for DC transport typeYonatan Cohen
Scatter to CQE is a HW offload that saves PCI writes by scattering the payload to the CQE. This patch extends already existing functionality to support DC transport type. Signed-off-by: Yonatan Cohen <yonatanc@mellanox.com> Reviewed-by: Guy Levi <guyle@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2018-10-17parisc: Add alternative coding infrastructureHelge Deller
This patch adds the necessary code to patch a running kernel at runtime to improve performance. The current implementation offers a few optimizations variants: - When running a SMP kernel on a single UP processor, unwanted assembler statements like locking functions are overwritten with NOPs. When multiple instructions shall be skipped, one branch instruction is used instead of multiple nop instructions. - In the UP case, some pdtlb and pitlb instructions are patched to become pdtlb,l and pitlb,l which only flushes the CPU-local tlb entries instead of broadcasting the flush to other CPUs in the system and thus may improve performance. - fic and fdc instructions are skipped if no I- or D-caches are installed. This should speed up qemu emulation and cacheless systems. - If no cache coherence is needed for IO operations, the relevant fdc and sync instructions in the sba and ccio drivers are replaced by nops. - On systems which share I- and D-TLBs and thus don't have a seperate instruction TLB, the pitlb instruction is replaced by a nop. Live-patching is done early in the boot process, just after having run the system inventory. No drivers are running and thus no external interrupts should arrive. So the hope is that no TLB exceptions will occur during the patching. If this turns out to be wrong we will probably need to do the patching in real-mode. Signed-off-by: Helge Deller <deller@gmx.de>
2018-10-17PCI: mediatek: Add loadable kernel module supportHonghui Zhang
Implement remove() callback function for the Mediatek PCIe controller driver to add loadable kernel module support. Save the PCIe's GIC IRQ at probe so that it can be retrieved to call dispose_irq() to tear down the IRQ upon module removal. Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2018-10-17PCI: mediatek: Add system PM support for MT2712 and MT7622Honghui Zhang
In order to reduce the PCIe power consumption in system suspend, the PCI bus physical layer should be gated. On system resume, the PCIe link should be re-established and the related control register values should be restored. Define suspend_noirq & resume_noirq callback functions to implement PM system syspend hooks for the PCI host controller. Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2018-10-17PCI: mediatek: Fixup MSI enablement logic by enabling MSI before clocksHonghui Zhang
Commit 43e6409db64d ("PCI: mediatek: Add MSI support for MT2712 and MT7622") added MSI support but enabled MSI in the wrong place, at a step in the probe sequence where clocks were not still enabled. Fix this issue by calling mtk_pcie_enable_msi() in mtk_pcie_startup_port_v2() since clocks are enabled when mtk_pcie_startup_port_v2() is called. To avoid forward declaration of mtk_pcie_enable_msi(), move the mtk_pcie_startup_port_v2() function definition in the file. Fixes: 43e6409db64d ("PCI: mediatek: Add MSI support for MT2712 and MT7622") Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: squashed commit and adapted log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2018-10-17PCI: mediatek: Convert to use pci_host_probe()Honghui Zhang
Part of mtk_pcie_register_host() is an open-coded version of pci_host_probe(). So instead of duplicating this code, use pci_host_probe() directly and remove mtk_pcie_register_host(). Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: commit log changes] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2018-10-17PCI: mediatek: Remove the redundant dev->pm_domain checkHonghui Zhang
There is no need to check whether device have a PM domain attached before calling the PM runtime methods. Remove it. Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: commit log changes] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2018-10-17clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent callEnric Balletbo i Serra
Fixes the signedness bug returning '(-22)' on the return type by removing the sanity checker in rockchip_ddrclk_get_parent(). The function should return and unsigned value only and it's safe to remove the sanity checker as the core functions that call get_parent like clk_core_get_parent_by_index already ensures the validity of the clk index returned (index >= core->num_parents). Fixes: a4f182bf81f18 ("clk: rockchip: add new clock-type for the ddrclk") Cc: stable@vger.kernel.org Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-10-17drm: panel-orientation-quirks: Add quirk for Acer One 10 (S1003)Hans de Goede
The Acer One 10 uses a clamshell design with a detachable keyboard. As such in normal operating mode, with the keyboard attach the device is in landscape mode (and the Acer logo at boot also shows in landscape mode). But the device uses a portrait screen rotated 90 degrees (sigh). This commit adds a quirk for this device so that we shown the fbcon the right way up and that we hint userspace to also show e.g. plymouth and gdm the right way up. Cc: stable@vger.kernel.org Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181012101610.29100-1-hdegoede@redhat.com
2018-10-17Merge tag 'clk-fixes-for-linus' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Stephen writes: "clk fixes for v4.19-rc8 One fix for the Allwinner A10 SoC's audio PLL that wasn't properly set and generating noise." * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: sunxi-ng: sun4i: Set VCO and PLL bias current to lowest setting
2018-10-17spi: pic32-sqi: don't pass GFP_DMA32 to dma_alloc_coherentChristoph Hellwig
The DMA API does its own zone decisions based on the coherent_dma_mask. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-17RDMA/drivers: Use core provided API for registering device attributesParav Pandit
Use rdma_set_device_sysfs_group() to register device attributes and simplify the driver. Signed-off-by: Parav Pandit <parav@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2018-10-17PCI: keystone: Cleanup macros defined in pci-keystone.cKishon Vijay Abraham I
No functional change. Cleanup macros defined in pci-keystone.c by removing unused macros, grouping the macros and aligning it properly. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Reorder header file in alphabetical orderKishon Vijay Abraham I
No functional change. Reorder header file in alphabetical order. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Add debug error message for all errorsKishon Vijay Abraham I
commit 025dd3daeda77f61a280da87ae701 ("PCI: keystone: Add error IRQ handler") added dev_err() message only for ERR_AXI and ERR_FATAL. Add debug error message for ERR_SYS, ERR_NONFATAL, ERR_CORR and ERR_AER here. While at that avoid using ERR_IRQ_STATUS_RAW and use ERR_IRQ_STATUS instead. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Use ERR_IRQ_STATUS instead of ERR_IRQ_STATUS_RAW to get ↵Kishon Vijay Abraham I
interrupt status Use ERR_IRQ_STATUS instead of ERR_IRQ_STATUS_RAW to get interrupt status. ERR_IRQ_STATUS_RAW has the status of the interrupts before masking whereas ERR_IRQ_STATUS has the status of the interrupts after masking. Since all the interrupts are unmasked here, use ERR_IRQ_STATUS. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Cleanup ks_pcie_link_up()Kishon Vijay Abraham I
ks_pcie_link_up() uses registers from the designware core to get the status of the link. Move the register defines to pcie-designware.h and cleanup ks_pcie_link_up(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Cleanup set_dbi_mode() and get_dbi_mode()Kishon Vijay Abraham I
No functional change. Use BIT() macro for DBI_CS2 and cleanup set_dbi_mode() and get_dbi_mode(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Cleanup outbound window configurationKishon Vijay Abraham I
Outbound translation window is configured in order to access the PCIe card's MEM space. Cleanup outbound translation configuration here by using BIT() macros, adding a macro for window size and using lower_32_bits/upper_32_bits macros for configuring the 64 bit offset in the outbound translation region. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Get number of outbound windows from DTKishon Vijay Abraham I
Instead of having a fixed outbound window count, get the number of outbound windows from the device tree. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Cleanup configuration space accessKishon Vijay Abraham I
Cleanup configuration space access by removing ks_pcie_cfg_setup() which has an unncessary check of "if (bus == 0)" which will never be the case of *_other_conf() and adding macros for configuring the CFG_SETUP register required for accessing the configuration space of the device. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Invoke runtime PM APIs to enable clockKishon Vijay Abraham I
Invoke runtime PM APIs to enable clocks and remove explicit clock enabling using clk_prepare_enable(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Cleanup PHY handlingKishon Vijay Abraham I
Cleanup PHY handling by using devm_phy_optional_get() to get PHYs if the PHYs are optional, creating a device link between the PHY device and the controller device and disable PHY on error cases here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Use SYSCON APIs to get device ID from control moduleKishon Vijay Abraham I
Control module registers should be read using syscon APIs. pci-keystone.c uses platform_get_resource() to get control module registers. Fix it here by using syscon APIs to get device id from control module. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Use uniform function naming conventionKishon Vijay Abraham I
No functional change. Some function names begin with ks_dw_pcie_* and some function names begin with ks_pcie_*. Modify it so that all function names begin with ks_pcie_*. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Remove redundant platform_set_drvdata() invocationKishon Vijay Abraham I
No functional change. Remove redundant platform_set_drvdata() invocation in ks_pcie_probe(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Merge pci-keystone-dw.c and pci-keystone.cKishon Vijay Abraham I
No functional change. Having two different files for keystone PCI driver doesn't serve any purpose. Merge pci-keystone-dw.c and pci-keystone.c into a single pci-keystone.c file and remove pci-keystone.h. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Remove unused argument from ks_dw_pcie_host_init()Kishon Vijay Abraham I
No functional change. Remove unused "msi_intc_np" argument from ks_dw_pcie_host_init(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Do not initiate link training multiple timesKishon Vijay Abraham I
commit 886bc5ceb5cc3ad4b219502d72 ("PCI: designware: Add generic dw_pcie_wait_for_link()") while adding a generic dw_pcie_wait_for_link() performed a special handling (initiate link training multiple times) for keystone which is not required. This also resulted in unncessarily waiting for more time to establish the link even when no PCI device is connected. Remove it and make it look similar to other dwc based PCIe drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-10-17PCI: keystone: Move dw_pcie_setup_rc() out of ks_pcie_establish_link()Kishon Vijay Abraham I
No functional change. Move dw_pcie_setup_rc() out of ks_pcie_establish_link() so that ks_pcie_establish_linki() can be used only to start the link. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>