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2021-12-20iommu: Move flush queue data into iommu_dma_cookieRobin Murphy
Complete the move into iommu-dma by refactoring the flush queues themselves to belong to the DMA cookie rather than the IOVA domain. The refactoring may as well extend to some minor cosmetic aspects too, to help us stay one step ahead of the style police. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/24304722005bc6f144e2a1fdd865d1465722fc2e.1639753638.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-12-20iommu/iova: Move flush queue code to iommu-dmaRobin Murphy
Flush queues are specific to DMA ops, which are now handled exclusively by iommu-dma. As such, now that the historical artefacts from being shared directly with drivers have been cleaned up, move the flush queue code into iommu-dma itself to get it out of the way of other IOVA users. This is pure code movement with no functional change; refactoring to clean up the headers and definitions will follow. Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/1d9a1ee1392e96eaae5e6467181b3e83edfdfbad.1639753638.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-12-20iommu/iova: Consolidate flush queue codeRobin Murphy
Squash and simplify some of the freeing code, and move the init and free routines down into the rest of the flush queue code to obviate the forward declarations. Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/b0dd4565e6646b6489599d7a1eaa362c75f53c95.1639753638.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-12-20iommu/vt-d: Use put_pages_listMatthew Wilcox (Oracle)
page->freelist is for the use of slab. We already have the ability to free a list of pages in the core mm, but it requires the use of a list_head and for the pages to be chained together through page->lru. Switch the Intel IOMMU and IOVA code over to using free_pages_list(). Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> [rm: split from original patch, cosmetic tweaks, fix fq entries] Signed-off-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/2115b560d9a0ce7cd4b948bd51a2b7bde8fdfd59.1639753638.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-12-20iommu/amd: Use put_pages_listMatthew Wilcox (Oracle)
page->freelist is for the use of slab. We already have the ability to free a list of pages in the core mm, but it requires the use of a list_head and for the pages to be chained together through page->lru. Switch the AMD IOMMU code over to using free_pages_list(). Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> [rm: split from original patch, cosmetic tweaks] Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/73af128f651aaa1f38f69e586c66765a88ad2de0.1639753638.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-12-20iommu/amd: Simplify pagetable freeingRobin Murphy
For reasons unclear, pagetable freeing is an effectively recursive method implemented via an elaborate system of templated functions that turns out to account for 25% of the object file size. Implementing it using regular straightforward recursion makes the code simpler, and seems like a good thing to do before we work on it further. As part of that, also fix the types to avoid all the needless casting back and forth which just gets in the way. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/d3d00c9f3fa0df4756b867072c201e6e82f9ce39.1639753638.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-12-20iommu/iova: Squash flush_cb abstractionRobin Murphy
Once again, with iommu-dma now being the only flush queue user, we no longer need the extra level of indirection through flush_cb. Squash that and let the flush queue code call the domain method directly. This does mean temporarily having to carry an additional copy of the IOMMU domain pointer around instead, but only until a later patch untangles it again. Reviewed-by: John Garry <john.garry@huawei.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/e3f9b4acdd6640012ef4fbc819ac868d727b64a9.1639753638.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-12-20iommu/iova: Squash entry_dtor abstractionRobin Murphy
All flush queues are driven by iommu-dma now, so there is no need to abstract entry_dtor or its data any more. Squash the now-canonical implementation directly into the IOVA code to get it out of the way. Reviewed-by: John Garry <john.garry@huawei.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/2260f8de00ab5e0f9d2a1cf8978e6ae7cd4f182c.1639753638.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-12-20iommu/iova: Fix race between FQ timeout and teardownXiongfeng Wang
It turns out to be possible for hotplugging out a device to reach the stage of tearing down the device's group and default domain before the domain's flush queue has drained naturally. At this point, it is then possible for the timeout to expire just before the del_timer() call in free_iova_flush_queue(), such that we then proceed to free the FQ resources while fq_flush_timeout() is still accessing them on another CPU. Crashes due to this have been observed in the wild while removing NVMe devices. Close the race window by using del_timer_sync() to safely wait for any active timeout handler to finish before we start to free things. We already avoid any locking in free_iova_flush_queue() since the FQ is supposed to be inactive anyway, so the potential deadlock scenario does not apply. Fixes: 9a005a800ae8 ("iommu/iova: Add flush timer") Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Xiongfeng Wang <wangxiongfeng2@huawei.com> [ rm: rewrite commit message ] Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/0a365e5b07f14b7344677ad6a9a734966a8422ce.1639753638.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-12-20iommu/amd: Fix typo in *glues … together* in commentPaul Menzel
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Link: https://lore.kernel.org/r/20211217134916.43698-1-pmenzel@molgen.mpg.de Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-12-19Input: ucb1400_ts - remove redundant variable penupColin Ian King
Variable penup is assigned a value but penup is never read later, it is redundant and can be removed. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Link: https://lore.kernel.org/r/20211205000525.153999-1-colin.i.king@gmail.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2021-12-19Input: ti_am335x_tsc - lower the X and Y sampling timeDario Binacchi
The open delay time has to be applied only on the first sample of the X/Y coordinates because on the following samples the ADC channel is not changed. Removing this time from the samples after the first one, "ti,coordinate-readouts" greater than 1, decreases the total acquisition time, allowing to increase the number of acquired coordinates in the time unit. Signed-off-by: Dario Binacchi <dariobin@libero.it> Link: https://lore.kernel.org/r/20211212125358.14416-4-dariobin@libero.it Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2021-12-19Input: ti_am335x_tsc - fix STEPCONFIG setup for Z2Dario Binacchi
The Z2 step configuration doesn't erase the SEL_INP_SWC_3_0 bit-field before setting the ADC channel. This way its value could be corrupted by the ADC channel selected for the Z1 coordinate. Fixes: 8c896308feae ("input: ti_am335x_adc: use only FIFO0 and clean up a little") Signed-off-by: Dario Binacchi <dariobin@libero.it> Link: https://lore.kernel.org/r/20211212125358.14416-3-dariobin@libero.it Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2021-12-19Input: ti_am335x_tsc - set ADCREFM for X configurationDario Binacchi
As reported by the STEPCONFIG[1-16] registered field descriptions of the TI reference manual, for the ADC "in single ended, SEL_INM_SWC_3_0 must be 1xxx". Unlike the Y and Z coordinates, this bit has not been set for the step configuration registers used to sample the X coordinate. Fixes: 1b8be32e6914 ("Input: add support for TI Touchscreen controller") Signed-off-by: Dario Binacchi <dariobin@libero.it> Link: https://lore.kernel.org/r/20211212125358.14416-2-dariobin@libero.it Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2021-12-20Merge tag 'renesas-pinctrl-for-v5.17-tag2' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.17 (take two) - Align comments in the R-Car V3U pin control driver.
2021-12-20ocxl: remove redundant rc variableMinghao Chi
Return value from ocxl_context_attach() directly instead of taking this in another redundant variable. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Acked-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211215060438.441918-1-chi.minghao@zte.com.cn
2021-12-19clk: samsung: Add initial Exynos7885 clock driverDavid Virag
This is an initial implementation adding basic clocks, such as UART, USI, I2C, WDT, ect. and their parent clocks. It is heavily based on the Exynos850 clock driver at 'drivers/clk/samsung/clk-exynos850.c' which was made by Sam Protsenko, thus the copyright and author lines were kept. Bus clocks are enabled by default as well to avoid hangs while trying to access CMU registers. Only the parts of CMU_TOP needed for CMU_CORE and CMU_PERI, a bit of CMU_CORE, and most of CMU_PERI is implemented as of now. Signed-off-by: David Virag <virag.david003@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211206153124.427102-7-virag.david003@gmail.com
2021-12-19clk: samsung: clk-pll: Add support for pll1417xDavid Virag
pll1417x is used in Exynos7885 SoC for top-level integer PLLs. It is similar enough to pll0822x that practically the same code can handle both. The difference that's to be noted is that when defining a pl1417x PLL, the "con" parameter of the PLL macro should be set to the CON1 register instead of CON3, like this: PLL(pll_1417x, CLK_FOUT_SHARED0_PLL, "fout_shared0_pll", "oscclk", PLL_LOCKTIME_PLL_SHARED0, PLL_CON0_PLL_SHARED0, NULL), Signed-off-by: David Virag <virag.david003@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20211206153124.427102-6-virag.david003@gmail.com
2021-12-19clk: samsung: Make exynos850_register_cmu sharedDavid Virag
Rename exynos850_register_cmu to exynos_arm64_register_cmu and move it to a new file called "clk-exynos-arm64.c". This should have no functional changes, but it will allow this code to be shared between other arm64 Exynos SoCs, like the Exynos7885 and possibly ExynosAuto V9. Signed-off-by: David Virag <virag.david003@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211206153124.427102-5-virag.david003@gmail.com
2021-12-19clk: samsung: exynos850: Add missing sysreg clocksSam Protsenko
System Register is used to configure system behavior, like USI protocol, etc. SYSREG clocks should be provided to corresponding syscon nodes, to make it possible to modify SYSREG registers. While at it, add also missing PMU and GPIO clocks, which looks necessary and might be needed for corresponding Exynos850 features soon. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20211217161549.24836-3-semen.protsenko@linaro.org
2021-12-19Merge tag 'irq_urgent_for_v5.16_rc6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Borislav Petkov: - Clear the PCI_MSIX_FLAGS_MASKALL bit too on the error path so that it is restored to its reset state - Mask MSI-X vectors late on the init path in order to handle out-of-spec Marvell NVME devices which apparently look at the MSI-X mask even when MSI-X is disabled * tag 'irq_urgent_for_v5.16_rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: PCI/MSI: Clear PCI_MSIX_FLAGS_MASKALL on error PCI/MSI: Mask MSI-X vectors only on success
2021-12-19mt76: mt7921s: fix cmd timeout in throughput testDeren Wu
During heavy loading throughtput test, the RX buffer (128) would be exhausted and some RX pkts dropped randomly. Increase buffer size from 128 to 512 (a safer length) to avoid tput degrade or cmd-timeout problem. Signed-off-by: Deren Wu <deren.wu@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7921s: fix suspend error with enlarging mcu timeout valueSean Wang
Fix the false positive suspend error that may occur on mt7921s with enlarging mcu timeout value. The reason why we have to enlarge mcu timeout from HZ / 3 to HZ is we should consider the additional overhead caused by running concurrently with btmtksdio (a MT7921 bluetooth SDIO driver) that would compete for the same SDIO bus in process context to complete the suspend procedure. Fixes: 48fab5bbef40 ("mt76: mt7921: introduce mt7921s support") Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7921s: make pm->suspended usage consistentSean Wang
Update pm->suspended usage to be consistent with mt7921e driver. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7921: fix possible resume failureSean Wang
Fix the possible resume failure due to mt76_connac_mcu_set_hif_suspend timeout. That is because clearing the flag pm->suspended too early opened up a race window, where mt7921_poll_tx/rx scheduled a ps_work to put the device in doze mode, that is unexpected for the device is being resumed from the suspend state and would make the remaining MCU comamnds in resume handler failed to execute. Fixes: ffa1bf97425b ("mt76: mt7921: introduce PM support") Co-developed-by: YN Chen <YN.Chen@mediatek.com> Signed-off-by: YN Chen <YN.Chen@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7921: clear pm->suspended in mt7921_mac_reset_workSean Wang
clear pm->suspended in mt7921_mac_reset_work to allow pm runtime can be enabled after wifi reset in any circumstance. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: connac: rely on le16_add_cpu in mt76_connac_mcu_add_nested_tlvLorenzo Bianconi
Rely on le16_add_cpu() in mt76_connac_mcu_add_nested_tlv routine. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7921: remove dead definitionsLorenzo Bianconi
to_wcid_lo and to_wcid_hi are no longer used in mt7921/mcu.c Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7915: add mu-mimo and ofdma debugfs knobsMeiChia Chiu
Add mu-mimo and ofdma packet counters statistics. The statistics are clear on read. Reviewed-by: Money Wang <Money.Wang@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: MeiChia Chiu <meichia.chiu@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7915: introduce mt76_vif in mt7915_vifLorenzo Bianconi
Align mt7915_vif layout to mt7921_vif and mt7615_vif Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7921: reduce log severity levels for informative messagesTzung-Bi Shih
"ASIC revision" and "Firmware init done" shouldn't be error messages. Reduces the severity levels. Signed-off-by: Tzung-Bi Shih <tzungbi@google.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7915: rely on mt76_connac definitionsLorenzo Bianconi
Remove duplicated mcu definitions in mt7915 mcu.h and reused connac ones. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: connac: rely on MCU_CMD macroLorenzo Bianconi
Similar to mt7915 driver, rely on MCU_CMD macro and do not command definitions directly Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: connac: introduce MCU_CE_CMD macroLorenzo Bianconi
Similar to MCU_EXT_CMD, introduce MCU_CE_CMD for CE commands Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: connac: introduce MCU_UNI_CMD macroLorenzo Bianconi
Similar to MCU_EXT_CMD, introduce MCU_UNI_CMD for unified commands Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: connac: remove MCU_FW_PREFIX bitLorenzo Bianconi
Get rid of MCU_FW_PREFIX bit since it is no longer used Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: connac: align MCU_EXT definitions with 7915 driverLorenzo Bianconi
Align MCU_EXT and MCU_FW definitions between mt76_connac and mt7915 driver. This is a preliminary patch to reuse mt76_connac in mt7915 driver. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: connac: introduce MCU_EXT macrosLorenzo Bianconi
Introduce MCU_EXT_CMD and MCU_EXT_QUERY macros in mt76_connac module. This is a preliminary patch to reuse mt76_connac module in mt7915 driver. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7921: fix network buffer leak by txs missingDeren Wu
TXS in mt7921 may be forwared to tx_done event. Should try to catch TXS information in tx_done event as well. Signed-off-by: Deren Wu <deren.wu@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7615: in debugfs queue stats, skip wmm index 3 on mt7663Felix Fietkau
The hardware only supports WMM index 0-2 and registers for index 3 return bogus data. Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7915: process txfree and txstatus without allocating skbsFelix Fietkau
Reduces pressure on the memory allocator Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: allow drivers to drop rx packets earlyFelix Fietkau
This can be used to free received events without allocating an extra skb Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7663: disable 4addr capabilityLorenzo Bianconi
4addr is not supported by the offload firmware yet Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7615: clear mcu error interrupt status on mt7663Felix Fietkau
Should fix issues with error recovery Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: only access ieee80211_hdr after mt76_insert_ccmp_hdrRyder Lee
Get rid of unsafe access since mt76_insert_ccmp_hdr moves the header. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: move sar_capa configuration in common codeLorenzo Bianconi
Move wiphy SAR capability configuration in mt76 module and remove duplicated code. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: connac: fix last_chan configuration in mt76_connac_mcu_rate_txpower_bandLorenzo Bianconi
last_ch configuration must not be dependent on the current configured band but it is defined by hw capabilities since the fw always expects the following order: - 2GHz - 5GHz - 6GHz Fixes: 9b2ea8eee42a1 ("mt76: connac: set 6G phymode in single-sku support") Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7921s: fix possible kernel crash due to invalid Rx countSean Wang
Return the proper error code when out-of-range the Rx aggregation count are reported from the hardware that would create the unreasonable extreme large Rx buffer. [ 100.873810] show_stack+0x20/0x2c [ 100.873823] dump_stack+0xc4/0x140 [ 100.873839] bad_page+0x110/0x114 [ 100.873854] check_new_pages+0xf8/0xfc [ 100.873869] rmqueue+0x5a0/0x640 [ 100.873884] get_page_from_freelist+0x124/0x20c [ 100.873898] __alloc_pages_nodemask+0x114/0x2a4 [ 100.873918] mt76s_rx_run_queue+0xd4/0x2e4 [mt76_sdio 8280a88a0c8c9cf203f16e194f99ac293bdbb2f5] [ 100.873938] mt76s_rx_handler+0xd4/0x2a0 [mt76_sdio 8280a88a0c8c9cf203f16e194f99ac293bdbb2f5] [ 100.873957] mt76s_txrx_worker+0xac/0x17c [mt76_sdio 8280a88a0c8c9cf203f16e194f99ac293bdbb2f5] [ 100.873977] mt7921s_txrx_worker+0x5c/0xd8 [mt7921s d0bdbc018082dbc8dc1407614be3c2e7bd64423b] [ 100.874003] __mt76_worker_fn+0xe8/0x170 [mt76 b80af3483a8f9d48e916c12d8dbfaa0d3cd15337] [ 100.874018] kthread+0x148/0x3ac [ 100.874032] ret_from_fork+0x10/0x30 [ 100.874067] Kernel Offset: 0x1fe2000000 from 0xffffffc010000000 [ 100.874079] PHYS_OFFSET: 0xffffffe800000000 [ 100.874090] CPU features: 0x0240002,2188200c Fixes: 48fab5bbef40 ("mt76: mt7921: introduce mt7921s support") Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7921s: fix bus hang with wrong privilegeDeren Wu
Accroding to chip hw flow, mt7921s need to re-acquire privilege again before normal running. Otherwise, the bus may be stuck in an abnormal status. Tested-by: Leon Yen <Leon.Yen@mediatek.com> Co-developed-by: Eric-SY Chang <Eric-SY.Chang@mediatek.com> Signed-off-by: Eric-SY Chang <Eric-SY.Chang@mediatek.com> Co-developed-by: YN Chen <YN.Chen@mediatek.com> Signed-off-by: YN Chen <YN.Chen@mediatek.com> Signed-off-by: Deren Wu <deren.wu@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-12-19mt76: mt7921: use correct iftype data on 6GHz cap initShayne Chen
Set 6GHz cap to iftype data which is matched to the type of current interface. Fixes: 50ac15a511e3 ("mt76: mt7921: add 6GHz support") Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
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