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2022-07-19net/mlx5: CT: Remove warning of ignore_flow_level support for non PFRoi Dayan
ignore_flow_level isn't supported for SFs, and so it causes post_act and ct to warn about it per SF. Apply the warning only for PF. Signed-off-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: Add resiliency for PTP TX port timestampAya Levin
PTP TX port timestamp relies on receiving 2 CQEs for each outgoing packet (WQE). The regular CQE has a less accurate timestamp than the wire CQE. On link change, the wire CQE may get lost. Let the driver detect and restore the relation between the CQEs, and re-sync after timeout. Add resiliency for this as follows: add id (producer counter) into the WQE's metadata. This id will be received in the wire CQE (in wqe_counter field). On handling the wire CQE, if there is no match, replay the PTP application with the time-stamp from the regular CQE and restore the sync between the CQEs and their SKBs. This patch adds 2 ptp counters: 1) ptp_cq0_resync_event: number of times a mismatch was detected between the regular CQE and the wire CQE. 2) ptp_cq0_resync_cqe: total amount of missing wire CQEs. Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: HTB, move htb functions to a new fileMoshe Tal
Move htb related functions and data to a separated file for better encapsulation. Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: HTB, change functions name to follow conventionMoshe Tal
Following the change of the functions to be object like, change also the names. Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: HTB, remove priv from htb function callsMoshe Tal
As a step to make htb self-contained replace the passing of priv as a parameter to htb function calls with members in the htb struct. Full decoupling the htb from priv will require more work, so for now leave the priv as one of the members in the htb struct, to be replaced by channels in a future commit. Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: HTB, hide and dynamically allocate mlx5e_htb structureSaeed Mahameed
Move structure mlx5e_htb from the main driver include file "en.h" to be hidden in qos.c where the qos functionality is implemented, forward declare it for the rest of the driver and allocate it dynamically upon user demand only. Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com>
2022-07-19net/mlx5e: HTB, move stats and max_sqs to privMoshe Tal
Preparation for dynamic allocation of the HTB struct. The statistics should be preserved even when the struct is de-allocated. Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: HTB, move section comment to the right placeMoshe Tal
mlx5e_get_qos_sq is a part of the SQ lifecycle, so need be under the title. Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: HTB, move ids to selq_params structMoshe Tal
HTB id fields are needed for selecting queue. Moving them to the selq_params struct will simplify synchronization between control flow and mlx5e_select_queues and will keep the IDs in the hot cacheline of mlx5e_selq_params. Replace mlx5e_selq_prepare() with separate functions that change subsets of parameters, while keeping the rest. This also will be useful to hide mlx5e_htb structure from the rest of the driver in a later patch in this series. Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com>
2022-07-19net/mlx5e: HTB, reduce visibility of htb functionsSaeed Mahameed
No need to expose all htb tc functions to the main driver file, expose only the master htb tc function mlx5e_htb_setup_tc() which selects the internal "now static" function to call. Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com>
2022-07-19net/mlx5e: Fix mqprio_rl handling on devlink reloadMoshe Tal
Keep mqprio_rl data to params and restore the configuration in case of devlink reload. Change the location of mqprio_rl resources cleanup so it will be done also in reload flow. Also, remove the rl pointer from the params, since this is dynamic object and saved to priv. Signed-off-by: Moshe Tal <moshet@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19net/mlx5e: Report header-data split state through ethtoolGal Pressman
HW-GRO (SHAMPO) packet merger scheme implies header-data split in the driver, report it through the ethtool interface. Signed-off-by: Gal Pressman <gal@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-19virt: sev-guest: Pass the appropriate argument type to iounmap()Tom Lendacky
Fix a sparse warning in sev_guest_probe() where the wrong argument type is provided to iounmap(). Fixes: fce96cf04430 ("virt: Add SEV-SNP guest driver") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/202207150617.jqwQ0Rpz-lkp@intel.com
2022-07-19can: peak_usb: include support for a new MCUStephane Grosjean
The CANFD-USB PCAN-USB FD interface undergoes an internal component change that requires a slight modification of its drivers, which leads them to dynamically use endpoint numbers provided by the interface itself. In addition to a change in the calls to the USB functions exported by the kernel, the detection of the USB interface dedicated to CAN must also be modified, as some PEAK-System devices support other interfaces than CAN. Link: https://lore.kernel.org/all/20220719120632.26774-3-s.grosjean@peak-system.com Signed-off-by: Stephane Grosjean <s.grosjean@peak-system.com> [mkl: add missing cpu_to_le16() conversion] [mkl: fix networking block comment style] Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: peak_usb: correction of an initially misnamed field nameStephane Grosjean
The data structure returned from the USB device contains a number flashed by the user and not the serial number of the device. Link: https://lore.kernel.org/all/20220719120632.26774-2-s.grosjean@peak-system.com Signed-off-by: Stephane Grosjean <s.grosjean@peak-system.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: peak_usb: pcan_dump_mem(): mark input prompt and data pointer as constStephane Grosjean
Mark the input prompt and data pointer as const. Link: https://lore.kernel.org/all/20220719120632.26774-1-s.grosjean@peak-system.com Signed-off-by: Stephane Grosjean <s.grosjean@peak-system.com> [mkl: mark data pointer as const, too; update commit message] Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: ctucanfd: Update CTU CAN FD IP core registers to match version 3.x.Pavel Pisa
The update is compatible/pure extension of 2.x IP core version - new option for 2, 4, or 8 Tx buffers option during synthesis. The 2.x version has fixed 4 Tx buffers. 3.x version default is 4 as well - new REG_TX_COMMAND_TXT_BUFFER_COUNT provides synthesis choice. When read as 0 assume 2.x core with fixed 4 Tx buffers. - new REG_ERR_CAPT_TS_BITS field to provide most significant active/implemented timestamp bit. For 2.x read as zero, assume value 63 is such case for 64 bit counter. - new REG_MODE_RXBAM bit which controls automatic advance to next word after Rx FIFO register read. Bit is set to 1 by default after the core reset (REG_MODE_RST) and value 1 has to be preserved for the normal ctucanfd Linux driver operation. Even preceding driver version resets core and then modifies only known/required MODE register bits so backward and forward compatibility is ensured. See complete datasheet for time-triggered and other updated capabilities http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf The fields related to ongoing Ondrej Ille's work on fault tolerant version with parity protected buffers and FIFOs are not included for now. Their inclusion will be considered when design is settled and tested. Link: https://lore.kernel.org/all/14a98ed1829121f0f3bde784f1aa533bc3cc7fe0.1658139843.git.pisa@cmp.felk.cvut.cz Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: c_can: remove wrong commentDario Binacchi
The comment referred to a status (warning) other than the one that was being managed (active error). Link: https://lore.kernel.org/all/20220716170112.2020291-1-dario.binacchi@amarulasolutions.com Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: slcan: do not sleep with a spin lock heldDario Binacchi
We can't call close_candev() with a spin lock held, so release the lock before calling it. After calling close_candev(), we can update the fields of the private `struct can_priv' without having to acquire the lock. Fixes: c4e54b063f42f ("can: slcan: use CAN network device driver API") Link: https://lore.kernel.org/linux-kernel/Ysrf1Yc5DaRGN1WE@xsang-OptiPlex-9020/ Link: https://lore.kernel.org/all/20220715072951.859586-1-dario.binacchi@amarulasolutions.com Reported-by: kernel test robot <oliver.sang@intel.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: sja1000: Change the return type as void for SoC specific initBiju Das
Change the return type as void for SoC specific init function as it always return 0. Link: https://lore.kernel.org/all/20220710115248.190280-6-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: sja1000: Use device_get_match_data to get device dataBiju Das
This patch replaces of_match_device->device_get_match_data to get pointer to device data. Link: https://lore.kernel.org/all/20220710115248.190280-5-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: sja1000: Add Quirk for RZ/N1 SJA1000 CAN controllerBiju Das
As per Chapter 6.5.16 of the RZ/N1 Peripheral Manual, The SJA1000 CAN controller does not support Clock Divider Register compared to the reference Philips SJA1000 device. This patch adds a device quirk to handle this difference. Link: https://lore.kernel.org/all/20220710115248.190280-4-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: slcan: clean up if/elseMarc Kleine-Budde
Remove braces after if() for single statement blocks, also remove else after return() in if() block. Link: https://lore.kernel.org/all/20220704125954.1587880-6-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: slcan: convert comparison to NULL into !valMarc Kleine-Budde
All comparison to NULL could be written "!val", convert them to make checkpatch happy. Link: https://lore.kernel.org/all/20220704125954.1587880-5-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: slcan: fix whitespace issuesMarc Kleine-Budde
Add and remove whitespace to make checkpatch happy. Link: https://lore.kernel.org/all/20220704125954.1587880-4-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: slcan: slcan_init() convert printk(LEVEL ...) to pr_level()Marc Kleine-Budde
Convert the last printk(LEVEL ...) to pr_level(). Link: https://lore.kernel.org/all/20220704125954.1587880-3-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: slcan: convert comments to network style commentsMarc Kleine-Budde
Convert all comments to network subsystem style comments. Link: https://lore.kernel.org/all/20220704125954.1587880-2-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19can: slcan: use scnprintf() as a hardening measureDan Carpenter
The snprintf() function returns the number of bytes which *would* have been copied if there were no space. So, since this code does not check the return value, there if the buffer was not large enough then there would be a buffer overflow two lines later when it does: actual = sl->tty->ops->write(sl->tty, sl->xbuff, n); Use scnprintf() instead because that returns the number of bytes which were actually copied. Fixes: 52f9ac85b876 ("can: slcan: allow to send commands to the adapter") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/all/YsVA9KoY/ZSvNGYk@kili Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-19md/raid5: missing error code in setup_conf()Dan Carpenter
Return -ENOMEM if the allocation fails. Don't return success. Fixes: 8fbcba6b999b ("md/raid5: Cleanup setup_conf() error returns") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Song Liu <song@kernel.org>
2022-07-19drivers/perf: arm_spe: Fix consistency of SYS_PMSCR_EL1.CXAnshuman Khandual
The arm_spe_pmu driver will enable SYS_PMSCR_EL1.CX in order to add CONTEXT packets into the traces, if the owner of the perf event runs with required capabilities i.e CAP_PERFMON or CAP_SYS_ADMIN via perfmon_capable() helper. The value of this bit is computed in the arm_spe_event_to_pmscr() function but the check for capabilities happens in the pmu event init callback i.e arm_spe_pmu_event_init(). This suggests that the value of the CX bit should remain consistent for the duration of the perf session. However, the function arm_spe_event_to_pmscr() may be called later during the event start callback i.e arm_spe_pmu_start() when the "current" process is not the owner of the perf session, hence the CX bit setting is currently not consistent. One way to fix this, is by caching the required value of the CX bit during the initialization of the PMU event, so that it remains consistent for the duration of the session. It uses currently unused 'event->hw.flags' element to cache perfmon_capable() value, which can be referred during event start callback to compute SYS_PMSCR_EL1.CX. This ensures consistent availability of context packets in the trace as per event owner capabilities. Drop BIT(SYS_PMSCR_EL1_CX_SHIFT) check in arm_spe_pmu_event_init(), because now CX bit cannot be set in arm_spe_event_to_pmscr() with perfmon_capable() disabled. Cc: Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alexey Budankov <alexey.budankov@linux.intel.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Fixes: d5d9696b0380 ("drivers/perf: Add support for ARMv8.2 Statistical Profiling Extension") Reported-by: German Gomez <german.gomez@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20220714061302.2715102-1-anshuman.khandual@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2022-07-19regulator: core: Fix off-on-delay-us for always-on/boot-on regulatorsChristian Kohlschütter
Regulators marked with "regulator-always-on" or "regulator-boot-on" as well as an "off-on-delay-us", may run into cycling issues that are hard to detect. This is caused by the "last_off" state not being initialized in this case. Fix the "last_off" initialization by setting it to the current kernel time upon initialization, regardless of always_on/boot_on state. Signed-off-by: Christian Kohlschütter <christian@kohlschutter.com> Link: https://lore.kernel.org/r/FAFD5B39-E9C4-47C7-ACF1-2A04CD59758D@kohlschutter.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-07-19perf: RISC-V: Add of_node_put() when breaking out of for_each_of_cpu_node()Liang He
In pmu_sbi_setup_irqs(), we should call of_node_put() for the 'cpu' when breaking out of for_each_of_cput_node() as its refcount will be automatically increased and decreased during the iteration. Fixes: 4905ec2fb7e6 ("RISC-V: Add sscofpmf extension support") Signed-off-by: Liang He <windhl@126.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20220715130330.443363-1-windhl@126.com Signed-off-by: Will Deacon <will@kernel.org>
2022-07-19intel_idle: Add a new flag to initialize the AMX stateChang S. Bae
The non-initialized AMX state can be the cause of C-state demotion from C6 to C1E. This low-power idle state may improve power savings and thus result in a higher available turbo frequency budget. This behavior is implementation-specific. Initialize the state for the C6 entrance of Sapphire Rapids as needed. Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Tested-by: Zhang Rui <rui.zhang@intel.com> Link: https://lkml.kernel.org/r/20220614164116.5196-1-chang.seok.bae@intel.com
2022-07-19Merge branch 'nuvoton/newsoc' into arm/newsocArnd Bergmann
Merge the new SoC support from Tomer Maimon: "This patchset adds initial support for the Nuvoton Arbel NPCM8XX Board Management controller (BMC) SoC family. The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC. The NPCM8XX computing subsystem comprises a quadcore ARM Cortex A35 ARM-V8 architecture. This patchset adds minimal architecture and drivers such as: Clocksource, Clock, Reset, and WD. Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX. This patchset was tested on the Arbel NPCM8XX evaluation board." I'm leaving out the clk controller driver, which is still under review. * nuvoton/newsoc: arm64: defconfig: Add Nuvoton NPCM family support arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add maintainer reset: npcm: Add NPCM8XX support dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: using syscon instead of device data ARM: dts: nuvoton: add reset syscon property dt-bindings: reset: npcm: add GCR syscon property dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock dt-bindings: watchdog: npcm: Add npcm845 compatible string dt-bindings: timer: npcm: Add npcm845 compatible string
2022-07-19reset: npcm: Add NPCM8XX supportTomer Maimon
Updated the NPCM reset driver to add support for Nuvoton BMC NPCM8XX SoC. As part of adding NPCM8XX support: - Add NPCM8XX specific compatible string. - Add NPCM8XX USB reset. - Add data to handle architecture-specific reset parameters. - Some of the Reset Id and number of resets are different from NPCM7XX. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19reset: npcm: using syscon instead of device dataTomer Maimon
Using syscon device tree property instead of device data to handle the NPCM general control registers. In case the syscon not found the code still search for nuvoton,npcm750-gcr to support DTS backward compatibility. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19net: dsa: microchip: fix the missing ksz8_r_mib_cntArun Ramadoss
During the refactoring for the ksz8_dev_ops from ksz8795.c to ksz_common.c, the ksz8_r_mib_cnt has been missed. So this patch adds the missing one. Fixes: 6ec23aaaac43 ("net: dsa: microchip: move ksz_dev_ops to ksz_common.c") Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220718061803.4939-1-arun.ramadoss@microchip.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-07-19Merge tag 'phy-for-5.20' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next Vinod writes: phy-for-5.20 - New support: - Samsung FSD ufs phy - Mediatek MT8365 dsi and tphy support - Amlogic G12A Analog D-PHY driver - Mediatek MT8188 tphy support - Mediatek PCIe phy driver - Cadence J721e DPHY support - Qualcomm IPQ8074 PCIe Gen3 PHY support - Nvidia Tegra PCIe PIPE2UPHY support - Updates: - Split of Qualcomm combo qmp phy driver to ufs, usb, pcie phy drivers and associated cleanup of these drivers * tag 'phy-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (115 commits) dt-bindings: phy: mediatek: tphy: add compatible for mt8188 phy: rockchip-inno-usb2: Ignore OTG IRQs in host mode phy: qcom-qmp-usb: statify qmp_phy_vreg_l phy: stm32: fix error return in stm32_usbphyc_phy_init phy: phy-mtk-dp: change mtk_dp_phy_driver to static phy: freescale: Add i.MX8qm Mixel LVDS PHY support dt-bindings: phy: Add Freescale i.MX8qm Mixel LVDS PHY binding dt-bindings: vendor-prefixes: Add prefix for Mixel, Inc. phy: cadence-torrent: Remove unused `regmap` field from state struct phy: cadence: Sierra: Remove unused `regmap` field from state struct phy: samsung-ufs: ufs: change phy on/off control phy: samsung-ufs: convert phy clk usage to clk_bulk API phy: qcom-qmp-usb: define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME register phy: qcom-qmp-usb: replace FLL layout writes for msm8996 phy: qcom-qmp: pcs-pcie-v4: add missing registers phy: qcom-qmp: pcs-v3: add missing registers phy: qcom-qmp: qserdes-com-v5: add missing registers phy: qcom-qmp: qserdes-com-v4: add missing registers phy: qcom-qmp: qserdes-com-v3: add missing registers phy: qcom-qmp: qserdes-com: add missing registers ...
2022-07-19Revert "platform/chrome: cros_typec_switch: Add switch driver"Greg Kroah-Hartman
This reverts commit e54369058f3da181fcc4c893f224a0c5a8a526b6. The chrome platform driver changes need to come in through the platform tree due to some api changes that showed up there that cause build errors in linux-next Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20220719160821.5e68e30b@oak.ozlabs.ibm.com Cc: Prashant Malani <pmalani@chromium.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-07-19Revert "platform/chrome: cros_typec_switch: Add ACPI Kconfig dep"Greg Kroah-Hartman
This reverts commit 88a15fbb47db483d06b12b1ae69f114b96361a96. The chrome platform driver changes need to come in through the platform tree due to some api changes that showed up there that cause build errors in linux-next Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20220719160821.5e68e30b@oak.ozlabs.ibm.com Cc: Prashant Malani <pmalani@chromium.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-07-19Revert "platform/chrome: cros_typec_switch: Set EC retimer"Greg Kroah-Hartman
This reverts commit 34f375f0fdf67f8804142fa37a28e73426d4c1df. The chrome platform driver changes need to come in through the platform tree due to some api changes that showed up there that cause build errors in linux-next Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20220719160821.5e68e30b@oak.ozlabs.ibm.com Cc: Prashant Malani <pmalani@chromium.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-07-19Revert "platform/chrome: cros_typec_switch: Add event check"Greg Kroah-Hartman
This reverts commit bb53ad958012f5a8d88b3b7159c22b3b877601bb. The chrome platform driver changes need to come in through the platform tree due to some api changes that showed up there that cause build errors in linux-next Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20220719160821.5e68e30b@oak.ozlabs.ibm.com Cc: Prashant Malani <pmalani@chromium.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-07-19Revert "platform/chrome: cros_typec_switch: Register mode switches"Greg Kroah-Hartman
This reverts commit f5434e30011e011b24852959365b7cbc61dd8c85. The chrome platform driver changes need to come in through the platform tree due to some api changes that showed up there that cause build errors in linux-next Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20220719160821.5e68e30b@oak.ozlabs.ibm.com Cc: Prashant Malani <pmalani@chromium.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-07-19Revert "platform/chrome: cros_ec_typec: Cleanup switch handle return paths"Greg Kroah-Hartman
This reverts commit 66fe238a9bcc158f75ddecf976d1ce7efe20f713. The chrome platform driver changes need to come in through the platform tree due to some api changes that showed up there that cause build errors in linux-next Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20220719160821.5e68e30b@oak.ozlabs.ibm.com Cc: Prashant Malani <pmalani@chromium.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-07-19Revert "platform/chrome: cros_ec_typec: Get retimer handle"Greg Kroah-Hartman
This reverts commit c76d09da77d69d7f737540985912ad2bca654713. The chrome platform driver changes need to come in through the platform tree due to some api changes that showed up there that cause build errors in linux-next Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20220719160821.5e68e30b@oak.ozlabs.ibm.com Cc: Prashant Malani <pmalani@chromium.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-07-19Merge branch irq/renesas-irqc into irq/irqchip-nextMarc Zyngier
* irq/renesas-irqc: : . : New Renesas RZ/G2L IRQC driver from Lad Prabhakar, equipped with : its companion GPIO driver. : . dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/V2L SoC gpio: thunderx: Don't directly include asm-generic/msi.h pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Document the properties to handle GPIO IRQ gpio: gpiolib: Allow free() callback to be overridden irqchip: Add RZ/G2L IA55 Interrupt Controller driver dt-bindings: interrupt-controller: Add Renesas RZ/G2L Interrupt Controller gpio: Remove dynamic allocation from populate_parent_alloc_arg() Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-19irqchip/gic-v3: Fix comment typoJason Wang
The double `the' is duplicated in line 1786, remove one. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220715051258.28889-1-wangborong@cdjrlc.com
2022-07-19amt: do not use amt->nr_tunnels outside of lockTaehee Yoo
amt->nr_tunnels is protected by amt->lock. But, amt_request_handler() has been using this variable without the amt->lock. So, it expands context of amt->lock in the amt_request_handler() to protect amt->nr_tunnels variable. Fixes: cbc21dc1cfe9 ("amt: add data plane of amt interface") Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-07-19amt: drop unexpected multicast dataTaehee Yoo
AMT gateway interface should not receive unexpected multicast data. Multicast data message type should be received after sending an update message, which means all establishment between gateway and relay is finished. So, amt_multicast_data_handler() checks amt->status. Fixes: cbc21dc1cfe9 ("amt: add data plane of amt interface") Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-07-19amt: drop unexpected query messageTaehee Yoo
AMT gateway interface should not receive unexpected query messages. In order to drop unexpected query messages, it checks nonce. And it also checks ready4 and ready6 variables to drop duplicated messages. Fixes: cbc21dc1cfe9 ("amt: add data plane of amt interface") Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
generated by cgit (git 2.34.1) at 2025-10-01 13:48:16 +0000