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2024-09-04cpufreq: Fix the cacography in powernv-cpufreq.cLiu Jing
The word 'swtich' is wrong, so fix it. Signed-off-by: Liu Jing <liujing@cmss.chinamobile.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-09-04cpufreq: ti-cpufreq: Introduce quirks to handle syscon fails appropriatelyNishanth Menon
Commit b4bc9f9e27ed ("cpufreq: ti-cpufreq: add support for omap34xx and omap36xx") introduced special handling for OMAP3 class devices where syscon node may not be present. However, this also creates a bug where the syscon node is present, however the offset used to read is beyond the syscon defined range. Fix this by providing a quirk option that is populated when such special handling is required. This allows proper failure for all other platforms when the syscon node and efuse offsets are mismatched. Fixes: b4bc9f9e27ed ("cpufreq: ti-cpufreq: add support for omap34xx and omap36xx") Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-09-04cpufreq: loongson3: Use raw_smp_processor_id() in do_service_request()Huacai Chen
Use raw_smp_processor_id() instead of plain smp_processor_id() in do_service_request(), otherwise we may get some errors with the driver enabled: BUG: using smp_processor_id() in preemptible [00000000] code: (udev-worker)/208 caller is loongson3_cpufreq_probe+0x5c/0x250 [loongson3_cpufreq] Reported-by: Xi Ruoyao <xry111@xry111.site> Tested-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-09-04cpufreq: amd-pstate: add check for cpufreq_cpu_get's return valueAnastasia Belova
cpufreq_cpu_get may return NULL. To avoid NULL-dereference check it and return in case of error. Found by Linux Verification Center (linuxtesting.org) with SVACE. Signed-off-by: Anastasia Belova <abelova@astralinux.ru> Reviewed-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-09-04cpufreq: Add SM7325 to cpufreq-dt-platdev blocklistDanila Tikhonov
The Qualcomm SM7325 platform uses the qcom-cpufreq-hw driver, so add it to the cpufreq-dt-platdev driver's blocklist. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-09-04cpufreq: Fix warning on unused of_device_id tables for !CONFIG_OFRob Herring (Arm)
!CONFIG_OF builds cause warnings on unused of_device_id tables. This is due to of_match_node() being a macro rather than static inline function. Add a __maybe_unused annotation to the of_device_id tables. Fixes: c7582ec85342 ("cpufreq: Drop CONFIG_ARM and CONFIG_ARM64 dependency on Arm drivers") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202408090714.wcrqU6Pk-lkp@intel.com/ Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-09-04cpufreq/amd-pstate: Add the missing cpufreq_cpu_put()Dhananjay Ugwekar
Fix the reference counting of cpufreq_policy object in amd_pstate_update() function by adding the missing cpufreq_cpu_put(). Fixes: e8f555daacd3 ("cpufreq/amd-pstate: fix setting policy current frequency value") Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Reviewed-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-09-04cpufreq: Drop CONFIG_ARM and CONFIG_ARM64 dependency on Arm driversRob Herring (Arm)
The CONFIG_ARM and CONFIG_ARM64 dependency is redundant as all the drivers have necessary sub-arch dependency and don't depend on the architecture support. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-09-04cpufreq: Enable COMPILE_TEST on Arm driversRob Herring (Arm)
COMPILE_TEST is useful for build testing without requiring a specific architecture's compiler. Enable it for most of the Arm CPUFreq drivers. As Kconfig.arm is only included on ARM and ARM64, COMPILE_TEST is only enabled for those architectures until that is dropped. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-09-04opp: ti: Drop unnecessary of_match_ptr()Rob Herring (Arm)
of_match_ptr() is not necessary as the driver is always enabled for DT. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-09-04perf/arm-cmn: Support CMN S3Robin Murphy
CMN S3 is the latest and greatest evolution for 2024, although most of the new features don't impact the PMU, so from our point of view it ends up looking a lot like CMN-700 r3 still. We have some new device types to ignore, a mildly irritating rearrangement of the register layouts, and a scary new configuration option that makes it potentially unsafe to even walk the full discovery tree, let alone attempt to use the PMU. Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Ilkka Koskinen <ilkka@os.amperecomputing.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/2ec9eec5b6bf215a9886f3b69e3b00e4cd85095c.1725296395.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2024-09-04perf/arm-cmn: Refactor DTC PMU register accessRobin Murphy
Annoyingly, we're soon going to have to cope with PMU registers moving about. This will mostly be straightforward, except for the hard-coding of CMN_PMU_OFFSET for the DTC PMU registers. As a first step, refactor those accessors to allow for encapsulating a variable offset without making a big mess all over. As a bonus, we can repack the arm_cmn_dtc structure to accommodate the new pointer without growing any larger, since irq_friend only encodes a range of +/-3. Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Ilkka Koskinen <ilkka@os.amperecomputing.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/fc677576fae7b5b55780e5b245a4ef6ea1b30daf.1725296395.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2024-09-04perf/arm-cmn: Make cycle counts less surprisingRobin Murphy
By default, CMN has automatic clock-gating with the implication that a DTC's cycle counter may not increment while the DTC is sufficiently idle. Given that we may have up to 4 DTCs to choose from when scheduling a cycles event, this may potentially lead to surprising results if trying to measure metrics based on activity in a different DTC domain from where cycles end up being counted. Furthermore, since the details of internal clock gating are not documented, we can't even reason about what "active" cycles for a DTC actually mean relative to the activity of other nodes within the same nominal DTC domain. Make the reasonable assumption that if the user wants to count cycles, they almost certainly want to count all of the cycles, and disable clock gating while a DTC's cycle counter is in use. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/c47cfdc09e907b1d7753d142a7e659982cceb246.1725296395.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2024-09-04perf/arm-cmn: Improve build-time assertionRobin Murphy
These days we can use static_assert() in the logical place rather than jamming a BUILD_BUG_ON() into the nearest function scope. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/224ee8286f299100f1c768edb254edc898539f50.1725296395.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2024-09-04perf/arm-cmn: Ensure dtm_idx is big enoughRobin Murphy
While CMN_MAX_DIMENSION was bumped to 12 for CMN-650, that only supports up to a 10x10 mesh, so bumping dtm_idx to 256 bits at the time worked out OK in practice. However CMN-700 did finally support up to 144 XPs, and thus needs a worst-case 288 bits of dtm_idx for an aggregated XP event on a maxed-out config. Oops. Fixes: 23760a014417 ("perf/arm-cmn: Add CMN-700 support") Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/e771b358526a0d7fc06efee2c3a2fdc0c9f51d44.1725296395.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2024-09-04perf/arm-cmn: Fix CCLA register offsetRobin Murphy
Apparently pmu_event_sel is offset by 8 for all CCLA nodes, not just the CCLA_RNI combination type. Fixes: 23760a014417 ("perf/arm-cmn: Add CMN-700 support") Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Ilkka Koskinen <ilkka@os.amperecomputing.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/6e7bb06fef6046f83e7647aad0e5be544139763f.1725296395.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2024-09-04perf/arm-cmn: Refactor node ID handling. Again.Robin Murphy
The scope of the "extra device ports" configuration is not made clear by the CMN documentation - so far we've assumed it applies globally, based on the sole example which suggests as much. However it transpires that this is incorrect, and the format does in fact vary based on each individual XP's port configuration. As a consequence, we're currenly liable to decode the port/device indices from a node ID incorrectly, thus program the wrong event source in the DTM leading to bogus event counts, and also show device topology on the wrong ports in debugfs. To put this right, rework node IDs yet again to carry around the additional data necessary to decode them properly per-XP. At this point the notion of fully decomposing an ID becomes more impractical than it's worth, so unabstracting the XY mesh coordinates (where 2/3 users were just debug anyway) ends up leaving things a bit simpler overall. Fixes: 60d1504070c2 ("perf/arm-cmn: Support new IP features") Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/5195f990152fc37adba5fbf5929a6b11063d9f09.1725296395.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2024-09-04ARM: 9417/1: dma-mapping: Pass device to arm_iommu_create_mapping()Jason Gunthorpe
All users of ARM IOMMU mappings create them for a particular device, so change the interface to accept the device rather than forcing a vague indirection through a bus type. This prepares for making a similar change to iommu_domain_alloc() itself. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Vasant Hegde <vasant.hegde@amd.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com> Signed-off-by: Jason Gunthorpe <jgg@ziepe.ca> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2024-09-04ARM: 9416/1: amba: make amba_bustype constantKunwu Chan
Since commit d492cc2573a0 ("driver core: device.h: make struct bus_type a const *"), the driver core can properly handle constant struct bus_type, move the amba_bustype variable to be a constant structure as well, placing it into read-only memory which can not be modified at runtime. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Kunwu Chan <chentao@kylinos.cn> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2024-09-04thermal/drivers/imx_sc_thermal: Use dev_err_probeAlexander Stein
This adds the error code to the error message and also stores that message in case of probe deferral. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Link: https://lore.kernel.org/r/20240717085517.3333385-1-alexander.stein@ew.tq-group.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-09-04ublk_drv: fix NULL pointer dereference in ublk_ctrl_start_recovery()Li Nan
When two UBLK_CMD_START_USER_RECOVERY commands are submitted, the first one sets 'ubq->ubq_daemon' to NULL, and the second one triggers WARN in ublk_queue_reinit() and subsequently a NULL pointer dereference issue. Fix it by adding the check in ublk_ctrl_start_recovery() and return immediately in case of zero 'ub->nr_queues_ready'. BUG: kernel NULL pointer dereference, address: 0000000000000028 RIP: 0010:ublk_ctrl_start_recovery.constprop.0+0x82/0x180 Call Trace: <TASK> ? __die+0x20/0x70 ? page_fault_oops+0x75/0x170 ? exc_page_fault+0x64/0x140 ? asm_exc_page_fault+0x22/0x30 ? ublk_ctrl_start_recovery.constprop.0+0x82/0x180 ublk_ctrl_uring_cmd+0x4f7/0x6c0 ? pick_next_task_idle+0x26/0x40 io_uring_cmd+0x9a/0x1b0 io_issue_sqe+0x193/0x3f0 io_wq_submit_work+0x9b/0x390 io_worker_handle_work+0x165/0x360 io_wq_worker+0xcb/0x2f0 ? finish_task_switch.isra.0+0x203/0x290 ? finish_task_switch.isra.0+0x203/0x290 ? __pfx_io_wq_worker+0x10/0x10 ret_from_fork+0x2d/0x50 ? __pfx_io_wq_worker+0x10/0x10 ret_from_fork_asm+0x1a/0x30 </TASK> Fixes: c732a852b419 ("ublk_drv: add START_USER_RECOVERY and END_USER_RECOVERY support") Reported-and-tested-by: Changhui Zhong <czhong@redhat.com> Closes: https://lore.kernel.org/all/CAGVVp+UvLiS+bhNXV-h2icwX1dyybbYHeQUuH7RYqUvMQf6N3w@mail.gmail.com Reviewed-by: Ming Lei <ming.lei@redhat.com> Signed-off-by: Li Nan <linan122@huawei.com> Link: https://lore.kernel.org/r/20240904031348.4139545-1-ming.lei@redhat.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2024-09-04can: rockchip_canfd: add support for CAN_CTRLMODE_BERR_REPORTINGMarc Kleine-Budde
Add support for Bus Error Reporting. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-20-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: add support for CAN_CTRLMODE_LOOPBACKMarc Kleine-Budde
Add support for loopback mode. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-19-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: add hardware timestamping supportMarc Kleine-Budde
Add support for hardware based timestamping. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-18-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: enable full TX-FIFO depth of 2Marc Kleine-Budde
The previous commit prepared the TX path to make use of the full TX-FIFO depth as much as possible. Increase the available TX-FIFO depth to the hardware maximum of 2. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-17-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: prepare to use full TX-FIFO depthMarc Kleine-Budde
So far the TX-FIFO is only used with a depth of 1, although the hardware offers a depth of 2. The workaround for the chips that are affected by erratum 6, i.e. EFF frames may be send as standard frames, is to re-send the EFF frame. This means the driver cannot queue the next frame for sending, as long ad the EFF frame has not been successfully send out. Introduce rkcanfd_get_effective_tx_free() that returns "0" space in the TX-FIFO if an EFF frame is pending and the actual free space in the TX-FIFO otherwise. Then replace rkcanfd_get_tx_free() with rkcanfd_get_effective_tx_free() everywhere. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-16-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: add stats support for errata workaroundsMarc Kleine-Budde
The driver contains workarounds for some of the rk3568v2 errata. Add ethtool-based statistics ("ethtool -S") to track how often an erratum workaround was needed. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-15-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: rkcanfd_get_berr_counter_corrected(): work around ↵Marc Kleine-Budde
broken {RX,TX}ERRORCNT register Tests show that sometimes both CAN bus error counters read 0x0, even if the controller is in warning mode (RKCANFD_REG_STATE_ERROR_WARNING_STATE in RKCANFD_REG_STATE set). To work around this issue, if both error counters read from hardware are 0x0, use the structure priv->bec, otherwise save the read value in priv->bec. In rkcanfd_handle_rx_int_one() decrement the priv->bec.rxerr for successfully RX'ed CAN frames. In rkcanfd_handle_tx_done_one() decrement the priv->bec.txerr for successfully TX'ed CAN frames. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-14-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: implement workaround for erratum 12Marc Kleine-Budde
The rk3568 CAN-FD errata sheet as of Tue 07 Nov 2023 11:25:31 +08:00 says: | A dominant bit at the third bit of the intermission may cause a | transmission error. | | When sampling the third bit of the intermission as a dominant bit, if | tx_req is configured to transmit extended frames at this time, the | extended frame may be sent to the bus in the format of a standard | frame. The extended frame will be sent as a standard frame and will not | result in error frames Turn on "Interframe Spaceing RX Mode" only during TX to work around erratum 12, according to rock-chip: | Spaceing RX Mode = 1, the third Bit between frames cannot receive | and send, and the fourth Bit begins to receive and send. | | Spaceing RX Mode = 0, allowing the third Bit between frames to | receive and send. Message-ID: <be72939f-0a9e-0608-dfff-7b0096a26eba@rock-chips.com> Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-13-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: implement workaround for erratum 6Marc Kleine-Budde
The rk3568 CAN-FD errata sheet as of Tue 07 Nov 2023 11:25:31 +08:00 says: | The CAN controller's transmission of extended frames may | intermittently change into standard frames. | | When using the CAN controller to send extended frames, if the | 'tx_req' is configured as 1 and coincides with the internal | transmission point, the extended frame will be transmitted onto the | bus in the format of a standard frame. To work around Erratum 6, the driver is in self-receiving mode (RXSTX) and all received CAN frames are passed through rkcanfd_rxstx_filter(). Add a check in rkcanfd_rxstx_filter() whether the received frame corresponds to the current outgoing frame, but the extended CAN ID has been mangled to a standard ID. In this case re-send the original CAN frame. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-12-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: add TX PATHMarc Kleine-Budde
The IP core has a TX event FIFO. In other IP cores, this type of FIFO usually contains the events that a CAN frame has been successfully sent. However, the IP core on the rk3568v2 the FIFO also holds events of unsuccessful transmission attempts. It turned out that the best way to work around this problem is to set the IP core to self-receive mode (RXSTX), filter out the self-received frames and insert them into the complete TX path. Add a pair new functions to check if 2 struct canfd_frame are equal. The 1st checks if the header of the CAN frames are equal, the 2nd checks if the data portion are equal: - rkcanfd_can_frame_header_equal() - rkcanfd_can_frame_data_equal() Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-11-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: rkcanfd_register_done(): add warning for erratum 5Marc Kleine-Budde
Tests on the rk3568v2 and rk3568v3 show that a reduced "baudclk" (e.g. 80MHz, compared to the standard 300MHz) significantly increases the possibility of incorrect FIFO counters, i.e. erratum 5. Print an info message if the clock is below the known good value of 300MHz. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-10-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: rkcanfd_handle_rx_int_one(): implement workaround for ↵Marc Kleine-Budde
erratum 5: check for empty FIFO The rk3568 CAN-FD errata sheet as of Tue 07 Nov 2023 11:25:31 +08:00 says: | Erratum 5: Counters related to the TXFIFO and RXFIFO exhibit | abnormal counting behavior. | | Due to a bug in the cross-asynchronous logic of the enable signals | for rx_fifo_cnt and txe_fifo_frame_cnt counters, the counts of these | two counters become inaccurate. This issue has resulted in the | inability to use the TXFIFO and RXFIFO functions. The errata sheet mentioned above states that only the rk3568v2 is affected by this erratum, but tests with the rk3568v2 and rk3568v3 show that the RX_FIFO_CNT is sometimes too high. This leads to CAN frames being read from the FIFO, which is then already empty. Further tests on the rk3568v2 and rk3568v3 show that in this situation (i.e. empty FIFO) all elements of the FIFO header (frameinfo, id, ts) contain the same data. On the rk3568v2 and rk3568v3, this problem only occurs extremely rarely with the standard clock of 300 MHz, but almost immediately at 80 MHz. To workaround this problem, check for empty FIFO with rkcanfd_fifo_header_empty() in rkcanfd_handle_rx_int_one() and exit early. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-9-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: add notes about known issuesMarc Kleine-Budde
Even the rk3568v3 has some known issues. Document them together with a reproducer. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-8-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: add support for rk3568v3Marc Kleine-Budde
Add the support for the rk3568v3 SoC, the CAN-FD IP core has 7 documented errata. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-7-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: add quirk for broken CAN-FD supportMarc Kleine-Budde
The errata sheets doesn't say anything about CAN-FD, but tests on the rk3568v2 and rk3568v3 show that receiving certain CAN-FD frames triggers an Error Interrupt. Mark the CAN-FD support as broken. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-6-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: add quirks for errata workaroundsMarc Kleine-Budde
Add a basic infrastructure for quirks for the 12 documented errata. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-5-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04can: rockchip_canfd: add driver for Rockchip CAN-FD controllerMarc Kleine-Budde
Add driver for the Rockchip CAN-FD controller. The IP core on the rk3568v2 SoC has 12 documented errata. Corrections for these errata will be added in the upcoming patches. Since several workarounds are required for the TX path, only add the base driver that only implements the RX path. Although the RX path implements CAN-FD support, it's not activated in ctrlmode_supported, as the IP core in the rk3568v2 has problems with receiving or sending certain CAN-FD frames. Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240904-rockchip-canfd-v5-4-8ae22bcb27cc@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-09-04ACPI: battery: use driver core managed async probingThomas Weißschuh
In commit 0f66af530116 ("ACPI: battery: asynchronous init") the ACPI battery driver switched to a custom async driver probing to avoid delaying the system boot. In the meantime the driver core gained its own async probing logic for "slow devices which probing order is not essential for booting the system". Switch over to the core logic and drop the custom one. Signed-off-by: Thomas Weißschuh <linux@weissschuh.net> Link: https://patch.msgid.link/20240903-acpi-battery-async-v1-1-e4deb74fcdba@weissschuh.net [ rjw: Changelog edit ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-09-04eth: fbnic: Add support to fetch group statsMohsin Bashir
Add support for group stats for mac. The fbnic_set_counter help preserve the default values for counters which are not touched by the driver. The 'reset' flag in 'get_eth_mac_stats' allows to choose between resetting the counter to recent most value or fetching the aggregated values of the counter. The 'fbnic_stat_rd64' read 64b stats counters in an atomic fashion using read-read-read approach. This allows to isolate cases where counter is moving too fast making accuracy of the counter questionable. Command: ethtool -S eth0 --groups eth-mac Example Output: eth-mac-FramesTransmittedOK: 421644 eth-mac-FramesReceivedOK: 3849708 eth-mac-FrameCheckSequenceErrors: 0 eth-mac-AlignmentErrors: 0 eth-mac-OctetsTransmittedOK: 64799060 eth-mac-FramesLostDueToIntMACXmitError: 0 eth-mac-OctetsReceivedOK: 5134513531 eth-mac-FramesLostDueToIntMACRcvError: 0 eth-mac-MulticastFramesXmittedOK: 568 eth-mac-BroadcastFramesXmittedOK: 454 eth-mac-MulticastFramesReceivedOK: 276106 eth-mac-BroadcastFramesReceivedOK: 26119 eth-mac-FrameTooLongErrors: 0 Signed-off-by: Mohsin Bashir <mohsin.bashr@gmail.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-04eth: fbnic: Add ethtool support for fbnicMohsin Bashir
Add ethtool ops support and enable 'get_drvinfo' for fbnic. The driver provides firmware version information while the driver name and bus information is provided by ethtool_get_drvinfo(). Signed-off-by: Mohsin Bashir <mohsin.bashr@gmail.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-04cpufreq: intel_pstate: Set asymmetric CPU capacity on hybrid systemsRafael J. Wysocki
Make intel_pstate use the HWP_HIGHEST_PERF values from MSR_HWP_CAPABILITIES to set asymmetric CPU capacity information via the previously introduced arch_set_cpu_capacity() on hybrid systems without SMT. Setting asymmetric CPU capacity is generally necessary to allow the scheduler to compute task sizes in a consistent way across all CPUs in a system where they differ by capacity. That, in turn, should help to improve scheduling decisions. It is also necessary for the schedutil cpufreq governor to operate as expected on hybrid systems where tasks migrate between CPUs of different capacities. The underlying observation is that intel_pstate already uses MSR_HWP_CAPABILITIES to get CPU performance information which is exposed by it via sysfs and CPU performance scaling is based on it. Thus using this information for setting asymmetric CPU capacity is consistent with what the driver has been doing already. Moreover, HWP_HIGHEST_PERF reflects the maximum capacity of a given CPU including both the instructions-per-cycle (IPC) factor and the maximum turbo frequency and the units in which that value is expressed are the same for all CPUs in the system, so the maximum capacity ratio between two CPUs can be obtained by computing the ratio of their HWP_HIGHEST_PERF values. Of course, in principle that capacity ratio need not be directly applicable at lower frequencies, so using it for providing the asymmetric CPU capacity information to the scheduler is a rough approximation, but it is as good as it gets. Also, measurements indicate that this approximation is not too bad in practice. If the given system is hybrid and non-SMT, the new code disables ITMT support in the scheduler (because it may get in the way of asymmetric CPU capacity code in the scheduler that automatically gets enabled by setting asymmetric CPU capacity) after initializing all online CPUs and finds the one with the maximum HWP_HIGHEST_PERF value. Next, it computes the capacity number for each (online) CPU by dividing the product of its HWP_HIGHEST_PERF and SCHED_CAPACITY_SCALE by the maximum HWP_HIGHEST_PERF. When a CPU goes offline, its capacity is reset to SCHED_CAPACITY_SCALE and if it is the one with the maximum HWP_HIGHEST_PERF value, the capacity numbers for all of the other online CPUs are recomputed. This also takes care of a cleanup during driver operation mode changes. Analogously, when a new CPU goes online, its capacity number is updated and if its HWP_HIGHEST_PERF value is greater than the current maximum one, the capacity numbers for all of the other online CPUs are recomputed. The case when the driver is notified of a CPU capacity change, either through the HWP interrupt or through an ACPI notification, is handled similarly to the CPU online case above, except that if the target CPU is the current highest-capacity one and its capacity is reduced, the capacity numbers for all of the other online CPUs need to be recomputed either. If the driver's "no_trubo" sysfs attribute is updated, all of the CPU capacity information is computed from scratch to reflect the new turbo status. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> Tested-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> # scale invariance Link: https://patch.msgid.link/1979653.PYKUYFuaPT@rjwysocki.net [ rjw: Fixed a typo in the changelog ] [ rjw: Renamed 3 new functions and added a comment ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-09-04net: sparx5: ditch sparx5_fdma_rx/tx_reload() functionsDaniel Machon
These direction specific functions can be ditched in favor of a single function: sparx5_fdma_reload(), which retrieves the channel id from the fdma struct instead. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-04net: sparx5: use contiguous memory for tx buffersDaniel Machon
Currently, the driver uses a linked list for storing the tx buffer addresses. This requires a good amount of extra bookkeeping code. Ditch the linked list in favor of tx buffers being in the same contiguous memory space as the DCB's and the DB's. The FDMA library has a helper for this - so use that. The tx buffer addresses are now retrieved as an offset into the FDMA memory space. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-04net: sparx5: use library helper for freeing tx buffersDaniel Machon
The library has the helper fdma_free_phys() for freeing physical FDMA memory. Use it in the exit path. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-04net: sparx5: use FDMA library for adding DCB's in the tx pathDaniel Machon
Use the fdma_dcb_add() function to add DCB's in the tx path. This gets rid of the open-coding of nextptr and dataptr handling and leaves it to the library. Also, make sure the fdma indexes are advanced using: fdma_dcb_advance(), so that the correct nextptr and dataptr offsets are retrieved. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-04net: sparx5: use the FDMA library for allocation of tx buffersDaniel Machon
Use the two functions: fdma_alloc_phys() and fdma_dcb_init() for tx buffer allocation and use the new buffers throughout. In order to replace the old buffers with the new ones, we have to do the following refactoring: - use fdma_alloc_phys() and fdma_dcb_init() - replace the variables: tx->dma, tx->first_entry and tx->curr_entry with the equivalents from the FDMA struct. - replace uses of sparx5_db_hw and sparx5_tx_dcb_hw with fdma_db and fdma_dcb. - add sparx5_fdma_tx_dataptr_cb callback for obtaining the dataptr. - Initialize FDMA struct values. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-04net: sparx5: use a few FDMA helpers in the rx pathDaniel Machon
The library provides helpers for a number of DCB and DB operations. Use these in the rx path. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-04net: sparx5: use library helper for freeing rx buffersDaniel Machon
The library has the helper fdma_free_phys() for freeing physical FDMA memory. Use it in the exit path. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-04net: sparx5: use FDMA library for adding DCB's in the rx pathDaniel Machon
Use the fdma_dcb_add() function to add DCB's in the rx path. This gets rid of the open-coding of nextptr and dataptr handling and leaves it to the library. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>