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2018-03-27net-usb: add qmi_wwan if on lte modem wistron neweb d18q1Giuseppe Lippolis
This modem is embedded on dlink dwr-921 router. The oem configuration states: T: Bus=02 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#= 2 Spd=480 MxCh= 0 D: Ver= 2.00 Cls=00(>ifc ) Sub=00 Prot=00 MxPS=64 #Cfgs= 1 P: Vendor=1435 ProdID=0918 Rev= 2.32 S: Manufacturer=Android S: Product=Android S: SerialNumber=0123456789ABCDEF C:* #Ifs= 7 Cfg#= 1 Atr=80 MxPwr=500mA I:* If#= 0 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=ff Prot=ff Driver=option E: Ad=81(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=01(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 1 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=42 Prot=01 Driver=(none) E: Ad=82(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=02(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 2 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=00 Prot=00 Driver=option E: Ad=84(I) Atr=03(Int.) MxPS= 64 Ivl=32ms E: Ad=83(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=03(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 3 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=ff Driver=qmi_wwan E: Ad=86(I) Atr=03(Int.) MxPS= 64 Ivl=32ms E: Ad=85(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=04(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 4 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=ff Driver=qmi_wwan E: Ad=88(I) Atr=03(Int.) MxPS= 64 Ivl=32ms E: Ad=87(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=05(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 5 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=ff Driver=qmi_wwan E: Ad=8a(I) Atr=03(Int.) MxPS= 64 Ivl=32ms E: Ad=89(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=06(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 6 Alt= 0 #EPs= 2 Cls=08(stor.) Sub=06 Prot=50 Driver=(none) E: Ad=8b(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=07(O) Atr=02(Bulk) MxPS= 512 Ivl=125us Tested on openwrt distribution Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-27net: aquantia: Make function hw_atl_utils_mpi_set_speed() staticWei Yongjun
Fixes the following sparse warning: drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c:508:5: warning: symbol 'hw_atl_utils_mpi_set_speed' was not declared. Should it be static? Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-27net: mvpp2: Don't use dynamic allocs for local variablesMaxime Chevallier
Some helper functions that search for given entries in the TCAM filter on PPv2 controller make use of dynamically alloced temporary variables, allocated with GFP_KERNEL. These functions can be called in atomic context, and dynamic alloc is not really needed in these cases anyways. This commit gets rid of dynamic allocs and use stack allocation in the following functions, and where they're used : - mvpp2_prs_flow_find - mvpp2_prs_vlan_find - mvpp2_prs_double_vlan_find - mvpp2_prs_mac_da_range_find For all these functions, instead of returning an temporary object representing the TCAM entry, we simply return the TCAM id that matches the requested entry. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-27net: mvpp2: Make mvpp2_prs_hw_read a parser entry init functionMaxime Chevallier
The mvpp2_prs_hw_read function uses the 'index' field of the struct mvpp2_prs_entry to initialize the rest of the fields. This makes it unclear from a caller's perspective, who needs to manipulate a struct that is not entirely initialized. This commit makes it an init function for prs_entry, by passing it the index as a parameter. The function now zeroes the entry, and sets the index field before doing all other init from HW. The function is renamed 'mvpp2_prs_init_from_hw' to make that clear. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-27Merge tag 'scmi-fixes-4.17' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers Pull "ARM SCMI fixes/cleanups for v4.17" from Sudeep Holla: Couple of fixes for build warning due to uninitialised variable and static checker warning for passing NULL pointer to PTR_ERR. It also contains cleanup suggested by Stephen Boyd in SCMI clock driver using the new devm_of_clk_add_hw_provider() API. * tag 'scmi-fixes-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: clk: scmi: use devm_of_clk_add_hw_provider() API and drop scmi_clocks_remove firmware: arm_scmi: prevent accessing rate_discrete uninitialized hwmon: (scmi) return -EINVAL when sensor information is unavailable
2018-03-27Merge branch '40GbE' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue Jeff Kirsher says: ==================== 40GbE Intel Wired LAN Driver Updates 2018-03-26 This series contains updates to i40e only. Jake provides several patches which remove the need for cmpxchg64(), starting with moving I40E_FLAG_[UDP]_FILTER_SYNC from pf->flags to pf->state since they are modified during run time possibly when the RTNL lock is not held so they should be a state bits and not flags. Moved additional "flags" which should be state fields, into pf->state. Ensure we hold the RTNL lock for the entire sequence of preparing for reset and when resuming, which will protect the flags related to interrupt scheme under RTNL lock so that their modification is properly threaded. Finally, cleanup the use of cmpxchg64() since it is no longer needed. Cleaned up the holes in the feature flags created my moving some flags to the state field. Björn Töpel adds XDP_REDIRECT support as well as tweaking the page counting for XDP_REDIRECT so that it will function properly. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-27Merge tag 'qcom-drivers-for-4.17' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers Pull "Qualcomm ARM Based Driver Updates for v4.17" from Andy Gross: * Fix NV upload increment in wcnss_ctrl * Add support in rmtfs-mem driver for assigning memory * tag 'qcom-drivers-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux: soc: qcom: wcnss_ctrl: Fix increment in NV upload soc: qcom: rmtfs-mem: Add support for assigning memory to remote
2018-03-27libata: ensure host is free'd on error exit pathsColin Ian King
The host structure is not being kfree'd on two error exit paths leading to memory leaks. Add in new err_free label and kfree host. Detected by CoverityScan, CID#1466103 ("Resource leak") Fixes: 2623c7a5f279 ("libata: add refcounting to ata_host") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2018-03-27Merge tag 'amlogic-drivers' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/drivers Pull "Amlogic driver updates for v4.17" from Kevin Hilman: - socinfo: add more IDs for newer SoC detection - firmware: update init to use module_platform_driver_probe - soc: mix. VPU power controller fixes * tag 'amlogic-drivers' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: amlogic: meson-gx-socinfo: Update soc ids firmware: meson-sm: rework meson_sm_init to use module_platform_driver_probe meson-gx-socinfo: make local function meson_gx_socinfo_init static meson-mx-socinfo: Make local function meson_mx_socinfo_init() static soc: amlogic: meson-gx-pwrc-vpu: fix error on shutdown when domain is powered off soc: amlogic: meson-gx-pwrc-vpu: don't print error message on probe deferral
2018-03-27Merge tag 'v4.16-next-soc' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/drivers Pull "ARM: mediatek: updates for soc drivers for v4.16-next" from Matthias Brugger: scpsy: - mt2712: update power domains to reflect design changes in the SoC - fix initialisation of power subdomains - add support for mt7623a SoC - use defines for mt2701 bus protection mask * tag 'v4.16-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: soc: mediatek: update power domain data of MT2712 dt-bindings: soc: update MT2712 power dt-bindings soc: mediatek: fix the mistaken pointer accessed when subdomains are added soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC soc: mediatek: avoid hardcoded value with bus_prot_mask dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC
2018-03-27Merge tag 'tegra-for-4.17-soc-2' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers Pull "soc/tegra: Changes for v4.17-rc1" from Thierry Reding: This contains more Tegra194 support as well as an implementation for the MBIST workaround needed to avoid some memory-related issues on Tegra210. * tag 'tegra-for-4.17-soc-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Use the new reset APIs to manage reset controllers soc/tegra: pmc: Pass PMC to tegra_powergate_power_up() soc/tegra: pmc: MBIST work around for Tegra210 soc/tegra: pmc: Add Tegra194 compatibility string soc/tegra: Add Tegra194 SoC configuration option
2018-03-27gpio: Add Spreadtrum PMIC EIC driver supportBaolin Wang
The Spreadtrum PMIC EIC controller contains only one bank of debounce EIC, and this bank contains 16 EICs. Each EIC can only be used as input mode, as well as supporting the debounce and the capability to trigger interrupts when detecting input signals. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27gpio: Add Spreadtrum EIC driver supportBaolin Wang
The Spreadtrum digital-chip EIC controller has 4 sub-modules: debounce EIC, latch EIC, async EIC and sync EIC, and each sub-module can has multiple banks and each bank contains 8 EICs. Each EIC can only be used as input mode, and has the capability to trigger interrupts when detecting input signals. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27Merge tag 'tegra-for-4.17-firmware' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers Pull "firmware: Changes for v4.17-rc1" from Thierry Reding: These changes are rather small, with just a fix for a return value check and some preparatory work for Tegra194 BPMP support. * tag 'tegra-for-4.17-firmware' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux: firmware: tegra: adjust tested variable firmware: tegra: Simplify channel management
2018-03-27Merge tag 'renesas-soc-for-v4.17' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Renesas ARM Based SoC Updates for v4.17" from Simon Horman: 01d675f159e0 ARM: shmobile: rcar-gen2: Add watchdog support 58adf1ba0d22 ARM: shmobile: Add watchdog support * SoC - Identify R-Car V3H (r8a77980) and M3N (r8a77965) - Enable R-Car Gen2 regulator quirk for Stout board with H3 (r8a7790) SoC Marek Vaust says "Regulator setup is suboptimal on H2 Stout too. The Stout newly has two DA9210 regulators, so the quirk is extended to handle another DA9210 at i2c address 0x70." - Add watchdog support This is the SoC portion of the following solution. It is not yet enabled in DT as it is not functional without clock dependencies in place. Fabrizio Castro says "this series has been around for some time as RFC, and it has collected useful comments from the community along the way. The solution proposed by this patch set works for most R-Car Gen2 and RZ/G1 devices, but not all of them. We now know that for some R-Car Gen2 early revisions there is no proper software fix. Anyway, no product has been built around early revisions, but development boards mounting early revisions (basically prototypes) are still out there. As a result, this series isn't enabling the internal watchdog on R-Car Gen2 boards, developers may enable it in board specific device trees if needed. This series has been tested by me on the iwg20d, iwg22d, Lager, Alt, and Koelsch boards. The problem =========== To deal with SMP on R-Car Gen2 and RZ/G1, we install a reset vector to ICRAM1 and we program the [S]BAR registers so that when we turn ON the non-boot CPUs they are redirected to the reset vector installed by Linux in ICRAM1, and eventually they continue the execution to RAM, where the SMP bring-up code will take care of the rest. The content of the [S]BAR registers survives a watchdog triggered reset, and as such after the watchdog fires the boot core will try and execute the SMP bring-up code instead of jumping to the bootrom code. The fix ======= The main strategy for the solution is to let the reset vector decide if it needs to jump to shmobile_boot_fn or to the bootrom code. In a watchdog triggered reset scenario, since the [S]BAR registers keep their values, the boot CPU will jump into the newly designed reset vector, the assembly routine will eventually test WOVF (a bit in register RWTCSRA that indicates if the watchdog counter has overflown, the value of this bit gets retained in this scenario), and jump to the bootrom code which will in turn load up the bootloader, etc. When bringing up SMP or using CPU hotplug, the reset vector will jump to shmobile_boot_fn instead." * R-Car Rst - Add support for R-Car V3H (r8a77980) and V3H (r8a77980) * R-Car SYSC - Mark rcar_sysc_matches[] __initconst Geert Uytterhoeven says "This frees another 1764 bytes (arm32/shmobile_defconfig) or 1000 bytes (arm64/renesas_defconfig) of memory after kernel init." - Fix power area parents Sergei Shtylyov says "According to the figure 9.2(b) of the R-Car Series, 3rd Generation User’s Manual: Hardware Rev. 0.80 the A2IRn and A2SCn power areas in R8A77970 have the A3IR area as a parent, thus the SYSC driver has those parents wrong.." - Add support for R-Car V3H (r8a77980) and V3H (r8a77980) * tag 'renesas-soc-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: rcar-gen2: Add watchdog support ARM: shmobile: Add watchdog support ARM: shmobile: rcar-gen2: Fix error check in regulator quirk soc: renesas: rcar-rst: Add support for R-Car M3-N ARM: shmobile: stout: enable R-Car Gen2 regulator quirk soc: renesas: rcar-sysc: Add R-Car M3-N support soc: renesas: Identify R-Car M3-N soc: renesas: rcar-sysc: add R8A77980 support dt-bindings: power: add R8A77980 SYSC power domain definitions soc: renesas: r8a77970-sysc: fix power area parents soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2 soc: renesas: rcar-rst: add R8A77980 support soc: renesas: identify R-Car V3H soc: renesas: rcar-sysc: Mark rcar_sysc_matches[] __initconst
2018-03-27gpio: ath79: Fix potential NULL dereference in ath79_gpio_probe()Wei Yongjun
platform_get_resource() may return NULL, add proper check to avoid potential NULL dereferencing. This is detected by Coccinelle semantic patch. @@ expression pdev, res, n, t, e, e1, e2; @@ res = platform_get_resource(pdev, t, n); + if (!res) + return -EINVAL; ... when != res == NULL e = devm_ioremap(e1, res->start, e2); Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> [albeu@free.fr: Fixed patch to apply on current tree] Signed-off-by: Alban Bedel <albeu@free.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27Merge branch 'gpio-reserved-ranges' into develLinus Walleij
2018-03-27pinctrl: qcom: Don't allow protected pins to be requestedStephen Boyd
Some qcom platforms make some GPIOs or pins unavailable for use by non-secure operating systems, and thus reading or writing the registers for those pins will cause access control issues and reset the device. With a DT/ACPI property to describe the set of pins that are available for use, parse the available pins and set the irq valid bits for gpiolib to know what to consider 'valid'. This should avoid any issues with gpiolib. Furthermore, implement the pinmux_ops::request function so that pinmux can also make sure to not use pins that are unavailable. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Timur Tabi <timur@codeaurora.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27gpiolib: Support 'gpio-reserved-ranges' propertyStephen Boyd
Some qcom platforms make some GPIOs or pins unavailable for use by non-secure operating systems, and thus reading or writing the registers for those pins will cause access control issues. Add support for a DT property to describe the set of GPIOs that are available for use so that higher level OSes are able to know what pins to avoid reading/writing. Non-DT platforms can add support by directly updating the chip->valid_mask. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Timur Tabi <timur@codeaurora.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27gpiolib: Change bitmap allocation to kmalloc_arrayStephen Boyd
We don't need to clear out these bits when we set them immediately after. Use kmalloc_array() to skip clearing the bits. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Timur Tabi <timur@codeaurora.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27gpiolib: Extract mask allocation into subroutineStephen Boyd
We're going to use similar code to allocate and set all the bits in a mask for valid gpios to use. Extract the code from the irqchip version so it can be reused. Signed-off-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Timur Tabi <timur@codeaurora.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27gpio: mockup: fix a potential crash when creating debugfs entriesBartosz Golaszewski
If we failed to create the top debugfs directory, we must not try to create the child nodes. We currently only check if gpio_mockup_dbg_dir is not NULL, but it can also contain an errno if debugfs is disabled in build options. Use IS_ERR_OR_NULL() instead. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27gpio: pca953x: add compatibility for pcal6524 and pcal9555aH. Nikolaus Schaller
The Pyra-Handheld originally used the tca6424 but recently we have replaced it by the pin and package compatible pcal6524. So let's add this to the bindings and the driver. And while we are at it, the pcal9555a does not have a compatible entry either but is already supported by the device id table. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27gpio: dwapb: Add support for a bus clockPhil Edworthy
Enable an optional bus clock provided by DT. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27gpio: Remove VLA from xra1403 driverLaura Abbott
The new challenge is to remove VLAs from the kernel (see https://lkml.org/lkml/2018/3/7/621) This patch replaces a VLA with an appropriate call to kmalloc_array. Signed-off-by: Laura Abbott <labbott@redhat.com> Reviewed-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27gpio: Remove VLA from MAX3191X driverLaura Abbott
The new challenge is to remove VLAs from the kernel (see https://lkml.org/lkml/2018/3/7/621) This patch replaces several a VLA with an appropriate call to kmalloc_array. Signed-off-by: Laura Abbott <labbott@redhat.com> Reviewed-and-tested-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27pinctrl: uniphier: add UART hardware flow control pin-mux settingsKunihiko Hayashi
UniPhier SoCs have the following pins for hardware flow control of UART: XRTS, XCTS and for modem control of UART: XDTR, XDSR, XDCD, XRI The port number with the flow control is SoC-dependent. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27pinctrl: sunxi: add support for the Allwinner H6 main pin controllerIcenowy Zheng
The Allwinner H6 SoC has two pin controllers, one main controller (called CPUX-PORT in user manual) and one controller in CPUs power domain (called CPUS-PORT in user manual). This commit introduces support for the main pin controller on H6. The pin bank A and B are not wired out and hidden from the SoC's documents, however it's shown that the "ATE" (an AC200 chip co-packaged with the H6 die) is connected to the main SoC die via these pin banks. The information about these banks is just copied from the BSP pinctrl driver, but re-formatted to fit the mainline pinctrl driver format. The GPIO functions are dropped, as they're impossible to use -- except a GPIO&IRQ only pin (PB20) which might be the IRQ of ATE. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27pinctrl: sunxi: change irq_bank_base to irq_bank_mapIcenowy Zheng
The Allwinner H6 SoC have its pin controllers with the first IRQ-capable GPIO bank at IRQ bank 1 and the second bank at IRQ bank 5. Change the current code that uses IRQ bank base to a IRQ bank map, in order to support the case that holes exist among IRQ banks. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27pinctrl: sunxi: introduce IRQ bank conversion functionIcenowy Zheng
The Allwinner H6 SoC have its pin controllers with the first IRQ-capable GPIO bank at IRQ bank 1 and the second bank at IRQ bank 5. Some refactors in the sunxi pinctrl framework are needed. This commit introduces a IRQ bank conversion function, which replaces the "(bank_base + bank)" code in IRQ register access. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27pinctrl: sunxi: refactor irq related register function to have descIcenowy Zheng
As the new H6 SoC has holes in the IRQ registers, refactor the IRQ related register function for getting the full pinctrl desc structure. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27HID: google: add google hammer HID driverWei-Ning Huang
Add Google hammer HID driver. This driver allow us to control hammer keyboard backlight and support future features. Signed-off-by: Wei-Ning Huang <wnhuang@google.com> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2018-03-27Merge tag 'amlogic-dt64' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Pull "Amlogic 64-bit DT updates for v4.17" from Kevin Hilman: - AXG: add/enable UART_A, I2C, RMII, system controller, HW RNG - accept MAC from u-boot environment - misc. fixes * tag 'amlogic-dt64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-gx: make efuse read-only ARM64: dts: meson: bump mali450 clk to 744MHz meson-gx-socinfo: Add package id for S905H ARM64: dts: meson-gxbb-wetek: add a wetek specific dtsi to cleanup hub and play2 ARM64: dts: meson: reduce odroid-c2 eMMC maximum rate ARM64: dts: amlogic: Convert to new-style SPDX license identifiers ARM64: dts: meson-axg: fix pwm_AO_cd compatible ARM64: dts: meson-axg: add sec_AO system controller ARM64: dts: meson: accept MAC addr from u-boot environment ARM64: dts: meson s905x: accept MAC addr from u-boot environment ARM64: dts: meson-axg: enable the UART_A controller ARM64: dts: meson-axg: complete the pinctrl info for UART_AO_A ARM64: dts: meson-axg: uart: Add the pinctrl info description ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UART ARM64: dts: meson-axg: add RMII pins for ethernet controller ARM64: dts: meson-axg: enable I2C Master-1 for the audio speaker ARM64: dts: meson-axg: describe pin DT info for I2C controller ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC ARM64: meson-axg: enable hardware rng
2018-03-27drivers/perf: arm_pmu_platform: do not warn about affinity on uniprocessorAlexander Monakov
If there is exactly one CPU present, there is no ambiguity: do not warn that PMU setup would need to guess IRQ affinity. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Signed-off-by: Will Deacon <will.deacon@arm.com>
2018-03-27perf: arm_spe: include linux/vmalloc.h for vmap()Arnd Bergmann
On linux-next, I get a build failure in some configurations: drivers/perf/arm_spe_pmu.c: In function 'arm_spe_pmu_setup_aux': drivers/perf/arm_spe_pmu.c:857:14: error: implicit declaration of function 'vmap'; did you mean 'swap'? [-Werror=implicit-function-declaration] buf->base = vmap(pglist, nr_pages, VM_MAP, PAGE_KERNEL); ^~~~ swap drivers/perf/arm_spe_pmu.c:857:37: error: 'VM_MAP' undeclared (first use in this function); did you mean 'VM_MPX'? buf->base = vmap(pglist, nr_pages, VM_MAP, PAGE_KERNEL); ^~~~~~ VM_MPX drivers/perf/arm_spe_pmu.c:857:37: note: each undeclared identifier is reported only once for each function it appears in drivers/perf/arm_spe_pmu.c: In function 'arm_spe_pmu_free_aux': drivers/perf/arm_spe_pmu.c:878:2: error: implicit declaration of function 'vunmap'; did you mean 'iounmap'? [-Werror=implicit-function-declaration] vmap() is declared in linux/vmalloc.h, so we should include that header file. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> [will: add additional missing #includes reported by Mark] Signed-off-by: Will Deacon <will.deacon@arm.com>
2018-03-27pinctrl: msm8998: Remove owner assignment from platform_driverFabio Estevam
platform_driver does not need to set the owner field, as this will be populated by the driver core. Generated by scripts/coccinelle/api/platform_no_drv_owner.cocci. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27pinctrl: uniphier: divide I2S and S/PDIF audio out pin-mux groupKatsuhiro Suzuki
This patch divides large pin-mux group 'aio' of UniPhier LD11/LD20 to 2 groups as following: aout1 : 8ch I2S output: AO1DACCK, AO1BCK, AO1LRCK, AO1D[0-2] aoutiec1: S/PDIF output : AO1IEC, AO1ARC Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27pinctrl: uniphier: add PXs2 Audio in/out pin-mux settingsKatsuhiro Suzuki
The UniPhier PXs2 SoC audio core use following 25 pins: ain1 : 2ch I2S input : AI1ADCCK, AI1BCK, AI1D0, AI1LRCK ain2 : 8ch I2S input : AI2ADCCK, AI2BCK, AI2D[0-3], AI2LRCK ainiec1 : S/PDIF input : XIRQ17 (for AO1IEC) aout2 : 8ch I2S output: AO2BCK, AO2D0, AO2DACCK, AO2LRCK PORT226, 227, 230 (for AO2D[1-3]) aout3 : 2ch I2S output: AO3BCK, AO3DMIX, AO3DACCK, AO3LRCK aoutiec1: S/PDIF output : PORT132(for AO1IEC) aoutiec2: S/PDIF output : AO2IEC Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-27firmware/dmi_scan: Uninline dmi_get_bios_year() helperAndy Shevchenko
Uninline dmi_get_bios_year() which, in particular, allows us to optimize it in the future. While doing this, convert the function to return an error code when BIOS date is not present or not parsable, or CONFIG_DMI=n. Additionally, during the move, add a bit of documentation. Suggested-by: Bjorn Helgaas <helgaas@kernel.org> Suggested-by: Rafael J. Wysocki <rafael@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Lukas Wunner <lukas@wunner.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rafael J . Wysocki <rjw@rjwysocki.net> Cc: linux-acpi@vger.kernel.org Cc: linux-pci@vger.kernel.org Fixes: 492a1abd61e4 ("dmi: Introduce the dmi_get_bios_year() helper function") Signed-off-by: Ingo Molnar <mingo@kernel.org>
2018-03-27mt76x2: fix warning in ieee80211_get_key_rx_seq()Lorenzo Bianconi
Fall back to software encryption for hw unsupported ciphers in order to fix the following warning in ieee80211_get_key_rx_seq routine: WARNING: CPU: 1 PID: 1277 at backports-2017-11-01/net/mac80211/key.c: 1010 mt76_wcid_key_setup+0x6c/0x138 [mt76] CPU: 1 PID: 1277 Comm: hostapd Tainted: G W 4.9.86 #0 Stack : 00000000 00000000 80527b4a 00000042 80523824 00000000 00000000 80520000 8fd79a9c 804bbda7 80454c84 00000001 000004fd 80523824 8f7e4ba0 8eceda12 00000010 8006af94 00000001 80520000 804c1f04 804c1f08 80459890 8ec999b4 00000003 800a7840 8f7e4ba0 8eceda12 8121de20 00000000 00000001 00c999b4 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ... Call Trace: [<8000f52c>] show_stack+0x70/0x8c [<801d8d04>] dump_stack+0x94/0xd0 [<8002bcd4>] __warn+0x110/0x118 [<8002bd70>] warn_slowpath_null+0x1c/0x2c [<8f0415cc>] mt76_wcid_key_setup+0x6c/0x138 [mt76] [<8f1311b4>] mt76x2_dma_cleanup+0xa38/0x1048 [mt76x2e] Fixes: 30ce7f4456ae ("mt76: validate rx CCMP PN") Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Acked-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-27mt76x2: fix possible NULL pointer dereferencing in mt76x2_tx()Lorenzo Bianconi
Fix a theoretical NULL pointer dereferencing in mt76x2_tx routine that can occurs for injected frames in a monitor vif since vif pointer could be NULL for that interfaces Fixes: 23405236460b ("mt76: fix transmission of encrypted mgmt frames") Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Acked-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-27mt76: use mt76_poll_msec routine in mt76pci_load_firmware()Lorenzo Bianconi
Use mt76_poll_msec() in mt76pci_load_firmware to check if the firmware has been started instead of explicitly poll MCU running register Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-27brcmsmac: allocate ucode with GFP_KERNELTakashi Iwai
The brcms_ucode_init_buf() duplicates the ucode chunks via kmemdup() with GFP_ATOMIC as a precondition of wl->lock acquired. This caused allocation failures sometimes as reported in the bugzilla below. When looking at the the real usage, one can find that it's called solely from brcms_request_fw(), and it's obviously outside the lock. Hence we can use GFP_KERNEL there safely for avoiding such allocation errors. Bugzilla: http://bugzilla.suse.com/show_bug.cgi?id=1085174 Signed-off-by: Takashi Iwai <tiwai@suse.de> Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-27brcmfmac: add kerneldoc for struct brcmf_bus::msgbufArend Van Spriel
This field did not have kerneldoc description so adding it now. Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-27brcmfmac: get rid of brcmf_fw_get_full_name()Arend Van Spriel
The function was pretty minimal and now it is called only from one place so just get rid of it. Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-27brcmfmac: get rid of brcmf_fw_map_chip_to_name()Arend Van Spriel
The function is no longer used so removing it. Reviewed-by: Hante Meuleman <hante.meuleman@broadcom.com> Reviewed-by: Pieter-Paul Giesberts <pieter-paul.giesberts@broadcom.com> Reviewed-by: Franky Lin <franky.lin@broadcom.com> Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-27brcmfmac: add extension to .get_fwname() callbacksArend Van Spriel
This changes the bus layer api by having the caller provide an extension. With this the callback can use brcmf_fw_alloc_request() to get the needed firmware name. Reviewed-by: Hante Meuleman <hante.meuleman@broadcom.com> Reviewed-by: Pieter-Paul Giesberts <pieter-paul.giesberts@broadcom.com> Reviewed-by: Franky Lin <franky.lin@broadcom.com> Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-27brcmfmac: introduce brcmf_fw_alloc_request() functionArend Van Spriel
The function brcmf_fw_alloc_request() takes a list of required files and allocated the struct brcmf_fw_request instance accordingly. The request can be modified by the caller before being passed to the brcmf_fw_request_firmwares() function. Reviewed-by: Hante Meuleman <hante.meuleman@broadcom.com> Reviewed-by: Pieter-Paul Giesberts <pieter-paul.giesberts@broadcom.com> Reviewed-by: Franky Lin <franky.lin@broadcom.com> Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-27brcmfmac: pass struct in brcmf_fw_get_firmwares()Arend Van Spriel
Make the function brcmf_fw_get_firmwares() a bit more easy to extend using a structure to pass the request parameters. Reviewed-by: Hante Meuleman <hante.meuleman@broadcom.com> Reviewed-by: Pieter-Paul Giesberts <pieter-paul.giesberts@broadcom.com> Reviewed-by: Franky Lin <franky.lin@broadcom.com> Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-27brcmfmac: derive firmware filenames from basename mappingArend Van Spriel
Instead of defining individual filenames for firmware and nvram use a basename and derive the names from that. Reviewed-by: Hante Meuleman <hante.meuleman@broadcom.com> Reviewed-by: Pieter-Paul Giesberts <pieter-paul.giesberts@broadcom.com> Reviewed-by: Franky Lin <franky.lin@broadcom.com> Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
generated by cgit (git 2.34.1) at 2025-09-23 08:53:25 +0000