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2020-07-28Bluetooth: hci_h5: Set HCI_UART_RESET_ON_INIT to correct flagsNicolas Boichat
HCI_UART_RESET_ON_INIT belongs in hdev_flags, not flags. Fixes: ce945552fde4a09 ("Bluetooth: hci_h5: Add support for serdev enumerated devices") Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2020-07-28Bluetooth: btusb: Fix and detect most of the Chinese Bluetooth controllersIsmael Ferreras Morezuelas
For some reason they tend to squat on the very first CSR/ Cambridge Silicon Radio VID/PID instead of paying fees. This is an extremely common problem; the issue goes as back as 2013 and these devices are only getting more popular, even rebranded by reputable vendors and sold by retailers everywhere. So, at this point in time there are hundreds of modern dongles reusing the ID of what originally was an early Bluetooth 1.1 controller. Linux is the only place where they don't work due to spotty checks in our detection code. It only covered a minimum subset. So what's the big idea? Take advantage of the fact that all CSR chips report the same internal version as both the LMP sub-version and HCI revision number. It always matches, couple that with the manufacturer code, that rarely lies, and we now have a good idea of who is who. Additionally, by compiling a list of user-reported HCI/lsusb dumps, and searching around for legit CSR dongles in similar product ranges we can find what CSR BlueCore firmware supported which Bluetooth versions. That way we can narrow down ranges of fakes for each of them. e.g. Real CSR dongles with LMP subversion 0x73 are old enough that support BT 1.1 only; so it's a dead giveaway when some third-party BT 4.0 dongle reuses it. So, to sum things up; there are multiple classes of fake controllers reusing the same 0A12:0001 VID/PID. This has been broken for a while. Known 'fake' bcdDevices: 0x0100, 0x0134, 0x1915, 0x2520, 0x7558, 0x8891 IC markings on 0x7558: FR3191AHAL 749H15143 (???) https://bugzilla.kernel.org/show_bug.cgi?id=60824 Fixes: 81cac64ba258ae (Deal with USB devices that are faking CSR vendor) Reported-by: Michał Wiśniewski <brylozketrzyn@gmail.com> Tested-by: Mike Johnson <yuyuyak@gmail.com> Tested-by: Ricardo Rodrigues <ekatonb@gmail.com> Tested-by: M.Hanny Sabbagh <mhsabbagh@outlook.com> Tested-by: Oussama BEN BRAHIM <b.brahim.oussama@gmail.com> Tested-by: Ismael Ferreras Morezuelas <swyterzone@gmail.com> Signed-off-by: Ismael Ferreras Morezuelas <swyterzone@gmail.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2020-07-27remoteproc: qcom_q6v5_mss: Remove redundant running stateSibi Sankar
Remove the redundant running state, as an equivalent is maintained in the common q6v5 resource handling helpers. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200602163257.26978-2-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27remoteproc: qcom: q6v5: Update running state before requesting stopSibi Sankar
Sometimes the stop triggers a watchdog rather than a stop-ack. Update the running state to false on requesting stop to skip the watchdog instead. Error Logs: $ echo stop > /sys/class/remoteproc/remoteproc0/state ipa 1e40000.ipa: received modem stopping event remoteproc-modem: watchdog received: sys_m_smsm_mpss.c:291:APPS force stop qcom-q6v5-mss 4080000.remoteproc-modem: port failed halt ipa 1e40000.ipa: received modem offline event remoteproc0: stopped remote processor 4080000.remoteproc-modem Reviewed-by: Evan Green <evgreen@chromium.org> Fixes: 3b415c8fb263 ("remoteproc: q6v5: Extract common resource handling") Cc: stable@vger.kernel.org Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200602163257.26978-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27remoteproc: qcom_q6v5_mss: Add modem debug policy supportSibi Sankar
Add modem debug policy support which will enable coredumps and live debug support when the msadp firmware is present on secure devices. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200722201047.12975-4-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27remoteproc: qcom_q6v5_mss: Validate modem blob firmware size before loadSibi Sankar
The following mem abort is observed when one of the modem blob firmware size exceeds the allocated mpss region. Fix this by restricting the copy size to segment size using request_firmware_into_buf before load. Err Logs: Unable to handle kernel paging request at virtual address Mem abort info: ... Call trace: __memcpy+0x110/0x180 rproc_start+0xd0/0x190 rproc_boot+0x404/0x550 state_store+0x54/0xf8 dev_attr_store+0x44/0x60 sysfs_kf_write+0x58/0x80 kernfs_fop_write+0x140/0x230 vfs_write+0xc4/0x208 ksys_write+0x74/0xf8 ... Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Fixes: 051fb70fd4ea4 ("remoteproc: qcom: Driver for the self-authenticating Hexagon v5") Cc: stable@vger.kernel.org Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200722201047.12975-3-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27remoteproc: qcom_q6v5_mss: Validate MBA firmware size before loadSibi Sankar
The following mem abort is observed when the mba firmware size exceeds the allocated mba region. MBA firmware size is restricted to a maximum size of 1M and remaining memory region is used by modem debug policy firmware when available. Hence verify whether the MBA firmware size lies within the allocated memory region and is not greater than 1M before loading. Err Logs: Unable to handle kernel paging request at virtual address Mem abort info: ... Call trace: __memcpy+0x110/0x180 rproc_start+0x40/0x218 rproc_boot+0x5b4/0x608 state_store+0x54/0xf8 dev_attr_store+0x44/0x60 sysfs_kf_write+0x58/0x80 kernfs_fop_write+0x140/0x230 vfs_write+0xc4/0x208 ksys_write+0x74/0xf8 __arm64_sys_write+0x24/0x30 ... Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Fixes: 051fb70fd4ea4 ("remoteproc: qcom: Driver for the self-authenticating Hexagon v5") Cc: stable@vger.kernel.org Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200722201047.12975-2-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-28usb: chipidea: imx: get available runtime dr mode for wakeup settingPeter Chen
If runtime dr_mode is not dual-role, it doesn't need to enable ID wakeup interrupt. If runtime dr_mode is host, it doesn't need to enable VBUS wakeup interrupt. With these changes, the user will not get the unexpected wakeup for single role use case. For example, the host-only use case at Micro-AB port, the controller should not be waken up by only plug in Micro-AB cable or the Micro-B cable with host. Signed-off-by: Peter Chen <peter.chen@nxp.com>
2020-07-27soc: qcom: pdr: Reorder the PD state indication ackSibi Sankar
The Protection Domains (PD) have a mechanism to keep its resources enabled until the PD down indication is acked. Reorder the PD state indication ack so that clients get to release the relevant resources before the PD goes down. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rishabh Bhatnagar <rishabhb@codeaurora.org> Fixes: fbe639b44a82 ("soc: qcom: Introduce Protection Domain Restart helpers") Reported-by: Rishabh Bhatnagar <rishabhb@codeaurora.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200701195954.9007-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-28usb: chipidea: add query_available_role interfacePeter Chen
The glue layer may need to know current available role to do some setting, eg, the wakeup setting. So we add ci_hdrc_query_available_role for that. Signed-off-by: Peter Chen <peter.chen@nxp.com>
2020-07-28power: supply: rt5033_battery: Fix error code in rt5033_battery_probe()Peng Fan
In the function rt5033_battery_probe(), it should return -ENOMEM instead of -EINVAL when call function devm_kzalloc() failed. Signed-off-by: Peng Fan <fanpeng@loongson.cn> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-07-28power: supply: max17040: Add POWER_SUPPLY_PROP_CAPACITY_ALERT_MINMatheus Castello
Adds the property POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN to export the chip->low_soc_alert and add the property as writeable, implementing max17040_prop_writeable and max17040_set_property, so with that the user space can readjust the alerts. Signed-off-by: Matheus Castello <matheus@castello.eng.br> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-07-28power: supply: check if calc_soc succeeded in pm860x_init_batteryTom Rix
clang static analysis flags this error 88pm860x_battery.c:522:19: warning: Assigned value is garbage or undefined [core.uninitialized.Assign] info->start_soc = soc; ^ ~~~ soc is set by calling calc_soc. But calc_soc can return without setting soc. So check the return status and bail similarly to other checks in pm860x_init_battery and initialize soc to silence the warning. Fixes: a830d28b48bf ("power_supply: Enable battery-charger for 88pm860x") Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-07-28power: supply: bq2xxxx: Replace HTTP links with HTTPS onesAlexander A. Klimov
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> [also update recently added ti.com http links] Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-07-28power: reset: add driver for LinkStation power offDaniel González Cabanelas
Some Buffalo LinkStations perform the power off operation, at restart time, depending on the state of an output pin (LED2/INTn) at the ethernet PHY. This pin is also used to wake the machine when a WoL packet is received by the PHY. The driver is required by the Buffalo LinkStation LS421DE (ARM MVEBU), and other models. Without it, the board remains forever halted if a power off command is executed, unless the PSU is disconnected and connected again. Add the driver to provide the power off function and also make the WoL feature to be available. Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-07-28power: supply: sc27xx: prevent adc * 1000 from overflowChunyan Zhang
The input parameter is int type, cause adc * 1000 could overflow. Change to use s64 to avoid this issue. Signed-off-by: Chen Yongzhi <yongzhi.chen@unisoc.com> Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-07-27of: property: Add device link support for pinctrl-0 through pinctrl-8Saravana Kannan
Add support for pinctrl-0 through pinctrl-8 explicitly instead of trying to add support for pinctrl-%d properties. Of all the pinctrl-* properties in dts files (20322), only 47% (9531) are pinctrl-%d properties. Of all the pinctrl-%d properties, 99.5% (9486) are made up of pinctrl-[0-2]. 'pinctrl-8' is the current maximum found in dts files. Trying to parse all pinctrl-* properties and checking for pinctrl-%d is unnecessarily complicated. So, just add support for pinctrl-[0-8] for now. In the unlikely event we ever exceed pinctrl-8, we can come back and improve this. Signed-off-by: Saravana Kannan <saravanak@google.com> Link: https://lore.kernel.org/r/20200724234415.1651639-2-saravanak@google.com Signed-off-by: Rob Herring <robh@kernel.org>
2020-07-27of: property: Add device link support for multiple DT bindingsSaravana Kannan
Add support for creating device links out of the following DT bindings: - interrupts-extended - nvmem-cells - phys - wakeup-parent Signed-off-by: Saravana Kannan <saravanak@google.com> Link: https://lore.kernel.org/r/20200724234415.1651639-1-saravanak@google.com Signed-off-by: Rob Herring <robh@kernel.org>
2020-07-27net/mlx4: Use fallthrough pseudo-keywordGustavo A. R. Silva
Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27Merge branch '1GbE' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue Tony Nguyen says: ==================== 1GbE Intel Wired LAN Driver Updates 2020-07-27 This series contains updates to igc driver only. Sasha cleans up double definitions, unneeded and non applicable registers, and removes unused fields in structs. Ensures the Receive Descriptor Minimum Threshold Count is cleared and fixes a static checker error. v2: Remove fields from hw_stats in patches that removed their uses. Reworded patch descriptions for patches 1, 2, and 4. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27drm: hold gem reference until object is no longer accessedSteve Cohen
A use-after-free in drm_gem_open_ioctl can happen if the GEM object handle is closed between the idr lookup and retrieving the size from said object since a local reference is not being held at that point. Hold the local reference while the object can still be accessed to fix this and plug the potential security hole. Signed-off-by: Steve Cohen <cohens@codeaurora.org> Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/1595284250-31580-1-git-send-email-cohens@codeaurora.org
2020-07-27qed: fix assignment of n_rq_elems to incorrect params fieldColin Ian King
Currently n_rq_elems is being assigned to params.elem_size instead of the field params.num_elems. Coverity is detecting this as a double assingment to params.elem_size and reporting this as an usused value on the first assignment. Fix this. Addresses-Coverity: ("Unused value") Fixes: b6db3f71c976 ("qed: simplify chain allocation with init params struct") Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Alexander Lobakin <alobakin@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: implement ndo_get_phys_port_{id,name}Edward Cree
Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: read device MAC address at probe timeEdward Cree
Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: probe the PHY and configure the MACEdward Cree
Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: actually perform resetsEdward Cree
In ef100_reset(), make the MCDI call to do the reset. Also, do a reset at start-of-day during probe, to put the function in a clean state. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: extend ef100_check_caps to cover datapath_caps3Edward Cree
MC_CMD_GET_CAPABILITIES now has a third word of flags; extend the efx_has_cap() machinery to cover it. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: read datapath caps, implement check_capsEdward Cree
Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: process events for MCDI completionsEdward Cree
Currently RX and TX-completion events are unhandled, as neither the RX nor the TX path has been implemented yet. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: implement ndo_open/close and EVQ probingEdward Cree
Channels are probed, but actual event handling is still stubbed out. Stub implementation of check_caps is needed because ptp.c will call into it from efx_ptp_use_mac_tx_timestamps() to decide if it wants TXQs. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: implement MCDI transportEdward Cree
Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: don't call efx_reset_down()/up() on EF100Edward Cree
We handle everything ourselves in ef100_reset(), rather than relying on the generic down/up routines. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: PHY probe stubEdward Cree
We can't actually do the MCDI to probe it fully until we have working MCDI, which comes later, but we need efx->phy_data to be allocated so that when we get MCDI events the link-state change handler doesn't NULL-dereference. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: reset-handling stubEdward Cree
We don't actually do the efx_mcdi_reset() because we don't have MCDI yet. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc: skeleton EF100 PF driverEdward Cree
No TX or RX path, no MCDI, not even an ifup/down handler. Besides stubs, the bulk of the patch deals with reading the Xilinx extended PCIe capability, which tells us where to find our BAR. Though in the same module, EF100 has its own struct pci_driver, which is named sfc_ef100. A small number of additional nic_type methods are added; those in the TX (tx_enqueue) and RX (rx_packet) paths are called through indirect call wrappers to minimise the performance impact. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: register accesses on EF100Edward Cree
EF100 adds a few new valid addresses for efx_writed_page(), as well as a Function Control Window in the BAR whose location is variable. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc_ef100: add EF100 register definitionsEdward Cree
Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27sfc: remove efx_ethtool_nway_reset()Edward Cree
An MDIO-based n-way restart does not make sense for any of the NICs supported by this driver, nor for the coming EF100. Unlike on Falcon (which was already split off into a separate driver), the PHY on all of Siena, EF10 and EF100 is managed by MC firmware. While Siena can talk to the PHY over MDIO, doing so for anything other than debugging purposes (mdio_mii_ioctl) is likely to confuse the firmware. (According to the SFC firmware team, this support was originally added to the Siena driver early in the development of that product, before it was decided to have firmware manage the PHY.) Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27qed: fix the allocation of the chains with an external PBLAlexander Lobakin
Dan reports static checker warning: "The patch 9b6ee3cf95d3: "qed: sanitize PBL chains allocation" from Jul 23, 2020, leads to the following static checker warning: drivers/net/ethernet/qlogic/qed/qed_chain.c:299 qed_chain_alloc_pbl() error: uninitialized symbol 'pbl_virt'. drivers/net/ethernet/qlogic/qed/qed_chain.c 249 static int qed_chain_alloc_pbl(struct qed_dev *cdev, struct qed_chain *chain) 250 { 251 struct device *dev = &cdev->pdev->dev; 252 struct addr_tbl_entry *addr_tbl; 253 dma_addr_t phys, pbl_phys; 254 __le64 *pbl_virt; ^^^^^^^^^^^^^^^^ [...] 271 if (chain->b_external_pbl) 272 goto alloc_pages; ^^^^^^^^^^^^^^^^ uninitialized [...] 298 /* Fill the PBL table with the physical address of the page */ 299 pbl_virt[i] = cpu_to_le64(phys); ^^^^^^^^^^^ [...] " This issue was introduced with commit c3a321b06a80 ("qed: simplify initialization of the chains with an external PBL"), when chain->pbl_sp.table_virt initialization was moved up to qed_chain_init_params(). Fix it by initializing pbl_virt with an already filled chain struct field. Fixes: c3a321b06a80 ("qed: simplify initialization of the chains with an external PBL") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alexander Lobakin <alobakin@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27net: mscc: ocelot: fix hardware timestamp dequeue logiclaurent brando
The next hw timestamp should be snapshoot to the read registers only once the current timestamp has been read. If none of the pending skbs matches the current HW timestamp just gracefully flush the available timestamp by reading it. Signed-off-by: laurent brando <laurent.brando@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27bnxt_en: Add support for 'ethtool -d'Vasundhara Volam
Add support to dump PXP registers and PCIe statistics. Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27bnxt_en: Switch over to use the 64-bit software accumulated counters.Michael Chan
Now we can report all the full 64-bit CPU endian software accumulated counters instead of the hw counters, some of which may be less than 64-bit wide. Define the necessary macros to access the software counters. Reviewed-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27bnxt_en: Accumulate all counters.Michael Chan
Now that we have the infrastructure in place, add the new function bnxt_accumulate_all_stats() to periodically accumulate and check for counter rollover of all ring stats and port stats. A chip bug was also discovered that could cause some ring counters to become 0 during DMA. Workaround by ignoring zeros on the affected chips. Some older frimware will reset port counters during ifdown. We need to check for that and free the accumulated port counters during ifdown to prevent bogus counter overflow detection during ifup. Reviewed-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27bnxt_en: Retrieve hardware masks for port counters.Michael Chan
If supported by newer firmware, make the firmware call to query all the port counter masks. If not supported, assume 40-bit port counter masks. Reviewed-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27bnxt_en: Retrieve hardware counter masks from firmware if available.Michael Chan
Newer firmware has a new call HWRM_FUNC_QSTATS_EXT to retrieve the masks of all ring counters. Make this call when supported to initialize the hardware masks of all ring counters. If the call is not available, assume 48-bit ring counter masks on P5 chips. Reviewed-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27bnxt_en: Allocate additional memory for all statistics blocks.Michael Chan
Some of these DMAed hardware counters are not full 64-bit counters and so we need to accumulate them as they overflow. Allocate copies of these DMA statistics memory blocks with the same size for accumulation. The hardware counter widths are also counter specific so we allocate memory for masks that correspond to each counter. Reviewed-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27bnxt_en: Refactor statistics code and structures.Michael Chan
The driver manages multiple statistics structures of different sizes. They are all allocated, freed, and handled practically the same. Define a new bnxt_stats_mem structure and common allocation and free functions for all staistics memory blocks. Reviewed-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27bnxt_en: Use macros to define port statistics size and offset.Michael Chan
The port statistics structures have hard coded padding and offset. Define macros to make this look cleaner. Reviewed-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Reviewed-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27bnxt_en: Update firmware interface to 1.10.1.54.Michael Chan
Main changes are 200G support and fixing the definitions of discard and error counters to match the hardware definitions. Because the HWRM_PORT_PHY_QCFG message size has now exceeded the max. encapsulated response message size of 96 bytes from the PF to the VF, we now need to cap this message to 96 bytes for forwarding. The forwarded response only needs to contain the basic link status and speed information and can be capped without adding the new information. v2: Fix bnxt_re compile error. Cc: Selvin Xavier <selvin.xavier@broadcom.com> Reviewed-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Reviewed-by: Edwin Peer <edwin.peer@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27bnxt_en: Remove PCIe non-counters from ethtool statisticsVasundhara Volam
Remove PCIe non-counters display from ethtool statistics, as they are not simple counters but register dump. The next few patches will add logic to detect counter roll-over and it won't work with these PCIe non-counters. There will be a follow up patch to get PCIe information via ethtool register dump. Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>