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2014-08-04Merge tag 'clk-for-linus-3.17' of ↵Linus Torvalds
git://git.linaro.org/people/mike.turquette/linux Pull clock framework updates from Mike Turquette: "The clock framework changes for 3.17 are mostly additions of new clock drivers and fixes/enhancements to existing clock drivers. There are also some non-critical fixes and improvements to the framework core. Changes to the clock framework core include: - improvements to printks on errors - flattening the previously hierarchal structure of per-clock entries in debugfs - allow per-clock debugfs entries that are specific to a particular clock driver - configure initial clock parent and/or initial clock rate from Device Tree - several feature enhancements to the composite clock type - misc fixes New clock drivers added include: - TI Palmas PMIC - Allwinner A23 SoC - Qualcomm APQ8084 and IPQ8064 SoCs - Rockchip rk3188, rk3066 and rk3288 SoCs - STMicroelectronics STiH407 SoC - Cirrus Logic CLPS711X SoC Many fixes, feature enhancements and further clock tree support for existing clock drivers also were merged, such as Samsung's "ARMCLK down" power saving feature for their Exynos4 & Exynos5 SoCs" * tag 'clk-for-linus-3.17' of git://git.linaro.org/people/mike.turquette/linux: (86 commits) clk: Add missing of_clk_set_defaults export clk: checking wrong variable in __set_clk_parents() clk: Propagate any error return from debug_init() clk: clps711x: Add DT bindings documentation clk: Add CLPS711X clk driver clk: st: Use round to closest divider flag clk: st: Update frequency tables for fs660c32 and fs432c65 clk: st: STiH407: Support for clockgenA9 clk: st: STiH407: Support for clockgenD0/D2/D3 clk: st: STiH407: Support for clockgenC0 clk: st: Add quadfs reset handling clk: st: Add polarity bit indication clk: st: STiH407: Support for clockgenA0 clk: st: STiH407: Support for A9 MUX Clocks clk: st: STiH407: Support for Flexgen Clocks clk: st: Adds Flexgen clock binding clk: st: Remove uncessary (void *) cast clk: st: use static const for clkgen_pll_data tables clk: st: use static const for stm_fs tables clk: st: Update ST clock binding documentation ...
2014-08-04dmaengine: add device tree binding documentation for the nbpfaxi driverGuennadi Liakhovetski
The nbpfaxi dmaengine driver doesn't define any new bindings, it only uses standard dmaengine bindings and defines 3 flags for the 3rd parameter of the "dmas" property. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-07-31Merge tag 'for_3.17/samsung-clk' of ↵Mike Turquette
git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-clk into clk-next-samsung Samsung clock patches for 3.17 1) non-critical fixes (without need to push to stable): d5e136a clk: samsung: Register clk provider only after registering its all clocks 305cfab clk: samsung: Make of_device_id array const e9d5295 clk: samsung: exynos5420: Setup clocks before system suspend f65d518 clk: samsung: trivial: Correct typo in author's name 2) Exynos CLKOUT driver: 800c979 clk: samsung: exynos4: Add missing CPU/DMC clock hierarchy 01f7ec2 clk: samsung: exynos4: Add CLKOUT clock hierarchy 1e832e5 clk: samsung: Add driver to control CLKOUT line on Exynos SoCs d19bb39 ARM: dts: exynos: Update PMU node with CLKOUT related data 3) Clock hierarchy extensions: 17d3f1d clk: exynos4: Add PPMU IP block source clocks. ca5b402 clk: samsung: register exynos5420 apll/kpll configuration data 4) ARM CLKDOWN functionality enablement for Exynos4 and 3250: 42773b2 clk: samsung: exynos4: Enable ARMCLK down feature 45c5b0a clk: samsung: exynos3250: Enable ARMCLK down feature
2014-07-28clk: Add CLPS711X clk driverAlexander Shiyan
This adds the clock driver for Cirrus Logic CLPS711X series SoCs using common clock infrastructure. Designed primarily for migration CLPS711X subarch for multiplatform & DT, for this as the "OF" and "non-OF" calls implemented. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-07-28Merge branch 'clk-rockchip' of ↵Arnd Bergmann
git://git.linaro.org/people/mike.turquette/linux into next/soc This is a dependency for the rk3288 DT updates, the branch should first get merged through Mike's clk git. * 'clk-rockchip' of git://git.linaro.org/people/mike.turquette/linux: ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER clk: rockchip: add clock controller for rk3288 dt-bindings: add documentation for rk3288 cru clk: rockchip: add clock driver for rk3188 and rk3066 clocks dt-bindings: add documentation for rk3188 clock and reset unit clk: rockchip: add reset controller clk: rockchip: add clock type for pll clocks and pll used on rk3066 clk: rockchip: add basic infrastructure for clock branches clk: composite: improve rate_hw sanity check logic clk: composite: allow read-only clocks clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-07-28Merge branch 'clk-rockchip' of ↵Arnd Bergmann
git://git.linaro.org/people/mike.turquette/linux into next/soc This is a dependency for the rk3288 DT updates, the branch should first get merged through Mike's clk git. * 'clk-rockchip' of git://git.linaro.org/people/mike.turquette/linux: ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER clk: rockchip: add clock controller for rk3288 dt-bindings: add documentation for rk3288 cru clk: rockchip: add clock driver for rk3188 and rk3066 clocks dt-bindings: add documentation for rk3188 clock and reset unit clk: rockchip: add reset controller clk: rockchip: add clock type for pll clocks and pll used on rk3066 clk: rockchip: add basic infrastructure for clock branches clk: composite: improve rate_hw sanity check logic clk: composite: allow read-only clocks clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-07-26Merge tag 's5pv210-dt' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Merge "Samsung S5PV210 DT support for v3.17" from Kukjin Kim: - support common clock framework for s5pv210 clock - add generic PHY driver on s5pv210 to support it via DT - add dt support for s5pv210-goni, smdkc110, smdkv210 and torbreck boards - remove board files from mach-s5pv210 and unused codes - enable multiplatform for s5pv210 * tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: clk: samsung: s5pv210: Remove legacy board support ARM: SAMSUNG: Remove remaining legacy code gpio: samsung: Remove legacy support of S5PV210 ARM: S5PV210: Enable multi-platform build support cpufreq: s5pv210: Make the driver multiplatform aware ARM: S5PV210: Register cpufreq platform device ARM: S5PV210: move debug-macro.S into the common space ARM: S5PV210: Untie PM support from legacy code ARM: S5PV210: Remove support for board files ARM: dts: Add Device tree for s5pc110/s5pv210 boards ARM: dts: Add Device tree for s5pv210 SoC ARM: S5PV210: Add board file for boot using Device Tree phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver clk: samsung: Add S5PV210 Audio Subsystem clock driver ARM: SAMSUNG: Remove legacy clock code serial: samsung: Remove support for legacy clock code cpufreq: s3c24xx: Remove some dead code ARM: S5PV210: Migrate clock handling to Common Clock Framework clk: samsung: Add clock driver for S5PV210 and compatible SoCs Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-07-26clk: samsung: trivial: Correct typo in author's nameTomasz Figa
This patch corrects mistyped author's name in four header files. While at it, a copy/paste error in author's e-mail in one of the headers is also fixed. Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-07-26clk: samsung: exynos4: Add CLKOUT clock hierarchyTomasz Figa
This patch adds definitions of clocks that are used to drive clock output signals of particular CMU sub-blocks that are then fed to PMU and handled by Exynos CLKOUT driver added in further patch. Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-07-25Merge tag 'qcom-clocks-for-3.17' of ↵Mike Turquette
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into clk-next-msm qcom clock changes for 3.17 These patches add support for a handful of Qualcomm's SoC clock controllers: APQ8084 gcc and mmcc, IPQ8064 gcc, and APQ8064. There's also a small collection of bug fixes that aren't critical -rc worthy regressions because the consumer drivers aren't present or using the buggy clocks and one optimization for HDMI.
2014-07-24Merge tag 'omap-for-v3.16/fixes-rc6' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Merge "Two regression fixes for omaps and one fix for device signaling" from Tony Lindgren: - L2 cache regression fix for a warning about trying to access a read-only register - GPMC ECC software fallback regression fix for omap3 - Fix for dra7 pinctrl pull-up direction that causes signal issues for anybody trying to use the internal pull up or down * tag 'omap-for-v3.16/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: gpmc: fix gpmc_hwecc_bch_capable() pinctrl: dra: dt-bindings: Fix pull enable/disable ARM: OMAP2+: l2c: squelch warning dump on power control setting Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-07-23Merge branch 'clk-rockchip' into clk-nextMike Turquette
2014-07-23pinctrl: dra: dt-bindings: Fix pull enable/disableNishanth Menon
The DRA74/72 control module pins have a weak pull up and pull down. This is configured by bit offset 17. if BIT(17) is 1, a pull up is selected, else a pull down is selected. However, this pull resisstor is applied based on BIT(16) - PULLUDENABLE - if BIT(18) is *0*, then pull as defined in BIT(17) is applied, else no weak pulls are applied. We defined this in reverse. Reference: Table 18-5 (Description of the pad configuration register bits) in Technical Reference Manual Revision (DRA74x revision Q: SPRUHI2Q Revised June 2014 and DRA72x revision F: SPRUHP2F - Revised June 2014) Fixes: 6e58b8f1daaf1a ("ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board") Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Felipe Balbi <balbi@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-07-22phy: miphy365x: Add MiPHY365x header file for DT x Driver definesLee Jones
This provides the shared header file which will be reference from both the MiPHY365x driver and its associated Device Tree node(s). Cc: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-07-19Merge tag 'exynos-cpuidle' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Merge "Samsung exynos cpuidle update for v3.17" from Kukjin Kim: - add callbacks exynos_suspend() and exynos_powered_up() for support cpuidle through mcpm - skip exynos_cpuidle for exynos5420 because is uses cpuidle-big-liggle generic cpuidle driver - add generic functions to calculate cpu number is used for pmu and this is required for exynos5420 multi-cluster - add of_device_id structure for big.LITTLE cpuidle and add "samsung,exynos5420" compatible string for exynos5420 * tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: populate suspend and powered_up callbacks for mcpm ARM: EXYNOS: do not allow cpuidle registration for exynos5420 cpuidle: big.LITTLE: init driver for exynos5420 cpuidle: big.LITTLE: Add ARCH_EXYNOS entry in config ARM: EXYNOS: add generic function to calculate cpu number cpuidle: big.LITTLE: add of_device_id structure + Linux 3.16-rc5 Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-19Merge tag 'tegra-for-3.17-xusb-padctl' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt Merge "ARM: tegra: Add XUSB pad controller support" from Thierry Reding: Adds device tree bindings and a driver for the XUSB pad controller found on Tegra114 and later. This is a prerequisites for PCIe, SATA and XUSB drivers which are all currently being reviewed or pending for merge. This is a separate branch in case it needs to be pulled into the pinctrl tree to resolve conflicts. * tag 'tegra-for-3.17-xusb-padctl' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: pinctrl: Add NVIDIA Tegra XUSB pad controller support of: Add NVIDIA Tegra XUSB pad controller binding Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-19Merge tag 'zynq-dt-for-3.17' of git://git.xilinx.com/linux-xlnx into next/dtOlof Johansson
Merge "Xilinx Zynq changes for v3.17" from Michal Simek: arm: Xilinx Zynq dt patches for v3.17 - Document and use new cadence serial binding * tag 'zynq-dt-for-3.17' of git://git.xilinx.com/linux-xlnx: ARM: zynq: DT: Migrate UART to Cadence binding tty: cadence: Document DT binding + Linux 3.16-rc5 Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-19Merge tag 'imx-dt-3.17' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt Merge "ARM: imx: device tree updates for 3.17" from Shawn Guo: The i.MX device tree updates for 3.17: - Add device tree sources and pin function header for i.MX6SX SoC - Initial imx6sx-sdb board support with FEC, MMC, USB, PMIC, Audio and GPIO key enabled - New board support: mbimxsd25 and mbimxsd27 from Eukrea, aristainetos imx6dl boards, Rex Pro and Basic, Ka-Ro TX6 - Restructure imx6qdl-wandboard.dtsi for new rev C1 board - Split M28EVK and M53EVK into SoM and EVK parts - A few correction around SDMA, SSI and SATA device nodes - Add eSATA support for Cubox-i board - Updates on edmqmx6 to enable PCIe, I2C and CAN - Use DT macro for clock ID for imx27 and imx6qdl - Add FlexCAN support for VF610 SoC * tag 'imx-dt-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (125 commits) ARM: dts: vf610: add FlexCAN node ARM: dts: add initial Rex Basic board support ARM: dts: add initial Rex Pro board support ARM: dts: mx5: Split M53EVK into SoM and EVK parts ARM: dts: imx6: RIoTboard explicitly define pad settings ARM: dts: vf610: fix length of eshdc1 register property ARM: dts: Restructure imx6qdl-wandboard.dtsi for new rev C1 board. ARM: dts: imx53: correct clock-names of SATA node ARM: imx6: Align ssi nodes between mx6 variants ARM: i.MX27 clk: dts: Use clock defines in DTS files ARM: dts: imx: correct sdma compatbile for imx6sl and imx6sx ARM: dts: imx6sx-sdb: Add audio support ARM: dts: imx6sx: Pass the fsl,fifo-depth property ARM: dts: imx6sx: Fix sdma node ARM: dts: imx6: edmqmx6: Add can bus ARM: dts: imx6: edmqmx6: Add two other i2c buses ARM: dts: imx6: edmqmx6: Add PCIe support ARM: dts: imx25-pdk: Add USB OTG support ARM: dts: i.MX53: add aipstz nodes ARM: dts: mxs: Split M28EVK into SoM and EVK parts ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-19clk: samsung: Add S5PV210 Audio Subsystem clock driverTomasz Figa
This patch adds a driver for clock controller being a part of Audio Subsystem present on S5PV210 and compatible SoCs. It is used to provide clocks for other IP blocks of this subsystem. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-07-19clk: samsung: Add clock driver for S5PV210 and compatible SoCsMateusz Krawczuk
This patch adds new, Common Clock Framework-based clock driver for Samsung S5PV210 and compatible SoCs. The driver is just added, without enabling it yet. Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [t.figa: Added support for other SoC variants and clock output. Fixed remaining minor issues.] Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-07-18ARM: imx: clk-vf610: fix FlexCAN clock gatingStefan Agner
Extend the clock control for FlexCAN with the second gate which enable the clocks in the Clock Divider (CCM_CSCDR2) register too. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX27 clk: Add 26 MHz oscillator circuit clock gateAlexander Shiyan
This patch adds missing 26 MHz oscillator circuit clock gate support. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX27 clk: Introduce DT include for clock providerAlexander Shiyan
Use clock defines in order to make devicetrees more human readable. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX21 clk: Add devicetree supportAlexander Shiyan
This patch adds devicetree support CCM module for i.MX21 CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx6qdl: switch to use macro for clock IDShawn Guo
Instead of using enum for clock ID, let's switch imx6qdl clock driver to use macro. In this case, device tree can reuse these macros to improve readability. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX1 clk: Add devicetree supportAlexander Shiyan
This patch adds devicetree support CCM module for i.MX1 (MC9328MX1) CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-15clk: qcom: Add support for APQ8064 multimedia clocksStephen Boyd
The APQ8064 multimedia clock controller is fairly similar to the 8960 multimedia clock controller, except that gfx2d0/1 has been removed and the gfx3d frequency is slightly faster when using the newly introduced PLL15. We also add vcap clocks and a couple new TV clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2014-07-15clk: qcom: Add support for IPQ8064's global clock controller (GCC)Kumar Gala
Add a driver for the global clock controller found on IPQ8064 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks. This is currently missing clocks for USB HSIC and networking devices. Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2014-07-15clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) supportGeorgi Djakov
Add support for the multimedia clock controller found on the APQ8084 based platforms. This will allow the multimedia device drivers to control their clocks. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> [sboyd: Rework parent mapping to avoid conflicts] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2014-07-13Merge tag 'clk-fixes-for-linus' of ↵Linus Torvalds
git://git.linaro.org/people/mike.turquette/linux Pull clock driver fixes from Mike Turquette: "This batch of fixes is for a handful of clock drivers from Allwinner, Samsung, ST & TI. Most of them are of the "this hardware won't work without this fix" variety, including patches that fix platforms that did not boot under certain configurations. Other fixes are the result of changes to the clock core introduced in 3.15 that had subtle impacts on the clock drivers. There are no fixes to the clock framework core in this pull request" * tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux: clk: spear3xx: Set proper clock parent of uart1/2 clk: spear3xx: Use proper control register offset clk: qcom: HDMI source sel is 3 not 2 clk: sunxi: fix devm_ioremap_resource error detection code clk: s2mps11: Fix double free corruption during driver unbind clk: ti: am43x: Fix boot with CONFIG_SOC_AM33XX disabled clk: exynos5420: Remove aclk66_peric from the clock tree description clk/exynos5250: fix bit number for tv sysmmu clock clk: s3c64xx: Hookup SPI clocks correctly clk: samsung: exynos4: Remove SRC_MASK_ISP gates clk: samsung: add more aliases for s3c24xx clk: samsung: fix several typos to fix boot on s3c2410 clk: ti: set CLK_SET_RATE_NO_REPARENT for ti,mux-clock clk: ti: am43x: Fix boot with CONFIG_SOC_AM33XX disabled clk: ti: dra7: return error code in failure case clk: ti: apll: not allocating enough data
2014-07-13clk: rockchip: add clock controller for rk3288Heiko Stübner
Add the clock tree definition for the new rk3288 SoC. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-07-13clk: rockchip: add clock driver for rk3188 and rk3066 clocksHeiko Stübner
This adds a clock driver that handles the specific muxes, dividers and gates of rk3188 and rk3066 SoCs. The structure of the clock list resembles the arrangement of their counterparts in the clock architecture diagrams found in the SoC documentation. Clocks exported to the clock provider are currently limited to well known or measured ones. So additional clock exports may be necessary in the future. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-07-11clk: qcom: Add APQ8084 clocks for SATA, PCIe and UFSGeorgi Djakov
Add the necessary clocks for SATA, PCIe and UFS to the APQ8084 global clock controller (GCC). This will allow the above device drivers to control their clocks. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2014-07-11clk: qcom: Add APQ8084 Global Clock Controller supportGeorgi Djakov
This patch adds support for the global clock controller found on the APQ8084 based devices. This includes UART, I2C, SPI etc. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2014-07-11clk: qcom: Fully support apq8064 global clock controlStephen Boyd
Add in the handful of new clocks and introduce a new reset table with the few new resets. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2014-07-11of: Add NVIDIA Tegra XUSB pad controller bindingThierry Reding
This patch adds the device tree binding documentation for the XUSB pad controller found on NVIDIA Tegra SoCs. It exposes both pinmuxing and PHY capabilities. Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-11clk: exynos5420: Add IDs for clocks used in PD mfcArun Kumar K
Adds IDs for MUX clocks to be used by power domain for MFC for doing re-parenting while pd on/off. Signed-off-by: Arun Kumar K <arun.kk@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-07-09dt-binding: mfd: as3722: Correct macro nameLaxman Dewangan
The macro name for enable3 pin is named as AS3722_EXT_CONTROL_PIN_ENABLE2 which is conflict with the enable2 pin. Correct this macro name to correctly reflect the enable pin i.e. AS3722_EXT_CONTROL_PIN_ENABLE3. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reported-by: Dan Willemsen <dwillemsen@nvidia.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-07-06Merge tag 'renesas-dt-for-v3.17' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Renesas ARM Based SoC DT Updates for v3.17" from Simon Horman: Increased hardware coverage: - Add R-Car sounds support to r8a7790 SoC - Add PCIe support to r8a7790 and r8a7791 SoCs - Increase I2C support of Henninger and lager boards - DVFS support to Koelsch board - Add SYS-DMAC clocks to r8a7791 SoCs - Add USB 3.0 clocks to r8a7791 and r8a7790 SoCs - Add LED labels to armadillo800eva board Cleanup: - Remove early_printk from marzen command line * tag 'renesas-dt-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits) ARM: shmobile: r8a7791: add R-Car sound support on DTSI ARM: shmobile: henninger: Enable PCIe Controller & PCIe bus clock ARM: shmobile: koelsch: Enable PCIe Controller & PCIe bus clock ARM: shmobile: r8a7791: Add PCIe Controller device node ARM: shmobile: r8a7791: Add default PCIe bus clock ARM: shmobile: r8a7791: Add PCIEC clock device tree node ARM: shmobile: r8a7790: Add PCIe Controller device node ARM: shmobile: r8a7790: Add default PCIe bus clock ARM: shmobile: r8a7790: Add PCIEC clock device tree node ARM: shmobile: r8a7791: add MSTP10 support on DTSI ARM: shmobile: r8a7791: add audio clock on DTSI ARM: shmobile: r8a7790: add R-Car sound support on DTSI ARM: shmobile: r8a7790: add MSTP10 support on DTSI ARM: shmobile: henninger: add I2C2 DT support ARM: shmobile: koelsch: Remove duplicate i2c6 nodes ARM: shmobile: lager: Remove duplicate i2c3 nodes ARM: shmobile: Lager memory map update ARM: shmobile: lager: Move i2c[12]_pins nodes to pfc node ARM: shmobile: lager: add i2c1, i2c2 pins ARM: shmobile: lager: enable i2c devices ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-03Merge branch 'clk-fixes' into clk-nextMike Turquette
2014-07-02Merge tag 'for_3.16/samsung-clk-fixes' of ↵Mike Turquette
git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-clk into clk-fixes-samsung Samsung clock fixes for v3.16. This pull request contains fixes for various issues found while testing -rc versions of Linux 3.16. Mostly two kinds of patches: * Fixes of incorrectly defined clocks 1) a37c82a clk: samsung: exynos4: Remove SRC_MASK_ISP gates Issue present since v3.10. 2) 0b1643b clk/exynos5250: fix bit number for tv sysmmu clock Issue present since v3.16. 3) 44ff025 clk: exynos5420: Remove aclk66_peric from the clock tree description Issue present since v3.11. * Adding things missed by original patches 1) cec1cde clk: samsung: fix several typos to fix boot on s3c2410 2) 34ece9e clk: samsung: add more aliases for s3c24xx Both issues present since the driver was added in v3.16. 3) a92dda4 clk: s3c64xx: Hookup SPI clocks correctly Issue present since v3.12.
2014-07-01dt/bindings: Binding documentation for Palmas clk32kg and clk32kgaudio clocksPeter Ujfalusi
Palmas class of devices can provide 32K clock(s) to be used by other devices on the board. Depending on the actual device the provided clocks can be: CLK32K_KG and CLK32K_KGAUDIO or only one: CLK32K_KG (TPS659039 for example) Use separate compatible flags for the two 32K clock. A system which needs or have only one of the 32k clock from Palmas will need to add node(s) for each clock as separate section in the dts file. The two compatible property is: "ti,palmas-clk32kg" for clk32kg clock "ti,palmas-clk32kgaudio" for clk32kgaudio clock Apart from the register control of the clocks - which is done via the clock API there is a posibility to enable the external sleep control. In this way the clock can be enabled/disabled on demand by the user of the clock. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-06-30clk: exynos4: Add PPMU IP block source clocks.Jonghwa Lee
Exynos4 has saveral PPMUs and each of them has operation clock which can be gated through CMU's SFR control. New clocks are listed below. All clocks are added as a gate-typed clock. CLK_PPMULEFT, CLK_PPMURIGHT, CLK_PPMUCAMIF, CLK_PPMUTV, CLK_PPMUMFC_L, CLK_PPMUMFC_R, CLK_G3D, CLK_PPMUIMAGE, CLK_PPMULCD0, CLK_PPMULCD1, CLK_PPMUFILE, CLK_PPMUGPS, CLK_PPMUDMC0, CLK_PPMUDMC1, CLK_PPMUCPU, CLK_PPMUACP, Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Myungjoo Ham <myungjoo.ham@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-06-30clk: exynos5420: Remove aclk66_peric from the clock tree descriptionDoug Anderson
The "aclk66_peric" clock is a gate clock with a whole bunch of gates underneath it. This big gate isn't very useful to include in our clock tree. If any of the children need to be turned on then the big gate will need to be on anyway. ...and there are plenty of other "big gates" that aren't described in our clock tree, some of which shut off collections of clocks that have no relationship in the hierarchy so are hard to model. "aclk66_peric" is causing earlyprintk problems since it gets disabled as part of the boot process, so let's just remove it. Strangely (and for no good reason) this clock is exported as part of the common clock bindings. Remove it since there are no in-kernel device trees using it and no reason anyone out of tree should refer to it either. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-06-23Merge tag 'imx-fixes-3.16' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes Pull "i.MX fixes for 3.16" from Shawn Guo: - Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51, because controller base CD/WP is not working in esdhc driver due to runtime PM support - A couple of random ventana gw5xxx board fixes - Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving IPUv3 driver out of staging tree - Fix enet/fec clock selection on imx6sl - Fix display node on imx53-m53evk board - A couple of Cubox-i updates from Russell, which were omitted from the merge window due to dependency * tag 'imx-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc. ARM: dts: imx51-babbage: Fix esdhc setup ARM: dts: mx5: Move the display out of soc {} node ARM: dts: mx5: Fix IPU port node placement ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_CORE ARM: dts: hummingboard/cubox-i: move usb otg configuration to platform level ARM: dts: cubox-i: add support for PWM-driven front panel LED ARM: dts: imx6: ventana: correct gw52xx sgtl5000 clock source ARM: dts: imx6qdl-gw5xxx: Fix Linear Technology vendor prefix ARM: dts: imx6: ventana: fix include typo ARM: dts: imx6sl: correct the fec ipg clock source ARM: imx6sl: add missing enet clock for imx6sl
2014-06-17ARM: STi: DT: Properly define sti-ethclk & stmmaceth for stih415/6Peter Griffin
This patch fixes two problems: - 1) The device tree isn't currently providing sti-ethclk which is required by the dwmac glue code to correctly configure the ethernet PHY clock speed. This means depending on what the bootloader/jtag has configured this clock to, and what switch/hub the board is plugged into you most likely will NOT successfully negotiate a ethernet link. 2) The stmmaceth clock was associated with the wrong clock. It was referencing the PHY clock rather than the interconnect clock which clocks the IP. This patch also brings us closer to not having to boot the upstream kernel with the clk_ignore_unused parameter. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-06-17ARM: imx6sl: add missing enet clock for imx6slFugang Duan
There's a enet clock gate missing in clock tree, thus add it. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17ARM: shmobile: r8a7791: Add PCIEC clock device tree nodePhil Edworthy
This patch adds the device tree clock node for the PCIe Controller Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17ARM: shmobile: r8a7790: Add PCIEC clock device tree nodePhil Edworthy
This patch adds the device tree clock node for the PCIe Controller Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17ARM: shmobile: r8a7791: add MSTP10 support on DTSIKuninori Morimoto
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
generated by cgit (git 2.34.1) at 2025-09-23 22:16:12 +0000