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2020-12-09ASoC: soc-pcm: care trigger rollbackKuninori Morimoto
soc_pcm_trigger() calls DAI/Component/Link trigger, but some of them might be failed. static int soc_pcm_trigger(...) { ... switch (cmd) { case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ret = snd_soc_link_trigger(substream, cmd); if (ret < 0) break; (*) ret = snd_soc_pcm_component_trigger(substream, cmd); if (ret < 0) break; ret = snd_soc_pcm_dai_trigger(substream, cmd); break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ret = snd_soc_pcm_dai_trigger(substream, cmd); if (ret < 0) break; ret = snd_soc_pcm_component_trigger(substream, cmd); if (ret < 0) break; ret = snd_soc_link_trigger(substream, cmd); break; } ... } For example, if soc_pcm_trigger() failed at (*) point, we need to rollback previous succeeded trigger. This patch adds trigger mark for DAI/Component/Link, and do STOP if START/RESUME/PAUSE_RELEASE were failed. Because it need to use new rollback parameter, we need to modify DAI/Component/Link trigger functions in the same time. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87a6uycssd.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-12-09Merge remote-tracking branch 'origin/kvm-arm64/psci-relay' into ↵Marc Zyngier
kvmarm-master/next Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-12-09xen: don't use page->lru for ZONE_DEVICE memoryJuergen Gross
Commit 9e2369c06c8a18 ("xen: add helpers to allocate unpopulated memory") introduced usage of ZONE_DEVICE memory for foreign memory mappings. Unfortunately this collides with using page->lru for Xen backend private page caches. Fix that by using page->zone_device_data instead. Cc: <stable@vger.kernel.org> # 5.9 Fixes: 9e2369c06c8a18 ("xen: add helpers to allocate unpopulated memory") Signed-off-by: Juergen Gross <jgross@suse.com> Reviewed-by: Boris Ostrovsky <boris.ostrovksy@oracle.com> Reviewed-by: Jason Andryuk <jandryuk@gmail.com> Signed-off-by: Juergen Gross <jgross@suse.com>
2020-12-09xen: add helpers for caching grant mapping pagesJuergen Gross
Instead of having similar helpers in multiple backend drivers use common helpers for caching pages allocated via gnttab_alloc_pages(). Make use of those helpers in blkback and scsiback. Cc: <stable@vger.kernel.org> # 5.9 Signed-off-by: Juergen Gross <jgross@suse.com> Reviewed-by: Boris Ostrovsky <boris.ostrovksy@oracle.com> Signed-off-by: Juergen Gross <jgross@suse.com>
2020-12-09opp: Don't create an OPP table from dev_pm_opp_get_opp_table()Viresh Kumar
It has been found that some users (like cpufreq-dt and others on LKML) have abused the helper dev_pm_opp_get_opp_table() to create the OPP table instead of just finding it, which is the wrong thing to do. This routine was meant for OPP core's internal working and exposed the whole functionality by mistake. Change the scope of dev_pm_opp_get_opp_table() to only finding the table. The internal helpers _opp_get_opp_table*() are thus renamed to _add_opp_table*(), dev_pm_opp_get_opp_table_indexed() is removed (as we don't need the index field for finding the OPP table) and so the only user, genpd, is updated. Note that the prototype of _add_opp_table() was already left in opp.h by mistake when it was removed earlier and so we weren't required to add it now. Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-12-08bpf: Only provide bpf_sock_from_file with CONFIG_NETFlorent Revest
This moves the bpf_sock_from_file definition into net/core/filter.c which only gets compiled with CONFIG_NET and also moves the helper proto usage next to other tracing helpers that are conditional on CONFIG_NET. This avoids ld: kernel/trace/bpf_trace.o: in function `bpf_sock_from_file': bpf_trace.c:(.text+0xe23): undefined reference to `sock_from_file' When compiling a kernel with BPF and without NET. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Florent Revest <revest@chromium.org> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Martin KaFai Lau <kafai@fb.com> Acked-by: KP Singh <kpsingh@kernel.org> Link: https://lore.kernel.org/bpf/20201208173623.1136863-1-revest@chromium.org
2020-12-08Merge branch 'for-upstream' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth-next Johan Hedberg says: ==================== pull request: bluetooth-next 2020-12-07 Here's the main bluetooth-next pull request for the 5.11 kernel. - Updated Bluetooth entries in MAINTAINERS to include Luiz von Dentz - Added support for Realtek 8822CE and 8852A devices - Added support for MediaTek MT7615E device - Improved workarounds for fake CSR devices - Fix Bluetooth qualification test case L2CAP/COS/CFD/BV-14-C - Fixes for LL Privacy support - Enforce 16 byte encryption key size for FIPS security level - Added new mgmt commands for extended advertising support - Multiple other smaller fixes & improvements Please let me know if there are any issues pulling. Thanks. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-12-09Merge tag 'memory-controller-drv-5.11-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.11, part two 1. Several fixes for Renesas RPC-IF driver. 2. Correct compile testing of TI EMIF SRAM driver. 3. Fix potential NULL pointer in JZ4780 NEMC driver. * tag 'memory-controller-drv-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe() memory: ti-emif-sram: only build for ARMv7 memory: renesas-rpc-if: Make rpcif_enable/disable_rpm() as static inline memory: renesas-rpc-if: Fix a node reference leak in rpcif_probe() memory: renesas-rpc-if: Fix unbalanced pm_runtime_enable in rpcif_{enable,disable}_rpm memory: renesas-rpc-if: Return correct value to the caller of rpcif_manual_xfer() Link: https://lore.kernel.org/r/20201207075758.5501-1-krzk@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09Merge tag 'reset-for-v5.11' of git://git.pengutronix.de/pza/linux into ↵Arnd Bergmann
arm/drivers Reset controller updates for v5.11 This tag adds support for sharing pulsed resets under certain conditions. For example, when multiple drivers go through a suspend-resume cycle, a reset line they share can be triggered again during resume. Further, the reset-meson driver now can be built as a module, the reset-socfpga driver properly releases its memory region in the probe error path, and reset-ti-syscon driver uses regmap_write_bits() instead of regmap_update_bits() to support devices without status readback. * tag 'reset-for-v5.11' of git://git.pengutronix.de/pza/linux: reset-controller: ti: force the write operation when assert or deassert reset: socfpga: add error handling and release mem-region reset: meson: make it possible to build as a module reset: make shared pulsed reset controls re-triggerable Link: https://lore.kernel.org/r/d586ada0073f2ac50a02274f42bf07bfb0603835.camel@pengutronix.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09Merge tag 'imx-drivers-5.11' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX drivers change for 5.11: - A series from Daniel Baluta to update imx-dsp driver and export functions for on demand channel request/free. - A number of patches to add power domains for i.MX8qxp DC0, LVDS1, MIPI1 and JPEG subsystems. - Add dummy functions for i.MX firmware drivers to avoid build failure seen with COMPILE_TEST. * tag 'imx-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: firmware: imx: scu-pd: Add some power domains support for i.MX8qxp MIPI1 subsystem firmware: imx: scu-pd: Add main power domain support for i.MX8qxp LVDS1 subsystem firmware: imx: scu-pd: Add video0/1 power domains support for i.MX8qxp DC0 subsystem firmware: imx-dsp: Export functions to request/free channels firmware: imx: Save channel name for further use firmware: imx: Introduce imx_dsp_setup_channels firmware: imx: scu-pd: Add power domains for imx-jpeg firmware: imx: add dummy functions Link: https://lore.kernel.org/r/20201202142717.9262-1-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09Merge tag 'drivers_soc_for_5.11' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers drivers: soc: TI SOC changes for 5.11 - ti_sci changes towards DMSS support - Static warning fixes - Kconfig update for Keystone ARM64 socs - AM64X SOC family support * tag 'drivers_soc_for_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (23 commits) drivers: soc: ti: knav_qmss_queue: Fix error return code in knav_queue_probe soc: ti: Fix reference imbalance in knav_dma_probe soc: ti: pruss: Remove wrong check against *get_match_data return value soc: ti: Kconfig: Drop ARM64 SoC specific configs soc: ti: k3-ringacc: Provide documentation for 'k3_ring's 'state' soc: ti: wkup_m3_ipc: Document 'm3_ipc' parameter throughout soc: ti: pm33xx: Remove set but unused variable 'ret' soc: ti: knav_dma: Fix a kernel function doc formatting issue soc: ti: knav_qmss_queue: Fix a whole host of function documentation issues soc: ti: knav_qmss_queue: Remove set but unchecked variable 'ret' soc: ti: omap-prm: Do not check rstst bit on deassert if already deasserted soc: ti: knav_qmss: fix reference leak in knav_queue_probe soc: ti: k3-socinfo: Add entry for AM64X SoC family soc: ti: k3-ringacc: Use correct device for allocation in RING mode firmware: ti_sci: rm: Remove unused config() from ti_sci_rm_ringacc_ops soc: ti: k3-ringacc: Use the ti_sci set_cfg callback for ring configuration firmware: ti_sci: rm: Add new ops for ring configuration firmware: ti_sci: rm: Remove ring_get_config support firmware: ti_sci: rm: Add support for extended_ch_type for tx channel soc: ti: ti_sci_inta_msi: Add support for second range in resource ranges ... Link: https://lore.kernel.org/r/1606851405-26338-1-git-send-email-santosh.shilimkar@oracle.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09Merge tag 'omap-for-v5.11/genpd-drivers-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers Driver changes for omaps for genpd for v5.11 merge window This series of changes allows booting am335x with genpd and device tree data without the legacy platform data. Also at least am437x can be booted with gendp with power domain and dts data. The SoC specific dts changes will be a separate pull request. We need the following driver changes merged before the dts changes can be done: - platform code needs a few improvments to probe l4_wkup first for clocks, and to bail out when there is no platform data - ti-sysc driver needs a non-urgent fix for asserting rstctrl reset only after disabling the clocks, to probe modules with no known control registers, and added quirk handling for gpmc devices - omap-prm driver needs a non-urgent fix for reset status bit, support added for pm_clk, and then we add the rest of am335x power domain data - clock driver for am335x needs to keep l3_main clock enabled with genpd for suspend and resume to work - wkup_m3 remoteproc driver needs support added for reset control if available instead of the legacy pdata callbacks - pm33xx driver needs PM runtime support added for genpd The am335x specific driver changes for the clock, wkup_m3, pm33xx and remoteproc drivers are quite trivial and have not caused merge conflicts in Linux next. I did not get acks for these changes except from Santosh but had already pushed out the branch already at that point. So I've added the related driver maintainers to Cc. * tag 'omap-for-v5.11/genpd-drivers-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: remoteproc/wkup_m3: Use reset control driver if available soc: ti: pm33xx: Enable basic PM runtime support for genpd soc: ti: omap-prm: am3: add genpd support for remaining PRM instances soc: ti: omap-prm: Add pm_clk for genpd clk: ti: am33xx: Keep am3 l3 main clock always on for genpd bus: ti-sysc: Implement GPMC debug quirk to drop platform data bus: ti-sysc: Support modules without control registers ARM: OMAP2+: Probe PRCM first to probe l4_wkup with simple-pm-bus ARM: OMAP2+: Check for inited flag bus: ti-sysc: Assert reset only after disabling clocks soc: ti: omap-prm: Do not check rstst bit on deassert if already deasserted bus: ti-sysc: Fix bogus resetdone warning on enable for cpsw bus: ti-sysc: Fix reset status check for modules with quirks ARM: OMAP2+: Fix missing select PM_GENERIC_DOMAINS_OF ARM: OMAP2+: Fix location for select PM_GENERIC_DOMAINS Link: https://lore.kernel.org/r/pull-1606806458-694517@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09Merge tag 'qcom-drivers-for-5.11' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for v5.11 This adds support for the core power domains on MSM8916, MSM8939, SDM660 and SDX55. It adds SM8150 support to the last-level cache controller driver and it makes it possible to build the Command DB and RPMh drivers as modules. It also contains a slew of smaller cleanups, style and bug fixes throughout the various drivers. * tag 'qcom-drivers-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (39 commits) soc: qcom: rpmhpd: Add SDX55 power domains dt-bindings: power: Add rpm power domain bindings for sdx55 soc: qcom: rpmh: Use __fill_rpmh_msg API during rpmh_write() samples: qmi: Constify static qmi ops soc: qcom: pdr: Constify static qmi structs soc: qcom: initialize local variable soc: qcom: socinfo: add soc ids for msm8953 variants soc: qcom: geni: Remove "iova" check soc: qcom: llcc: Add configuration data for SM8150 dt-bindings: msm: Add LLCC for SM8150 soc: qcom: rpmh: Fix possible doc-rot in rpmh_write()'s header soc: qcom: kryo-l2-accessors: Fix misnaming of 'val' soc: qcom: rpmhpd: Provide some missing struct member descriptions soc: qcom: llcc-qcom: Fix expected kernel-doc formatting soc: qcom: smp2p: Remove unused struct attribute provide another soc: qcom: wcnss_ctrl: Demote non-conformant struct header and fix function headers soc: qcom: smsm: Fix some kernel-doc formatting and naming problems soc: qcom: smem: Fix formatting and missing documentation issues soc: qcom: qcom-geni-se: Fix misnamed function parameter 'rx_rfr' soc: qcom: qcom_aoss: Add missing description for 'cooling_devs' ... Link: https://lore.kernel.org/r/20201130190142.345246-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-08Merge tag 'imx-bindings-5.11' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX DT bindings update for 5.11: - Quite some patches that update vendor-prefixes.yaml and fsl.yaml to document missing board compatibles and add new board compatibles. - A couple of patches from Dong Aisheng to update imx-scu firmware and imx-lpcg clock bindings for new SCU two cells clock support. - A couple of net bindings update from Ioana Ciornei to complete the MAC/PCS/PHY representation on DPAA2 devices. - Document watchdog compatibles for all i.MX and Layerscape devices. * tag 'imx-bindings-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (35 commits) dt-bindings: arm: fsl: add Protonic WD3 board dt-bindings: vendor-prefixes: add "virtual" prefix dt-bindings: fsl: add kamstrup flex concentrator to schema dt-bindings: arm: fsl: document i.MX7S boards dt-bindings: arm: fsl: document SolidRun LX2160A boards dt-bindings: arm: fsl: document LS1012A FRWY board dt-bindings: arm: fsl: add Van der Laan LANMCU board dt-bindings: arm: fsl: add Altesco I6P board dt-bindings: vendor-prefixes: Add an entry for Altus-Escon-Company dt-bindings: net: add the 10gbase-r connection type dt-bindings: net: add the DPAA2 MAC DTS definition dt-bindings: fsl: add compatible for LX2162A QDS Board dt-bindings: vendor-prefixes: Add an entry for Van der Laan b.v. dt-bindings: arm: fsl: document i.MX7D boards dt-bindings: arm: fsl: document i.MX6ULL boards dt-bindings: arm: fsl: document i.MX6UL boards dt-bindings: arm: fsl: document i.MX6SX boards dt-bindings: arm: fsl: document i.MX6SL boards dt-bindings: arm: fsl: document i.MX6QP boards dt-bindings: arm: fsl: document i.MX6Q boards ... Link: https://lore.kernel.org/r/20201202142717.9262-3-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-08Merge tag 'amlogic-dt64' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: amlogic updates for v5.11 - AXG SoCs: add/enable PCIe & USB OTG support - AXG SoCs: add MIPI DSI support - Khadas VIM: add RTC - several cleanups & fixups * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson-sm1: fix typo in opp table arm64: dts: meson: add KHAMSIN IR remote node to SML5442TW arm64: dts: meson: update the Khadas VIM3/3L LED bindings arm64: dts: meson: fix spi-max-frequency on Khadas VIM2 arm64: dts: meson: add rtc aliases to meson-khadas-vim3.dtsi arm64: dts: meson: Add capacity-dmips-mhz attributes to GXM arm64: dts: meson-axg-s400: enable PCIe M.2 Key E slots arm64: dts: meson-axg: add PCIe nodes arm64: dts: meson-axg: add MIPI DSI PHY nodes arm64: dts: meson-axg: add PWRC node arm64: dts: meson: enable rtc node on Khadas VIM1/VIM2 boards dt-bindings: clk: axg-clkc: add MIPI DSI Host clock binding dt-bindings: clk: axg-clkc: add Video Clocks arm64: dts: meson: add watchdog to g12-common dtsi arm64: dts: meson: remove empty lines from aml-s905x-cc v2 dts Link: https://lore.kernel.org/r/7heek9jgox.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-08net: stmmac: overwrite the dma_cap.addr64 according to HW designFugang Duan
The current IP register MAC_HW_Feature1[ADDR64] only defines 32/40/64 bit width, but some SOCs support others like i.MX8MP support 34 bits but it maps to 40 bits width in MAC_HW_Feature1[ADDR64]. So overwrite dma_cap.addr64 according to HW real design. Fixes: 94abdad6974a ("net: ethernet: dwmac: add ethernet glue logic for NXP imx8 chip") Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-12-08Merge tag 'qcom-arm64-for-5.11' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 DT updates for 5.11 For SM8250 the recently introduced support for handling boot-loader stream mappings in the ARM SMMU allow us to enable this, and thereby USB controller and PHY, SDHCI controller and FastRPC, as well as support for the SM8250 HDK board has been added. Additionally PRNG and RTC is enabled. Similarly for SM8150, the ARM SMMU could be added which allows the secondary USB controller and PHYs, as well as WiFi to be added and support for the SM8150 HDK board to be introduced. Additionally Coresight and support for the last-level cache controller was added. MSM8916 finally has VDDCX and VDDMX removed as regulators and are now handled by the rpmpd driver for the devices controlling them. The Longsheer L8150 gains touchscreen, sensors, vibrator and LED support. MSM8992 gains USB and SDHCI support as well as an I2C controller and the associated RMI4 based touchscreen for the Lumia 950. MSM8994 also gains USB and SDHCI support, as well as VADC and temp-alarm support. Then support for the Lumia 950 XL is added. SDM845 gains interconnect properties for a number of devices and the GENI wrappers gains iommu stream configuration, which means DMA operations on e.g. I2C now works. The Lenovo Yoga C630 finally has the SMMU enabled, a few fixes and the description of the eDP bridge and panel means that the laptop can now boot mainline with working display, GPU, WiFi and audio. SC7180 gains a slew of smaller improvements and fixes. * tag 'qcom-arm64-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (93 commits) arm64: dts: qcom: c630: Define eDP bridge and panel arm64: dts: qcom: c630: Fix pinctrl pins properties arm64: dts: qcom: c630: Polish i2c-hid devices arm64: dts: qcom: sc7180: Add lpass cpu node for I2S driver arm64: dts: sdm845: Add interconnect properties for QUP interconnect: qcom: sdm845: Add the missing nodes for QUP dt-bindings: interconnect: sdm845: Add IDs for the QUP ports arm64: dts: qcom: c630: Expose LID events arm64: dts: qcom: c630: Re-enable apps_smmu dts: qcom: sdm845: Add dt entries to support crypto engine. arm64: dts: qcom: qrb5165-rb5: Add support for MCP2518FD arm64: dts: qcom: sdm845: use GIC_SPI for IPA interrupts arm64: dts: qcom: sc7180: use GIC_SPI for IPA interrupts arm64: dts: qcom: sc7180: limit IPA iommu streams arm64: dts: qcom: sm8150: Add Coresight support arm64: dts: qcom: sc7180-trogdor: Make pp3300_a the default supply for pp3300_hub arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variant arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite arm64: dts: qcom: sc7180-trogdor: add "pen-insert" label for trogdor arm64: qcom: sc7180: trogdor: Add ADC nodes and thermal zone for charger thermistor ... Link: https://lore.kernel.org/r/20201130190131.345187-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-08Merge tag 'v5.10-next-dts64' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt mt8173: - add new power domain controller node mt8183: - add new power domain controller - add display, iommu and dsi nodes mt8192: - add basic support, pinctrl, uart, spi, i2c and timer mt8516: - add auxadc, efuse and usb nodes mt8167: - add basic support for the SoC - add support for the pumkin board mt6779: - add initial support, interrupt controller, clocks, uart mt7622: - PWM node for all available PWM channels * tag 'v5.10-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (25 commits) dts64: mt7622: disable spi1 and uart2 because pins are used by pwm dts64: mt7622: enable all pwm for bananapi r64 arm64: dts: mt8183: Add display nodes for MT8183 arm64: dts: mt8183: Add iommu and larb nodes arm64: dts: mt8183: Add dsi node arm64: dts: mt8183: Add pwm and backlight node arm64: dts: mediatek: Add mt8183 power domains controller arm64: dts: mediatek: Add smi_common node for MT8183 arm64: dts: mediatek: Add mt8173 power domain controller dt-bindings: power: Add MT8192 power domains dt-bindings: power: Add MT8183 power domains dt-bindings: power: Add bindings for the Mediatek SCPSYS power domains controller arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile arm64: dts: mediatek: add MT8167 pumpkin board dts arm64: dts: mediatek: add dtsi for MT8167 dt-bindings: arm64: dts: mediatek: Add mt8167-pumpkin board arm64: dts: mediatek: mt8516: add efuse node arm64: dts: mediatek: align GPIO hog names with dtschema arm64: dts: mediatek: mt8516: add usb1 node arm64: dts: mediatek: mt8516: rename usb phy ... Link: https://lore.kernel.org/r/72fe1c4f-f27c-c455-dfd9-66bde90bb295@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-08PCI: Remove unused HAVE_PCI_SET_MWIHeiner Kallweit
Remove unused HAVE_PCI_SET_MWI. Link: https://lore.kernel.org/r/03f20cac-708d-7897-c7c7-cb4e63cfd991@gmail.com Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-12-08netfilter: nft_dynset: fix timeouts later than 23 daysPablo Neira Ayuso
Use nf_msecs_to_jiffies64 and nf_jiffies64_to_msecs as provided by 8e1102d5a159 ("netfilter: nf_tables: support timeouts larger than 23 days"), otherwise ruleset listing breaks. Fixes: a8b1e36d0d1d ("netfilter: nft_dynset: fix element timeout for HZ != 1000") Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2020-12-08bonding: fix feature flag setting at init timeJarod Wilson
Don't try to adjust XFRM support flags if the bond device isn't yet registered. Bad things can currently happen when netdev_change_features() is called without having wanted_features fully filled in yet. This code runs both on post-module-load mode changes, as well as at module init time, and when run at module init time, it is before register_netdevice() has been called and filled in wanted_features. The empty wanted_features led to features also getting emptied out, which was definitely not the intended behavior, so prevent that from happening. Originally, I'd hoped to stop adjusting wanted_features at all in the bonding driver, as it's documented as being something only the network core should touch, but we actually do need to do this to properly update both the features and wanted_features fields when changing the bond type, or we get to a situation where ethtool sees: esp-hw-offload: off [requested on] I do think we should be using netdev_update_features instead of netdev_change_features here though, so we only send notifiers when the features actually changed. Fixes: a3b658cfb664 ("bonding: allow xfrm offload setup post-module-load") Reported-by: Ivan Vecera <ivecera@redhat.com> Suggested-by: Ivan Vecera <ivecera@redhat.com> Cc: Jay Vosburgh <j.vosburgh@gmail.com> Cc: Veaceslav Falico <vfalico@gmail.com> Cc: Andy Gospodarek <andy@greyhouse.net> Signed-off-by: Jarod Wilson <jarod@redhat.com> Link: https://lore.kernel.org/r/20201205172229.576587-1-jarod@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-12-08PM / EM: Micro optimization in em_cpu_energyPavankumar Kondeti
When the sum of the utilization of CPUs in a power domain is zero, return the energy as 0 without doing any computations. Acked-by: Quentin Perret <qperret@google.com> Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com> Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-12-08iommu/io-pgtable: Remove tlb_flush_leafRobin Murphy
The only user of tlb_flush_leaf is a particularly hairy corner of the Arm short-descriptor code, which wants a synchronous invalidation to minimise the races inherent in trying to split a large page mapping. This is already far enough into "here be dragons" territory that no sensible caller should ever hit it, and thus it really doesn't need optimising. Although using tlb_flush_walk there may technically be more heavyweight than needed, it does the job and saves everyone else having to carry around useless baggage. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://lore.kernel.org/r/9844ab0c5cb3da8b2f89c6c2da16941910702b41.1606324115.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2020-12-08Merge branch 'for-next/iommu/fixes' into for-next/iommu/coreWill Deacon
Merge in IOMMU fixes for 5.10 in order to resolve conflicts against the queue for 5.11. * for-next/iommu/fixes: iommu/amd: Set DTE[IntTabLen] to represent 512 IRTEs iommu/vt-d: Don't read VCCAP register unless it exists x86/tboot: Don't disable swiotlb when iommu is forced on iommu: Check return of __iommu_attach_device() arm-smmu-qcom: Ensure the qcom_scm driver has finished probing iommu/amd: Enforce 4k mapping for certain IOMMU data structures MAINTAINERS: Temporarily add myself to the IOMMU entry iommu/vt-d: Fix compile error with CONFIG_PCI_ATS not set iommu/vt-d: Avoid panic if iommu init fails in tboot system iommu/vt-d: Cure VF irqdomain hickup x86/platform/uv: Fix copied UV5 output archtype x86/platform/uv: Drop last traces of uv_flush_tlb_others
2020-12-08Merge branch 'for-next/iommu/vt-d' into for-next/iommu/coreWill Deacon
Intel VT-D updates for 5.11. The main thing here is converting the code over to the iommu-dma API, which required some improvements to the core code to preserve existing functionality. * for-next/iommu/vt-d: iommu/vt-d: Avoid GFP_ATOMIC where it is not needed iommu/vt-d: Remove set but not used variable iommu/vt-d: Cleanup after converting to dma-iommu ops iommu/vt-d: Convert intel iommu driver to the iommu ops iommu/vt-d: Update domain geometry in iommu_ops.at(de)tach_dev iommu: Add quirk for Intel graphic devices in map_sg iommu: Allow the dma-iommu api to use bounce buffers iommu: Add iommu_dma_free_cpu_cached_iovas() iommu: Handle freelists when using deferred flushing in iommu drivers iommu/vt-d: include conditionally on CONFIG_INTEL_IOMMU_SVM
2020-12-08Merge branch 'for-next/iommu/svm' into for-next/iommu/coreWill Deacon
More steps along the way to Shared Virtual {Addressing, Memory} support for Arm's SMMUv3, including the addition of a helper library that can be shared amongst other IOMMU implementations wishing to support this feature. * for-next/iommu/svm: iommu/arm-smmu-v3: Hook up ATC invalidation to mm ops iommu/arm-smmu-v3: Implement iommu_sva_bind/unbind() iommu/sva: Add PASID helpers iommu/ioasid: Add ioasid references
2020-12-08Merge branch 'for-next/iommu/iova' into for-next/iommu/coreWill Deacon
IOVA allocator updates for 5.11, including removal of unused symbols and functions as well as some optimisations to improve allocation behaviour in the face of fragmentation. * for-next/iommu/iova: iommu: Stop exporting free_iova_mem() iommu: Stop exporting alloc_iova_mem() iommu: Delete split_and_remove_iova() iommu: avoid taking iova_rbtree_lock twice iommu/iova: Free global iova rcache on iova alloc failure iommu/iova: Retry from last rb tree node if iova search fails
2020-12-08btrfs: introduce ZONED feature flagNaohiro Aota
This patch introduces the ZONED incompat flag. The flag indicates that the volume management will satisfy the constraints imposed by host-managed zoned block devices (aligned chunk allocation, append-only updates, reset zone after filled). As the zoned support will happen incrementally due to enhancing some core infrastructure like super block writes, tree-log, raid support, the feature will appear in sysfs only on debug builds. It will be enabled once the support is feature complete and applications can reliably check whether zoned support is present or not. Reviewed-by: Anand Jain <anand.jain@oracle.com> Reviewed-by: Johannes Thumshirn <johannes.thumshirn@wdc.com> Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Signed-off-by: Naohiro Aota <naohiro.aota@wdc.com> Reviewed-by: David Sterba <dsterba@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2020-12-08Merge branch 'for-next/iommu/arm-smmu' into for-next/iommu/coreWill Deacon
Arm SMMU updates for 5.11, including support for the SMMU integrated into the Adreno GPU as well as workarounds for the broken firmware implementation in the DB845c SoC from Qualcomm. * for-next/iommu/arm-smmu: iommu: arm-smmu-impl: Add a space before open parenthesis iommu: arm-smmu-impl: Use table to list QCOM implementations iommu/arm-smmu: Move non-strict mode to use io_pgtable_domain_attr iommu/arm-smmu: Add support for pagetable config domain attribute iommu/io-pgtable-arm: Add support to use system cache iommu/io-pgtable: Add a domain attribute for pagetable configuration dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU iommu/arm-smmu: Add a way for implementations to influence SCTLR iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU iommu/arm-smmu-v3: Assign boolean values to a bool variable iommu/arm-smmu: Use new devm_krealloc() iommu/arm-smmu-qcom: Implement S2CR quirk iommu/arm-smmu-qcom: Read back stream mappings iommu/arm-smmu: Allow implementation specific write_s2cr
2020-12-08iommu: Stop exporting free_iova_mem()John Garry
It has no user outside iova.c Signed-off-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1607020492-189471-4-git-send-email-john.garry@huawei.com Signed-off-by: Will Deacon <will@kernel.org>
2020-12-08iommu: Stop exporting alloc_iova_mem()John Garry
It is not used outside iova.c Signed-off-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1607020492-189471-3-git-send-email-john.garry@huawei.com Signed-off-by: Will Deacon <will@kernel.org>
2020-12-08iommu: Delete split_and_remove_iova()John Garry
Function split_and_remove_iova() has not been referenced since commit e70b081c6f37 ("iommu/vt-d: Remove IOVA handling code from the non-dma_ops path"), so delete it. Signed-off-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1607020492-189471-2-git-send-email-john.garry@huawei.com Signed-off-by: Will Deacon <will@kernel.org>
2020-12-08Merge tag 'thunderbolt-for-v5.11-rc1' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt into usb-next Mika writes: thunderbolt: Changes for v5.11 merge window This includes following Thunderbolt/USB4 changes for v5.11 merge window: * DMA traffic test driver * USB4 router NVM upgrade improvements * USB4 router operations proxy implementation available in the recent Intel Connection Manager firmwares * Support for Intel Maple Ridge discrete Thunderbolt 4 controller * A couple of cleanups and minor improvements. * tag 'thunderbolt-for-v5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt: (22 commits) thunderbolt: Add support for Intel Maple Ridge thunderbolt: Add USB4 router operation proxy for firmware connection manager thunderbolt: Move constants for USB4 router operations to tb_regs.h thunderbolt: Add connection manager specific hooks for USB4 router operations thunderbolt: Pass TX and RX data directly to usb4_switch_op() thunderbolt: Pass metadata directly to usb4_switch_op() thunderbolt: Perform USB4 router NVM upgrade in two phases thunderbolt: Return -ENOTCONN when ERR_CONN is received thunderbolt: Keep the parent runtime resumed for a while on device disconnect thunderbolt: Log adapter numbers in decimal in path activation/deactivation thunderbolt: Log which connection manager implementation is used thunderbolt: Move max_boot_acl field to correct place in struct icm MAINTAINERS: Add Isaac as maintainer of Thunderbolt DMA traffic test driver thunderbolt: Add DMA traffic test driver thunderbolt: Add support for end-to-end flow control thunderbolt: Make it possible to allocate one directional DMA tunnel thunderbolt: Create debugfs directory automatically for services thunderbolt: Add functions for enabling and disabling lane bonding on XDomain thunderbolt: Add link_speed and link_width to XDomain thunderbolt: Create XDomain devices for loops back to the host ...
2020-12-08netfilter: x_tables: Switch synchronization to RCUSubash Abhinov Kasiviswanathan
When running concurrent iptables rules replacement with data, the per CPU sequence count is checked after the assignment of the new information. The sequence count is used to synchronize with the packet path without the use of any explicit locking. If there are any packets in the packet path using the table information, the sequence count is incremented to an odd value and is incremented to an even after the packet process completion. The new table value assignment is followed by a write memory barrier so every CPU should see the latest value. If the packet path has started with the old table information, the sequence counter will be odd and the iptables replacement will wait till the sequence count is even prior to freeing the old table info. However, this assumes that the new table information assignment and the memory barrier is actually executed prior to the counter check in the replacement thread. If CPU decides to execute the assignment later as there is no user of the table information prior to the sequence check, the packet path in another CPU may use the old table information. The replacement thread would then free the table information under it leading to a use after free in the packet processing context- Unable to handle kernel NULL pointer dereference at virtual address 000000000000008e pc : ip6t_do_table+0x5d0/0x89c lr : ip6t_do_table+0x5b8/0x89c ip6t_do_table+0x5d0/0x89c ip6table_filter_hook+0x24/0x30 nf_hook_slow+0x84/0x120 ip6_input+0x74/0xe0 ip6_rcv_finish+0x7c/0x128 ipv6_rcv+0xac/0xe4 __netif_receive_skb+0x84/0x17c process_backlog+0x15c/0x1b8 napi_poll+0x88/0x284 net_rx_action+0xbc/0x23c __do_softirq+0x20c/0x48c This could be fixed by forcing instruction order after the new table information assignment or by switching to RCU for the synchronization. Fixes: 80055dab5de0 ("netfilter: x_tables: make xt_replace_table wait until old rules are not used anymore") Reported-by: Sean Tranchetti <stranche@codeaurora.org> Reported-by: kernel test robot <lkp@intel.com> Suggested-by: Florian Westphal <fw@strlen.de> Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2020-12-08firmware: arm_scmi: Add power_scale_mw_get() interfaceLukasz Luba
Add a new interface to the existing perf_ops and export the information about the power values scale. This would be used by the cpufreq driver and Energy Model framework to set the performance domains scale: milli-Watts or abstract scale. Suggested-by: Morten Rasmussen <morten.rasmussen@arm.com> Reviewed-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Lukasz Luba <lukasz.luba@arm.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-12-07blk-mq: add new API of blk_mq_hctx_set_fq_lock_classMing Lei
flush_end_io() may be called recursively from some driver, such as nvme-loop, so lockdep may complain 'possible recursive locking'. Commit b3c6a5997541("block: Fix a lockdep complaint triggered by request queue flushing") tried to address this issue by assigning dynamically allocated per-flush-queue lock class. This solution adds synchronize_rcu() for each hctx's release handler, and causes horrible SCSI MQ probe delay(more than half an hour on megaraid sas). Add new API of blk_mq_hctx_set_fq_lock_class() for these drivers, so we just need to use driver specific lock class for avoiding the lockdep warning of 'possible recursive locking'. Tested-by: Kashyap Desai <kashyap.desai@broadcom.com> Reported-by: Qian Cai <cai@redhat.com> Cc: Sumit Saxena <sumit.saxena@broadcom.com> Cc: John Garry <john.garry@huawei.com> Cc: Kashyap Desai <kashyap.desai@broadcom.com> Cc: Bart Van Assche <bvanassche@acm.org> Cc: Hannes Reinecke <hare@suse.de> Signed-off-by: Ming Lei <ming.lei@redhat.com> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-12-07Merge branch 'mlx5-next' of ↵Jakub Kicinski
git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux Saeed Mahameed says: ==================== mlx5-next auxbus support This pull request is targeting net-next and rdma-next branches. This series provides mlx5 support for auxiliary bus devices. It starts with a merge commit of tag 'auxbus-5.11-rc1' from gregkh/driver-core into mlx5-next, then the mlx5 patches that will convert mlx5 ulp devices (netdev, rdma, vdpa) to use the proper auxbus infrastructure instead of the internal mlx5 device and interface management implementation, which Leon is deleting at the end of this patchset. Link: https://lore.kernel.org/alsa-devel/20201026111849.1035786-1-leon@kernel.org/ Thanks to everyone for the joint effort ! * 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux: RDMA/mlx5: Remove IB representors dead code net/mlx5: Simplify eswitch mode check net/mlx5: Delete custom device management logic RDMA/mlx5: Convert mlx5_ib to use auxiliary bus net/mlx5e: Connect ethernet part to auxiliary bus vdpa/mlx5: Connect mlx5_vdpa to auxiliary bus net/mlx5: Register mlx5 devices to auxiliary virtual bus vdpa/mlx5: Make hardware definitions visible to all mlx5 devices net/mlx5_core: Clean driver version and name net/mlx5: Properly convey driver version to firmware driver core: auxiliary bus: minor coding style tweaks driver core: auxiliary bus: make remove function return void driver core: auxiliary bus: move slab.h from include file Add auxiliary bus support ==================== Link: https://lore.kernel.org/r/20201207053349.402772-1-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-12-07net/mlx4: Remove unused #define MAX_MSIX_P_PORTTariq Toukan
All usages of the definition MAX_MSIX_P_PORT were removed. It's not in use anymore. Remove it. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Reviewed-by: Moshe Shemesh <moshe@mellanox.com> Link: https://lore.kernel.org/r/20201206091254.12476-1-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-12-07dt-bindings: clock: Add GDSC in SDX55 GCCManivannan Sadhasivam
Add GDSC instances in SDX55 GCC block. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20201126072844.35370-6-manivannan.sadhasivam@linaro.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-12-07dt-bindings: clock: Introduce RPMHCC bindings for SDX55Vinod Koul
Add compatible for SDX55 RPMHCC and DT include. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201126072844.35370-4-manivannan.sadhasivam@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-12-07dt-bindings: clock: Add SDX55 GCC clock bindingsVinod Koul
Add device tree bindings for global clock controller on SDX55 SoCs. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201126072844.35370-2-manivannan.sadhasivam@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-12-07clk: divider: add devm_clk_hw_register_divider_table()Michael Walle
This will simplify drivers which would only unregister the clk in their remove() op. Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20201108185113.31377-6-michael@walle.cc Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-12-07clk: qoriq: provide constants for the typeMichael Walle
To avoid future mistakes in the device tree for the clockgen module, add constants for the clockgen subtype as well as a macro for the PLL divider. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201108185113.31377-4-michael@walle.cc Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-12-07sbitmap: remove swap_lockPavel Begunkov
map->swap_lock protects map->cleared from concurrent modification, however sbitmap_deferred_clear() is already atomically drains it, so it's guaranteed to not loose bits on concurrent sbitmap_deferred_clear(). A one threaded tag heavy test on top of nullbk showed ~1.5% t-put increase, and 3% -> 1% cycle reduction of sbitmap_get() according to perf. Signed-off-by: Pavel Begunkov <asml.silence@gmail.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-12-07seq_buf: Avoid type mismatch for seq_buf_initArnd Bergmann
Building with W=2 prints a number of warnings for one function that has a pointer type mismatch: linux/seq_buf.h: In function 'seq_buf_init': linux/seq_buf.h:35:12: warning: pointer targets in assignment from 'unsigned char *' to 'char *' differ in signedness [-Wpointer-sign] Change the type in the function prototype according to the type in the structure. Link: https://lkml.kernel.org/r/20201026161108.3707783-1-arnd@kernel.org Fixes: 9a7777935c34 ("tracing: Convert seq_buf fields to be like seq_file fields") Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2020-12-07clk: composite: add devm_clk_hw_register_composite_pdata()Michael Walle
This will simplify drivers which would only unregister the clk in their remove() op. Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20201105192746.19564-3-michael@walle.cc Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-12-07RDMA/hns: Move capability flags of QP and CQ to hns-abi.hWeihang Li
These flags will be returned to the userspace through ABI, so they should be defined in hns-abi.h. Furthermore, there is no need to include hns-abi.h in every source files, it just needs to be included in the common header file. Link: https://lore.kernel.org/r/1606872560-17823-1-git-send-email-liweihang@huawei.com Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-12-07IB: Fix kernel-doc markupsMauro Carvalho Chehab
Some functions have different names between their prototypes and the kernel-doc markup. Others need to be fixed, as kernel-doc markups should use this format: identifier - description Link: https://lore.kernel.org/r/78b98c41a5a0f4c0106433d305b143028a4168b0.1606823973.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-12-07Merge tag 'mlx5-next-2020-12-02' of ↵Jason Gunthorpe
git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux Saeed Mahameed says: ==================== mlx5-next-2020-12-02 Low level mlx5 updates required by both netdev and rdma trees: net/mlx5: Treat host PF vport as other (non eswitch manager) vport net/mlx5: Enable host PF HCA after eswitch is initialized net/mlx5: Rename peer_pf to host_pf net/mlx5: Make API mlx5_core_is_ecpf accept const pointer net/mlx5: Export steering related functions net/mlx5: Expose other function ifc bits net/mlx5: Expose IP-in-IP TX and RX capability bits net/mlx5: Update the hardware interface definition for vhca state net/mlx5: Update the list of the PCI supported devices net/mlx5: Avoid exposing driver internal command helpers net/mlx5: Add ts_cqe_to_dest_cqn related bits net/mlx5: Add misc4 to mlx5_ifc_fte_match_param_bits net/mlx5: Check dr mask size against mlx5_match_param size net/mlx5: Add sampler destination type net/mlx5: Add sample offload hardware bits and structures ==================== Link: https://lore.kernel.org/r/20201203011010.213440-1-saeedm@nvidia.com Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-12-07RDMA/uverbs: Allow drivers to create a new HW object during rereg_mrJason Gunthorpe
mlx5 has an ugly flow where it tries to allocate a new MR and replace the existing MR in the same memory during rereg. This is very complicated and buggy. Instead of trying to replace in-place inside the driver, provide support from uverbs to change the entire HW object assigned to a handle during rereg_mr. Since destroying a MR is allowed to fail (ie if a MW is pointing at it) and can't be detected in advance, the algorithm creates a completely new uobject to hold the new MR and swaps the IDR entries of the two objects. The old MR in the temporary IDR entry is destroyed, and if it fails rereg_mr succeeds and destruction is deferred to FD release. This complexity is why this cannot live in a driver safely. Link: https://lore.kernel.org/r/20201130075839.278575-4-leon@kernel.org Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>